/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
- mission critical applications that require provable dependability.\r
-*/\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
/* \r
Changes between V1.2.4 and V1.2.5\r
*----------------------------------------------------------*/\r
\r
/* Hardware setup for tick. */\r
-#define portTIMER_FOSC_SCALE ( ( unsigned long ) 4 )\r
+#define portTIMER_FOSC_SCALE ( ( uint32_t ) 4 )\r
\r
/* Initial interrupt enable state for newly created tasks. This value is\r
copied into INTCON when a task switches in for the first time. */\r
area's get used by the compiler for temporary storage, especially when \r
performing mathematical operations, or when using 32bit data types. This\r
constant defines the size of memory area which must be saved. */\r
-#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( unsigned char ) 0x13 )\r
+#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( uint8_t ) 0x13 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* IO port constants. */\r
-#define portBIT_SET ( ( unsigned char ) 1 )\r
-#define portBIT_CLEAR ( ( unsigned char ) 0 )\r
+#define portBIT_SET ( ( uint8_t ) 1 )\r
+#define portBIT_CLEAR ( ( uint8_t ) 0 )\r
\r
/*\r
* The serial port ISR's are defined in serial.c, but are called from portable\r
_endasm \\r
\\r
/* Store each address from the hardware stack. */ \\r
- while( STKPTR > ( unsigned char ) 0 ) \\r
+ while( STKPTR > ( uint8_t ) 0 ) \\r
{ \\r
_asm \\r
MOVFF TOSL, PREINC1 \\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-unsigned long ulAddress;\r
-unsigned char ucBlock;\r
+uint32_t ulAddress;\r
+uint8_t ucBlock;\r
\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
\r
First store the function parameters. This is where the task will expect to\r
find them when it starts running. */\r
- ulAddress = ( unsigned long ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ ulAddress = ( uint32_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
ulAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
/* Next we just leave a space. When a context is saved the stack pointer\r
\r
/* Next are all the registers that form part of the task context. */\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */\r
+ *pxTopOfStack = ( StackType_t ) 0x66; /* WREG. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */\r
+ *pxTopOfStack = ( StackType_t ) 0xcc; /* Status. */\r
pxTopOfStack++;\r
\r
/* INTCON is saved with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
+ *pxTopOfStack = ( StackType_t ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* BSR. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */\r
+ *pxTopOfStack = ( StackType_t ) 0x22; /* FSR2L. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */\r
+ *pxTopOfStack = ( StackType_t ) 0x33; /* FSR2H. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */\r
+ *pxTopOfStack = ( StackType_t ) 0x44; /* FSR0L. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */\r
+ *pxTopOfStack = ( StackType_t ) 0x55; /* FSR0H. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */\r
+ *pxTopOfStack = ( StackType_t ) 0x66; /* TABLAT. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* TBLPTRU. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */\r
+ *pxTopOfStack = ( StackType_t ) 0x88; /* TBLPTRUH. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */\r
+ *pxTopOfStack = ( StackType_t ) 0x99; /* TBLPTRUL. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */\r
+ *pxTopOfStack = ( StackType_t ) 0xaa; /* PRODH. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */\r
+ *pxTopOfStack = ( StackType_t ) 0xbb; /* PRODL. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATU. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATH. */\r
pxTopOfStack++;\r
\r
/* Next the .tmpdata and MATH_DATA sections. */\r
for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) ucBlock;\r
+ *pxTopOfStack = ( StackType_t ) ucBlock;\r
*pxTopOfStack++;\r
}\r
\r
/* Store the top of the global data section. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
+ *pxTopOfStack = ( StackType_t ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* High. */\r
pxTopOfStack++;\r
\r
/* The only function return address so far is the address of the \r
task. */\r
- ulAddress = ( unsigned long ) pxCode;\r
+ ulAddress = ( uint32_t ) pxCode;\r
\r
/* TOS low. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
ulAddress >>= 8;\r
\r
/* TOS high. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
ulAddress >>= 8;\r
\r
/* TOS even higher. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
/* Store the number of return addresses on the hardware stack - so far only\r
the address of the task entry point. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 1;\r
+ *pxTopOfStack = ( StackType_t ) 1;\r
pxTopOfStack++;\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup a timer for the tick ISR is using the preemptive scheduler. */\r
prvSetupTimerInterrupt(); \r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
-unsigned long ulCompareValue;\r
-unsigned char ucByte;\r
+const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
+uint32_t ulCompareValue;\r
+uint8_t ucByte;\r
\r
/* Interrupts are disabled when this function is called.\r
\r
1.\r
\r
Clear the time count then setup timer. */\r
- TMR1H = ( unsigned char ) 0x00;\r
- TMR1L = ( unsigned char ) 0x00;\r
+ TMR1H = ( uint8_t ) 0x00;\r
+ TMR1L = ( uint8_t ) 0x00;\r
\r
/* Set the compare match value. */\r
ulCompareValue = ulConstCompareValue;\r
- CCPR1L = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff );\r
- ulCompareValue >>= ( unsigned long ) 8;\r
- CCPR1H = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff ); \r
+ CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );\r
+ ulCompareValue >>= ( uint32_t ) 8;\r
+ CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); \r
\r
CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */\r
CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */\r
projects / freertos / blobdiff