/*\r
- FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
- \r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
- \r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong? *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest information, \r
- license and contact details.\r
- \r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/*\r
#define portTIMER_PRESCALE 8\r
#define portINITIAL_SR 0\r
\r
-/* Defined for backward compatability with project created prior to \r
+/* Defined for backward compatability with project created prior to\r
FreeRTOS.org V4.3.0. */\r
#ifndef configKERNEL_INTERRUPT_PRIORITY\r
#define configKERNEL_INTERRUPT_PRIORITY 1\r
#endif\r
\r
+/* Use _T1Interrupt as the interrupt handler name if the application writer has\r
+not provided their own. */\r
+#ifndef configTICK_INTERRUPT_HANDLER\r
+ #define configTICK_INTERRUPT_HANDLER _T1Interrupt\r
+#endif /* configTICK_INTERRUPT_HANDLER */\r
+\r
/* The program counter is only 23 bits. */\r
#define portUNUSED_PR_BITS 0x7f\r
\r
/* Records the nesting depth of calls to portENTER_CRITICAL(). */\r
-unsigned portBASE_TYPE uxCriticalNesting = 0xef;\r
+UBaseType_t uxCriticalNesting = 0xef;\r
\r
#if configKERNEL_INTERRUPT_PRIORITY != 1\r
#error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )\r
#endif\r
\r
-#ifdef MPLAB_PIC24_PORT\r
-\r
- #define portRESTORE_CONTEXT() \\r
- asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \\r
- "MOV [W0], W15 \n" \\r
- "POP W0 \n" /* Restore the critical nesting counter for the task. */ \\r
- "MOV W0, _uxCriticalNesting \n" \\r
- "POP PSVPAG \n" \\r
- "POP CORCON \n" \\r
- "POP TBLPAG \n" \\r
- "POP RCOUNT \n" /* Restore the registers from the stack. */ \\r
- "POP W14 \n" \\r
- "POP.D W12 \n" \\r
- "POP.D W10 \n" \\r
- "POP.D W8 \n" \\r
- "POP.D W6 \n" \\r
- "POP.D W4 \n" \\r
- "POP.D W2 \n" \\r
- "POP.D W0 \n" \\r
- "POP SR " );\r
-\r
+#if defined( __PIC24E__ ) || defined ( __PIC24F__ ) || defined( __PIC24FK__ ) || defined( __PIC24H__ )\r
+\r
+ #ifdef __HAS_EDS__\r
+ #define portRESTORE_CONTEXT() \\r
+ asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \\r
+ "MOV [W0], W15 \n" \\r
+ "POP W0 \n" /* Restore the critical nesting counter for the task. */ \\r
+ "MOV W0, _uxCriticalNesting \n" \\r
+ "POP DSWPAG \n" \\r
+ "POP DSRPAG \n" \\r
+ "POP CORCON \n" \\r
+ "POP TBLPAG \n" \\r
+ "POP RCOUNT \n" /* Restore the registers from the stack. */ \\r
+ "POP W14 \n" \\r
+ "POP.D W12 \n" \\r
+ "POP.D W10 \n" \\r
+ "POP.D W8 \n" \\r
+ "POP.D W6 \n" \\r
+ "POP.D W4 \n" \\r
+ "POP.D W2 \n" \\r
+ "POP.D W0 \n" \\r
+ "POP SR " );\r
+ #else /* __HAS_EDS__ */\r
+ #define portRESTORE_CONTEXT() \\r
+ asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \\r
+ "MOV [W0], W15 \n" \\r
+ "POP W0 \n" /* Restore the critical nesting counter for the task. */ \\r
+ "MOV W0, _uxCriticalNesting \n" \\r
+ "POP PSVPAG \n" \\r
+ "POP CORCON \n" \\r
+ "POP TBLPAG \n" \\r
+ "POP RCOUNT \n" /* Restore the registers from the stack. */ \\r
+ "POP W14 \n" \\r
+ "POP.D W12 \n" \\r
+ "POP.D W10 \n" \\r
+ "POP.D W8 \n" \\r
+ "POP.D W6 \n" \\r
+ "POP.D W4 \n" \\r
+ "POP.D W2 \n" \\r
+ "POP.D W0 \n" \\r
+ "POP SR " );\r
+ #endif /* __HAS_EDS__ */\r
#endif /* MPLAB_PIC24_PORT */\r
\r
-#ifdef MPLAB_DSPIC_PORT\r
+#if defined( __dsPIC30F__ ) || defined( __dsPIC33F__ )\r
\r
#define portRESTORE_CONTEXT() \\r
asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \\r
\r
#endif /* MPLAB_DSPIC_PORT */\r
\r
+#ifndef portRESTORE_CONTEXT\r
+ #error Unrecognised device selected\r
+\r
+ /* Note: dsPIC parts with EDS are not supported as there is no easy way to\r
+ recover the hardware stacked copies for DOCOUNT, DOHIGH, DOLOW. */\r
+#endif\r
+\r
/*\r
* Setup the timer used to generate the tick interrupt.\r
*/\r
-static void prvSetupTimerInterrupt( void );\r
+void vApplicationSetupTickTimerInterrupt( void );\r
\r
-/* \r
- * See header file for description. \r
+/*\r
+ * See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-unsigned short usCode;\r
-portBASE_TYPE i;\r
+uint16_t usCode;\r
+UBaseType_t i;\r
\r
-const portSTACK_TYPE xInitialStack[] = \r
+const StackType_t xInitialStack[] =\r
{\r
0x1111, /* W1 */\r
0x2222, /* W2 */\r
/* Setup the stack as if a yield had occurred.\r
\r
Save the low bytes of the program counter. */\r
- usCode = ( unsigned short ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) usCode;\r
+ usCode = ( uint16_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) usCode;\r
pxTopOfStack++;\r
\r
/* Save the high byte of the program counter. This will always be zero\r
here as it is passed in a 16bit pointer. If the address is greater than\r
16 bits then the pointer will point to a jump table. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0;\r
+ *pxTopOfStack = ( StackType_t ) 0;\r
pxTopOfStack++;\r
\r
/* Status register with interrupts enabled. */\r
pxTopOfStack++;\r
\r
/* Parameters are passed in W0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack++;\r
\r
- for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( portSTACK_TYPE ) ); i++ )\r
+ for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )\r
{\r
*pxTopOfStack = xInitialStack[ i ];\r
pxTopOfStack++;\r
\r
*pxTopOfStack = CORCON;\r
pxTopOfStack++;\r
- *pxTopOfStack = PSVPAG;\r
- pxTopOfStack++;\r
+\r
+ #if defined(__HAS_EDS__)\r
+ *pxTopOfStack = DSRPAG;\r
+ pxTopOfStack++;\r
+ *pxTopOfStack = DSWPAG;\r
+ pxTopOfStack++;\r
+ #else /* __HAS_EDS__ */\r
+ *pxTopOfStack = PSVPAG;\r
+ pxTopOfStack++;\r
+ #endif /* __HAS_EDS__ */\r
\r
/* Finally the critical nesting depth. */\r
*pxTopOfStack = 0x00;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup a timer for the tick ISR. */\r
- prvSetupTimerInterrupt(); \r
+ vApplicationSetupTickTimerInterrupt();\r
\r
/* Restore the context of the first task to run. */\r
portRESTORE_CONTEXT();\r
\r
void vPortEndScheduler( void )\r
{\r
- /* It is unlikely that the scheduler for the PIC port will get stopped\r
- once running. If required disable the tick interrupt here, then return \r
- to xPortStartScheduler(). */\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxCriticalNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* Setup a timer for a regular tick.\r
*/\r
-static void prvSetupTimerInterrupt( void )\r
+__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;\r
\r
/* Prescale of 8. */\r
T1CON = 0;\r
TMR1 = 0;\r
\r
- PR1 = ( unsigned short ) ulCompareMatch;\r
+ PR1 = ( uint16_t ) ulCompareMatch;\r
\r
/* Setup timer 1 interrupt priority. */\r
IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;\r
\r
void vPortExitCritical( void )\r
{\r
+ configASSERT( uxCriticalNesting );\r
uxCriticalNesting--;\r
if( uxCriticalNesting == 0 )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void __attribute__((__interrupt__, auto_psv)) _T1Interrupt( void )\r
+void __attribute__((__interrupt__, auto_psv)) configTICK_INTERRUPT_HANDLER( void )\r
{\r
/* Clear the timer interrupt. */\r
IFS0bits.T1IF = 0;\r
\r
- vTaskIncrementTick();\r
-\r
- #if configUSE_PREEMPTION == 1\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
portYIELD();\r
- #endif\r
+ }\r
}\r
+\r
projects / freertos / blobdiff