/*\r
- FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+ FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
distribute a combined work that includes FreeRTOS without being obliged to\r
provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
\r
1 tab == 4 spaces!\r
- \r
+\r
***************************************************************************\r
* *\r
* Having a problem? Start by reading the FAQ "My application does *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
- and contact details. \r
- \r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
+ Integrity Systems, who sell the code with commercial support, \r
+ indemnification and middleware, under the OpenRTOS brand.\r
+ \r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
+ engineered and independently SIL3 certified version for use in safety and \r
+ mission critical applications that require provable dependability.\r
*/\r
\r
/*-----------------------------------------------------------\r
* Implementation of functions defined in portable.h for the PIC32MX port.\r
*----------------------------------------------------------*/\r
\r
+#ifndef __XC__\r
+ #error This port is designed to work with XC32. Please update your C compiler version.\r
+#endif\r
+\r
/* Scheduler include files. */\r
#include "FreeRTOS.h"\r
#include "task.h"\r
\r
/* Hardware specifics. */\r
-#define portTIMER_PRESCALE 8\r
+#define portTIMER_PRESCALE 8\r
+#define portPRESCALE_BITS 1\r
\r
/* Bits within various registers. */\r
-#define portIE_BIT ( 0x00000001 )\r
-#define portEXL_BIT ( 0x00000002 )\r
+#define portIE_BIT ( 0x00000001 )\r
+#define portEXL_BIT ( 0x00000002 )\r
+\r
+/* Bits within the CAUSE register. */\r
+#define portCORE_SW_0 ( 0x00000100 )\r
+#define portCORE_SW_1 ( 0x00000200 )\r
\r
/* The EXL bit is set to ensure interrupts do not occur while the context of\r
the first task is being restored. */\r
-#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )\r
+#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )\r
\r
#ifndef configTICK_INTERRUPT_VECTOR\r
#define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR\r
/* The stack used by interrupt service routines that cause a context switch. */\r
portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
\r
-/* The top of stack value ensures there is enough space to store 6 registers on \r
+/* The top of stack value ensures there is enough space to store 6 registers on\r
the callers stack, as some functions seem to want to do this. */\r
const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
\r
-/* \r
- * Place the prototype here to ensure the interrupt vector is correctly installed. \r
+/*\r
+ * Place the prototype here to ensure the interrupt vector is correctly installed.\r
* Note that because the interrupt is written in assembly, the IPL setting in the\r
* following line of code has no effect. The interrupt priority is set by the\r
- * call to ConfigIntTimer1() in vApplicationSetupTickTimerInterrupt(). \r
+ * call to ConfigIntTimer1() in vApplicationSetupTickTimerInterrupt().\r
*/\r
extern void __attribute__( (interrupt(ipl1), vector( configTICK_INTERRUPT_VECTOR ))) vPortTickInterruptHandler( void );\r
\r
/*\r
* The software interrupt handler that performs the yield. Note that, because\r
* the interrupt is written in assembly, the IPL setting in the following line of\r
- * code has no effect. The interrupt priority is set by the call to \r
- * mConfigIntCoreSW0() in xPortStartScheduler(). \r
+ * code has no effect. The interrupt priority is set by the call to\r
+ * mConfigIntCoreSW0() in xPortStartScheduler().\r
*/\r
void __attribute__( (interrupt(ipl1), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
- * See header file for description. \r
+/*\r
+ * See header file for description.\r
*/\r
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
\r
*pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level - no longer used. */\r
pxTopOfStack--;\r
- \r
+\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
* timer by redefining this implementation. If a different timer is used then\r
* configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to\r
* ensure the RTOS provided tick interrupt handler is installed on the correct\r
- * vector number. When Timer 1 is used the vector number is defined as \r
+ * vector number. When Timer 1 is used the vector number is defined as\r
* _TIMER_1_VECTOR.\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
\r
- OpenTimer1( ( T1_ON | T1_PS_1_8 | T1_SOURCE_INT ), ulCompareMatch );\r
- ConfigIntTimer1( T1_INT_ON | configKERNEL_INTERRUPT_PRIORITY );\r
+ T1CON = 0x0000;\r
+ T1CONbits.TCKPS = portPRESCALE_BITS;\r
+ PR1 = ulCompareMatch;\r
+ IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;\r
+\r
+ /* Clear the interrupt as a starting condition. */\r
+ IFS0bits.T1IF = 0;\r
+\r
+ /* Enable the interrupt. */\r
+ IEC0bits.T1IE = 1;\r
+\r
+ /* Start the timer. */\r
+ T1CONbits.TON = 1;\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vPortEndScheduler(void)\r
{\r
/* It is unlikely that the scheduler for the PIC port will get stopped\r
- once running. If required disable the tick interrupt here, then return \r
+ once running. If required disable the tick interrupt here, then return\r
to xPortStartScheduler(). */\r
for( ;; );\r
}\r
extern void vPortStartFirstTask( void );\r
extern void *pxCurrentTCB;\r
\r
- /* Setup the software interrupt. */\r
- mConfigIntCoreSW0( CSW_INT_ON | configKERNEL_INTERRUPT_PRIORITY | CSW_INT_SUB_PRIOR_0 );\r
+ /* Clear the software interrupt flag. */\r
+ IFS0CLR = _IFS0_CS0IF_MASK;\r
+\r
+ /* Set software timer priority. */\r
+ IPC0CLR = _IPC0_CS0IP_MASK;\r
+ IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );\r
\r
- /* Setup the timer to generate the tick. Interrupts will have been \r
+ /* Enable software interrupt. */\r
+ IEC0CLR = _IEC0_CS0IE_MASK;\r
+ IEC0SET = 1 << _IEC0_CS0IE_POSITION;\r
+\r
+ /* Setup the timer to generate the tick. Interrupts will have been\r
disabled by the time we get here. */\r
vApplicationSetupTickTimerInterrupt();\r
\r
- /* Kick off the highest priority task that has been created so far. \r
+ /* Kick off the highest priority task that has been created so far.\r
Its stack location is loaded into uxSavedTaskStackPointer. */\r
uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;\r
vPortStartFirstTask();\r
unsigned portBASE_TYPE uxSavedStatus;\r
\r
uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
- vTaskIncrementTick();\r
+ vTaskIncrementTick();\r
vPortClearInterruptMaskFromISR( uxSavedStatus );\r
- \r
+\r
/* If we are using the preemptive scheduler then we might want to select\r
a different task to execute. */\r
#if configUSE_PREEMPTION == 1\r
- SetCoreSW0();\r
+ _CP0_BIS_CAUSE( portCORE_SW_0 );\r
#endif /* configUSE_PREEMPTION */\r
\r
- /* Clear timer 0 interrupt. */\r
- mT1ClearIntFlag();\r
+ /* Clear timer 1 interrupt. */\r
+ IFS0CLR = _IFS0_T1IF_MASK;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
asm volatile ( "di" );\r
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;\r
- /* This clears the IPL bits, then sets them to \r
+ /* This clears the IPL bits, then sets them to\r
configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called\r
- from an interrupt that has a priority above \r
+ from an interrupt that has a priority above\r
configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action\r
can only result in the IPL being unchanged or raised, and therefore never\r
lowered. */\r
projects / freertos / blobdiff