/*\r
- FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
- license and Real Time Engineers Ltd. contact details.\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/*-----------------------------------------------------------\r
* Implementation of functions defined in portable.h for the PIC32MX port.\r
*----------------------------------------------------------*/\r
\r
-#ifndef __XC__\r
+#ifndef __XC\r
#error This port is designed to work with XC32. Please update your C compiler version.\r
#endif\r
\r
the first task is being restored. */\r
#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )\r
\r
+/*\r
+By default port.c generates its tick interrupt from TIMER1. The user can\r
+override this behaviour by:\r
+ 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),\r
+ which is the function that configures the timer. The function is defined\r
+ as a weak symbol in this file so if the same function name is used in the\r
+ application code then the version in the application code will be linked\r
+ into the application in preference to the version defined in this file.\r
+ 2: Define configTICK_INTERRUPT_VECTOR to the vector number of the timer used\r
+ to generate the tick interrupt. For example, when timer 1 is used then\r
+ configTICK_INTERRUPT_VECTOR is set to _TIMER_1_VECTOR.\r
+ configTICK_INTERRUPT_VECTOR should be defined in FreeRTOSConfig.h.\r
+ 3: Define configCLEAR_TICK_TIMER_INTERRUPT() to clear the interrupt in the\r
+ timer used to generate the tick interrupt. For example, when timer 1 is\r
+ used configCLEAR_TICK_TIMER_INTERRUPT() is defined to\r
+ IFS0CLR = _IFS0_T1IF_MASK.\r
+*/\r
#ifndef configTICK_INTERRUPT_VECTOR\r
#define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR\r
+ #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK\r
+#else\r
+ #ifndef configCLEAR_TICK_TIMER_INTERRUPT\r
+ #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.\r
+ #endif\r
#endif\r
\r
-/* Records the interrupt nesting depth. This starts at one as it will be\r
-decremented to 0 when the first task starts. */\r
-volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;\r
+/* Let the user override the pre-loading of the initial RA with the address of\r
+prvTaskExitError() in case is messes up unwinding of the stack in the\r
+debugger - in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */\r
+#ifdef configTASK_RETURN_ADDRESS\r
+ #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
+#else\r
+ #define portTASK_RETURN_ADDRESS prvTaskExitError\r
+#endif\r
\r
-/* Stores the task stack pointer when a switch is made to use the system stack. */\r
-unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;\r
+/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
+stack checking. A problem in the ISR stack will trigger an assert, not call the\r
+stack overflow hook function (because the stack overflow hook is specific to a\r
+task stack, not the ISR stack). */\r
+#if( configCHECK_FOR_STACK_OVERFLOW > 2 )\r
+\r
+ /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for\r
+ the task stacks, and so will legitimately appear in many positions within\r
+ the ISR stack. */\r
+ #define portISR_STACK_FILL_BYTE 0xee\r
+\r
+ static const uint8_t ucExpectedStackBytes[] = {\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \\r
+\r
+ #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )\r
+#else\r
+ /* Define the function away. */\r
+ #define portCHECK_ISR_STACK()\r
+#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */\r
\r
-/* The stack used by interrupt service routines that cause a context switch. */\r
-portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+/*-----------------------------------------------------------*/\r
\r
-/* The top of stack value ensures there is enough space to store 6 registers on\r
-the callers stack, as some functions seem to want to do this. */\r
-const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
\r
/*\r
* Place the prototype here to ensure the interrupt vector is correctly installed.\r
* following line of code has no effect. The interrupt priority is set by the\r
* call to ConfigIntTimer1() in vApplicationSetupTickTimerInterrupt().\r
*/\r
-extern void __attribute__( (interrupt(ipl1), vector( configTICK_INTERRUPT_VECTOR ))) vPortTickInterruptHandler( void );\r
+extern void __attribute__( (interrupt(IPL1AUTO), vector( configTICK_INTERRUPT_VECTOR ))) vPortTickInterruptHandler( void );\r
\r
/*\r
* The software interrupt handler that performs the yield. Note that, because\r
* code has no effect. The interrupt priority is set by the call to\r
* mConfigIntCoreSW0() in xPortStartScheduler().\r
*/\r
-void __attribute__( (interrupt(ipl1), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );\r
+void __attribute__( (interrupt(IPL1AUTO), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );\r
+\r
+/*\r
+ * Used to catch tasks that attempt to return from their implementing function.\r
+ */\r
+static void prvTaskExitError( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Records the interrupt nesting depth. This is initialised to one as it is\r
+decremented to 0 when the first task starts. */\r
+volatile UBaseType_t uxInterruptNesting = 0x01;\r
+\r
+/* Stores the task stack pointer when a switch is made to use the system stack. */\r
+UBaseType_t uxSavedTaskStackPointer = 0;\r
+\r
+/* The stack used by interrupt service routines that cause a context switch. */\r
+StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+\r
+/* The top of stack value ensures there is enough space to store 6 registers on\r
+the callers stack, as some functions seem to want to do this. */\r
+const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
/* Ensure byte alignment is maintained when leaving this function. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
+ *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();\r
+ *pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */\r
+ *pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */\r
+ *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */\r
+ *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */\r
pxTopOfStack -= 15;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */\r
- pxTopOfStack -= 14;\r
-\r
- *pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level - no longer used. */\r
- pxTopOfStack--;\r
+ *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */\r
+ pxTopOfStack -= 15;\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
+static void prvTaskExitError( void )\r
+{\r
+ /* A function that implements a task must not exit or attempt to return to\r
+ its caller as there is nothing to return to. If a task wants to exit it\r
+ should instead call vTaskDelete( NULL ).\r
+\r
+ Artificially force an assert() to be triggered if configASSERT() is\r
+ defined, then stop here so application writers can catch the error. */\r
+ configASSERT( uxSavedTaskStackPointer == 0UL );\r
+ portDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
/*\r
* Setup a timer for a regular tick. This function uses peripheral timer 1.\r
* The function is declared weak so an application writer can use a different\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
\r
T1CON = 0x0000;\r
T1CONbits.TCKPS = portPRESCALE_BITS;\r
\r
void vPortEndScheduler(void)\r
{\r
- /* It is unlikely that the scheduler for the PIC port will get stopped\r
- once running. If required disable the tick interrupt here, then return\r
- to xPortStartScheduler(). */\r
- for( ;; );\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxInterruptNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
extern void *pxCurrentTCB;\r
\r
+ #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )\r
+ {\r
+ /* Fill the ISR stack to make it easy to asses how much is being used. */\r
+ memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );\r
+ }\r
+ #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */\r
+\r
/* Clear the software interrupt flag. */\r
IFS0CLR = _IFS0_CS0IF_MASK;\r
\r
\r
/* Kick off the highest priority task that has been created so far.\r
Its stack location is loaded into uxSavedTaskStackPointer. */\r
- uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;\r
+ uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;\r
vPortStartFirstTask();\r
\r
- /* Should never get here as the tasks will now be executing. */\r
+ /* Should never get here as the tasks will now be executing! Call the task\r
+ exit error function to prevent compiler warnings about a static function\r
+ not being called in the case that the application writer overrides this\r
+ functionality by defining configTASK_RETURN_ADDRESS. */\r
+ prvTaskExitError();\r
+\r
return pdFALSE;\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vPortIncrementTick( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatus;\r
+UBaseType_t uxSavedStatus;\r
\r
uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
- vTaskIncrementTick();\r
+ {\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
+ /* Pend a context switch. */\r
+ _CP0_BIS_CAUSE( portCORE_SW_0 );\r
+ }\r
+ }\r
vPortClearInterruptMaskFromISR( uxSavedStatus );\r
\r
- /* If we are using the preemptive scheduler then we might want to select\r
- a different task to execute. */\r
- #if configUSE_PREEMPTION == 1\r
- _CP0_BIS_CAUSE( portCORE_SW_0 );\r
- #endif /* configUSE_PREEMPTION */\r
+ /* Look for the ISR stack getting near or past its limit. */\r
+ portCHECK_ISR_STACK();\r
\r
- /* Clear timer 1 interrupt. */\r
- IFS0CLR = _IFS0_T1IF_MASK;\r
+ /* Clear timer interrupt. */\r
+ configCLEAR_TICK_TIMER_INTERRUPT();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )\r
+UBaseType_t uxPortSetInterruptMaskFromISR( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatusRegister;\r
+UBaseType_t uxSavedStatusRegister;\r
\r
- asm volatile ( "di" );\r
+ __builtin_disable_interrupts();\r
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;\r
/* This clears the IPL bits, then sets them to\r
configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )\r
+void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )\r
{\r
_CP0_SET_STATUS( uxSavedStatusRegister );\r
}\r
projects / freertos / blobdiff