/*\r
- FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
- \r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
- \r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong? *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest information, \r
- license and contact details.\r
- \r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
-\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
-*/\r
- \r
-#include <p32xxxx.h>\r
+ * FreeRTOS Kernel V10.2.1\r
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
+\r
+#include <xc.h>\r
#include <sys/asm.h>\r
#include "ISR_Support.h"\r
- \r
+\r
\r
.set nomips16\r
.set noreorder\r
- \r
+\r
.extern pxCurrentTCB\r
.extern vTaskSwitchContext\r
.extern vPortIncrementTick\r
.extern xISRStackTop\r
- \r
+\r
.global vPortStartFirstTask\r
.global vPortYieldISR\r
- .global vT1InterruptHandler\r
+ .global vPortTickInterruptHandler\r
\r
\r
/******************************************************************/\r
\r
.set noreorder\r
.set noat\r
- .ent vT1InterruptHandler\r
- \r
-vT1InterruptHandler:\r
+ .ent vPortTickInterruptHandler\r
+\r
+vPortTickInterruptHandler:\r
\r
portSAVE_CONTEXT\r
\r
\r
portRESTORE_CONTEXT\r
\r
- .end vT1InterruptHandler\r
+ .end vPortTickInterruptHandler\r
\r
/******************************************************************/\r
\r
.set noreorder\r
.set noat\r
- .ent xPortStartScheduler\r
+ .ent vPortStartFirstTask\r
\r
vPortStartFirstTask:\r
\r
created so far. */\r
portRESTORE_CONTEXT\r
\r
- .end xPortStartScheduler\r
+ .end vPortStartFirstTask\r
\r
\r
\r
/*******************************************************************/\r
\r
- .set noreorder\r
+ .set noreorder\r
.set noat\r
- .ent vPortYieldISR\r
+ .ent vPortYieldISR\r
\r
vPortYieldISR:\r
\r
- /* Make room for the context. First save the current status so we can \r
- manipulate it, and the cause and EPC registers so we capture their \r
- original values in case of interrupt nesting. */\r
- mfc0 k0, _CP0_CAUSE\r
- addiu sp, sp, -portCONTEXT_SIZE\r
+ /* Make room for the context. First save the current status so it can be\r
+ manipulated. */\r
+ addiu sp, sp, -portCONTEXT_SIZE\r
mfc0 k1, _CP0_STATUS\r
\r
- /* Also save s6 and s5 so we can use them during this interrupt. Any\r
- nesting interrupts should maintain the values of these registers\r
- across the ISR. */\r
+ /* Also save s6 and s5 so they can be used. Any nesting interrupts should\r
+ maintain the values of these registers across the ISR. */\r
sw s6, 44(sp)\r
sw s5, 40(sp)\r
sw k1, portSTATUS_STACK_LOCATION(sp)\r
\r
- /* Enable interrupts above the current priority. */\r
- srl k0, k0, 0xa\r
- ins k1, k0, 10, 6\r
+ /* Prepare to re-enabled interrupt above the kernel priority. */\r
+ ins k1, zero, 10, 6\r
+ ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )\r
ins k1, zero, 1, 4\r
\r
/* s5 is used as the frame pointer. */\r
after interrupts are enabled. */\r
mfc0 s6, _CP0_EPC\r
\r
- /* Re-enable interrupts. */\r
+ /* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
mtc0 k1, _CP0_STATUS\r
\r
/* Save the context into the space just created. s6 is saved again\r
here as it now contains the EPC value. */\r
- sw ra, 120(s5)\r
+ sw ra, 120(s5)\r
sw s8, 116(s5)\r
sw t9, 112(s5)\r
- sw t8, 108(s5)\r
- sw t7, 104(s5)\r
+ sw t8, 108(s5)\r
+ sw t7, 104(s5)\r
sw t6, 100(s5)\r
sw t5, 96(s5)\r
sw t4, 92(s5)\r
sw s7, 48(s5)\r
sw s6, portEPC_STACK_LOCATION(s5)\r
/* s5 and s6 has already been saved. */\r
- sw s4, 36(s5)\r
+ sw s4, 36(s5)\r
sw s3, 32(s5)\r
sw s2, 28(s5)\r
sw s1, 24(s5)\r
is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever\r
raise the IPL value and never lower it. */\r
di\r
+ ehb\r
mfc0 s7, _CP0_STATUS\r
- ins s7, $0, 10, 6\r
+ ins s7, zero, 10, 6\r
ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1\r
\r
- /* This mtc0 re-enables interrupts, but only above \r
+ /* This mtc0 re-enables interrupts, but only above\r
configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
mtc0 s6, _CP0_STATUS\r
+ ehb\r
\r
/* Clear the software interrupt in the core. */\r
mfc0 s6, _CP0_CAUSE\r
- addiu s4,zero,-257\r
- and s6, s6, s4\r
+ ins s6, zero, 8, 1\r
mtc0 s6, _CP0_CAUSE\r
+ ehb\r
\r
/* Clear the interrupt in the interrupt controller. */\r
la s6, IFS0CLR\r
\r
/* Clear the interrupt mask again. The saved status value is still in s7. */\r
mtc0 s7, _CP0_STATUS\r
+ ehb\r
\r
/* Restore the stack pointer from the TCB. */\r
la s0, pxCurrentTCB\r
\r
/* Protect access to the k registers, and others. */\r
di\r
+ ehb\r
\r
/* Set nesting back to zero. As the lowest priority interrupt this\r
interrupt cannot have nested. */\r
lw k0, portEPC_STACK_LOCATION(sp)\r
\r
/* Remove stack frame. */\r
- addiu sp, sp, portCONTEXT_SIZE\r
+ addiu sp, sp, portCONTEXT_SIZE\r
\r
- mtc0 k1, _CP0_STATUS \r
+ mtc0 k1, _CP0_STATUS\r
mtc0 k0, _CP0_EPC\r
ehb\r
- eret \r
+ eret\r
nop\r
\r
.end vPortYieldISR\r
projects / freertos / blobdiff