]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
Update version number in readiness for V10.3.0 release. Sync SVN with reviewed releas...
[freertos] / FreeRTOS / Source / portable / MPLAB / PIC32MX / portmacro.h
index 1df0ffee2cb3ef56fba889d04b3734a947cd6e28..3bf8c85ce0ea456db1a97aa6516651b258427c78 100644 (file)
@@ -1,66 +1,29 @@
 /*\r
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
-    ***************************************************************************\r
-     *                                                                       *\r
-     *    FreeRTOS provides completely free yet professionally developed,    *\r
-     *    robust, strictly quality controlled, supported, and cross          *\r
-     *    platform software that has become a de facto standard.             *\r
-     *                                                                       *\r
-     *    Help yourself get started quickly and support the FreeRTOS         *\r
-     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
-     *                                                                       *\r
-     *    Thank you!                                                         *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-    This file is part of the FreeRTOS distribution.\r
-\r
-    FreeRTOS is free software; you can redistribute it and/or modify it under\r
-    the terms of the GNU General Public License (version 2) as published by the\r
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
-\r
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
-    link: http://www.freertos.org/a00114.html\r
-\r
-    1 tab == 4 spaces!\r
-\r
-    ***************************************************************************\r
-     *                                                                       *\r
-     *    Having a problem?  Start by reading the FAQ "My application does   *\r
-     *    not run, what could be wrong?"                                     *\r
-     *                                                                       *\r
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
-    license and Real Time Engineers Ltd. contact details.\r
-\r
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
-    licenses offer ticketed support, indemnification and middleware.\r
-\r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
-    engineered and independently SIL3 certified version for use in safety and\r
-    mission critical applications that require provable dependability.\r
-\r
-    1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
 \r
 #ifndef PORTMACRO_H\r
 #define PORTMACRO_H\r
@@ -73,7 +36,7 @@ extern "C" {
 #endif\r
 \r
 /*-----------------------------------------------------------\r
- * Port specific definitions.  \r
+ * Port specific definitions.\r
  *\r
  * The settings in this file configure FreeRTOS correctly for the\r
  * given hardware and compiler.\r
@@ -88,22 +51,30 @@ extern "C" {
 #define portDOUBLE             double\r
 #define portLONG               long\r
 #define portSHORT              short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
 #define portBASE_TYPE  long\r
 \r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
 #if( configUSE_16_BIT_TICKS == 1 )\r
-       typedef unsigned portSHORT portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffff\r
+       typedef uint16_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffff\r
 #else\r
-       typedef unsigned long portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+       typedef uint32_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+       /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
+       not need to be guarded with a critical section. */\r
+       #define portTICK_TYPE_IS_ATOMIC 1\r
 #endif\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Hardware specifics. */\r
 #define portBYTE_ALIGNMENT                     8\r
 #define portSTACK_GROWTH                       -1\r
-#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
+#define portTICK_PERIOD_MS                     ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Critical section management. */\r
@@ -111,24 +82,24 @@ extern "C" {
 #define portALL_IPL_BITS                       ( 0x3fUL << portIPL_SHIFT )\r
 #define portSW0_BIT                                    ( 0x01 << 8 )\r
 \r
-/* This clears the IPL bits, then sets them to \r
-configMAX_SYSCALL_INTERRUPT_PRIORITY.          An extra check is performed if \r
-configASSERT() is defined to ensure an assertion handler does not inadvertently \r
-attempt to lower the IPL when the call to assert was triggered because the IPL \r
-value was found to be above    configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
+/* This clears the IPL bits, then sets them to\r
+configMAX_SYSCALL_INTERRUPT_PRIORITY.  An extra check is performed if\r
+configASSERT() is defined to ensure an assertion handler does not inadvertently\r
+attempt to lower the IPL when the call to assert was triggered because the IPL\r
+value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
 safe FreeRTOS API function was executed.  ISR safe FreeRTOS API functions are\r
 those that end in FromISR.  FreeRTOS maintains a separate interrupt API to\r
 ensure API function and interrupt entry is as fast and as simple as possible. */\r
 #ifdef configASSERT\r
        #define portDISABLE_INTERRUPTS()                                                                                        \\r
        {                                                                                                                                                       \\r
-       unsigned long ulStatus;                                                                                                         \\r
+       uint32_t ulStatus;                                                                                                              \\r
                                                                                                                                                                \\r
                /* Mask interrupts at and below the kernel interrupt priority. */               \\r
                ulStatus = _CP0_GET_STATUS();                                                                                   \\r
                                                                                                                                                                \\r
                /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */    \\r
-               if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY )       \\r
+               if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \\r
                {                                                                                                                                               \\r
                        ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
                        _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
@@ -137,7 +108,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
 #else /* configASSERT */\r
        #define portDISABLE_INTERRUPTS()                                                                                \\r
        {                                                                                                                                               \\r
-       unsigned long ulStatus;                                                                                                 \\r
+       uint32_t ulStatus;                                                                                                      \\r
                                                                                                                                                        \\r
                /* Mask interrupts at and below the kernel interrupt priority. */       \\r
                ulStatus = _CP0_GET_STATUS();                                                                           \\r
@@ -148,7 +119,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
 \r
 #define portENABLE_INTERRUPTS()                                                                                        \\r
 {                                                                                                                                              \\r
-unsigned long ulStatus;                                                                                                        \\r
+uint32_t ulStatus;                                                                                                     \\r
                                                                                                                                                \\r
        /* Unmask all interrupts. */                                                                            \\r
        ulStatus = _CP0_GET_STATUS();                                                                           \\r
@@ -163,11 +134,15 @@ extern void vTaskExitCritical( void );
 #define portENTER_CRITICAL()           vTaskEnterCritical()\r
 #define portEXIT_CRITICAL()                    vTaskExitCritical()\r
 \r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
 \r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+       #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 \r
        /* Check the configuration. */\r
@@ -181,7 +156,7 @@ extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
 \r
        /*-----------------------------------------------------------*/\r
 \r
-       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )\r
+       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )\r
 \r
 #endif /* taskRECORD_READY_PRIORITY */\r
 \r
@@ -191,7 +166,7 @@ extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
 \r
 #define portYIELD()                                                            \\r
 {                                                                                              \\r
-unsigned long ulCause;                                                 \\r
+uint32_t ulCause;                                                      \\r
                                                                                                \\r
        /* Trigger software interrupt. */                       \\r
        ulCause = _CP0_GET_CAUSE();                                     \\r
@@ -199,13 +174,10 @@ unsigned long ulCause;                                                    \
        _CP0_SET_CAUSE( ulCause );                                      \\r
 }\r
 \r
-#ifdef configASSERT\r
-       #define portCURRENT_INTERRUPT_PRIORITY ( ( _CP0_GET_STATUS() & portALL_IPL_BITS ) >> portIPL_SHIFT )\r
-       #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( portCURRENT_INTERRUPT_PRIORITY <= configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
-#endif /* configASSERT */\r
-\r
+extern volatile UBaseType_t uxInterruptNesting;\r
+#define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )\r
 \r
-#define portNOP()      asm volatile (  "nop" )\r
+#define portNOP()      __asm volatile ( "nop" )\r
 \r
 /*-----------------------------------------------------------*/\r
 \r