]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISE...
[freertos] / FreeRTOS / Source / portable / MPLAB / PIC32MX / portmacro.h
index 8332c53805ee33f8e7b2ac58f289ea73b715980c..4a9a12c70f467752a48333b5052ad066a69c78e2 100644 (file)
@@ -1,48 +1,38 @@
 /*\r
-    FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+    All rights reserved\r
 \r
-    FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
-    http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
     ***************************************************************************\r
      *                                                                       *\r
-     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
-     *    Complete, revised, and edited pdf reference manuals are also       *\r
-     *    available.                                                         *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r
      *                                                                       *\r
-     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
-     *    ensuring you get running as quickly as possible and with an        *\r
-     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
-     *    the FreeRTOS project to continue with its mission of providing     *\r
-     *    professional grade, cross platform, de facto standard solutions    *\r
-     *    for microcontrollers - completely free of charge!                  *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
      *                                                                       *\r
-     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
-     *                                                                       *\r
-     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
+     *    Thank you!                                                         *\r
      *                                                                       *\r
     ***************************************************************************\r
 \r
-\r
     This file is part of the FreeRTOS distribution.\r
 \r
     FreeRTOS is free software; you can redistribute it and/or modify it under\r
     the terms of the GNU General Public License (version 2) as published by the\r
-    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
-    distribute a combined work that includes FreeRTOS without being obliged to\r
-    provide the source code for proprietary components outside of the FreeRTOS\r
-    kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
-    FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
-    details. You should have received a copy of the GNU General Public License\r
-    and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
-    viewed here: http://www.freertos.org/a00114.html and also obtained by\r
-    writing to Real Time Engineers Ltd., contact details for whom are available\r
-    on the FreeRTOS WEB site.\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r
 \r
     1 tab == 4 spaces!\r
 \r
      *                                                                       *\r
     ***************************************************************************\r
 \r
-\r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
-    including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
-    fully thread aware and reentrant UDP/IP stack.\r
-\r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
-    indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
 */\r
 \r
 #ifndef PORTMACRO_H\r
@@ -83,7 +74,7 @@ extern "C" {
 #endif\r
 \r
 /*-----------------------------------------------------------\r
- * Port specific definitions.  \r
+ * Port specific definitions.\r
  *\r
  * The settings in this file configure FreeRTOS correctly for the\r
  * given hardware and compiler.\r
@@ -98,22 +89,26 @@ extern "C" {
 #define portDOUBLE             double\r
 #define portLONG               long\r
 #define portSHORT              short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
 #define portBASE_TYPE  long\r
 \r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
 #if( configUSE_16_BIT_TICKS == 1 )\r
-       typedef unsigned portSHORT portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffff\r
+       typedef uint16_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffff\r
 #else\r
-       typedef unsigned long portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+       typedef uint32_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 #endif\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Hardware specifics. */\r
 #define portBYTE_ALIGNMENT                     8\r
 #define portSTACK_GROWTH                       -1\r
-#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
+#define portTICK_PERIOD_MS                     ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Critical section management. */\r
@@ -121,24 +116,24 @@ extern "C" {
 #define portALL_IPL_BITS                       ( 0x3fUL << portIPL_SHIFT )\r
 #define portSW0_BIT                                    ( 0x01 << 8 )\r
 \r
-/* This clears the IPL bits, then sets them to \r
-configMAX_SYSCALL_INTERRUPT_PRIORITY.          An extra check is performed if \r
-configASSERT() is defined to ensure an assertion handler does not inadvertently \r
-attempt to lower the IPL when the call to assert was triggered because the IPL \r
-value was found to be above    configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
+/* This clears the IPL bits, then sets them to\r
+configMAX_SYSCALL_INTERRUPT_PRIORITY.  An extra check is performed if\r
+configASSERT() is defined to ensure an assertion handler does not inadvertently\r
+attempt to lower the IPL when the call to assert was triggered because the IPL\r
+value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
 safe FreeRTOS API function was executed.  ISR safe FreeRTOS API functions are\r
 those that end in FromISR.  FreeRTOS maintains a separate interrupt API to\r
 ensure API function and interrupt entry is as fast and as simple as possible. */\r
 #ifdef configASSERT\r
        #define portDISABLE_INTERRUPTS()                                                                                        \\r
        {                                                                                                                                                       \\r
-       unsigned long ulStatus;                                                                                                         \\r
+       uint32_t ulStatus;                                                                                                              \\r
                                                                                                                                                                \\r
                /* Mask interrupts at and below the kernel interrupt priority. */               \\r
                ulStatus = _CP0_GET_STATUS();                                                                                   \\r
                                                                                                                                                                \\r
                /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */    \\r
-               if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY )       \\r
+               if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \\r
                {                                                                                                                                               \\r
                        ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
                        _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
@@ -147,7 +142,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
 #else /* configASSERT */\r
        #define portDISABLE_INTERRUPTS()                                                                                \\r
        {                                                                                                                                               \\r
-       unsigned long ulStatus;                                                                                                 \\r
+       uint32_t ulStatus;                                                                                                      \\r
                                                                                                                                                        \\r
                /* Mask interrupts at and below the kernel interrupt priority. */       \\r
                ulStatus = _CP0_GET_STATUS();                                                                           \\r
@@ -158,7 +153,7 @@ ensure API function and interrupt entry is as fast and as simple as possible. */
 \r
 #define portENABLE_INTERRUPTS()                                                                                        \\r
 {                                                                                                                                              \\r
-unsigned long ulStatus;                                                                                                        \\r
+uint32_t ulStatus;                                                                                                     \\r
                                                                                                                                                \\r
        /* Unmask all interrupts. */                                                                            \\r
        ulStatus = _CP0_GET_STATUS();                                                                           \\r
@@ -173,11 +168,15 @@ extern void vTaskExitCritical( void );
 #define portENTER_CRITICAL()           vTaskEnterCritical()\r
 #define portEXIT_CRITICAL()                    vTaskExitCritical()\r
 \r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
 \r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+       #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 \r
        /* Check the configuration. */\r
@@ -201,7 +200,7 @@ extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );
 \r
 #define portYIELD()                                                            \\r
 {                                                                                              \\r
-unsigned long ulCause;                                                 \\r
+uint32_t ulCause;                                                      \\r
                                                                                                \\r
        /* Trigger software interrupt. */                       \\r
        ulCause = _CP0_GET_CAUSE();                                     \\r
@@ -209,13 +208,10 @@ unsigned long ulCause;                                                    \
        _CP0_SET_CAUSE( ulCause );                                      \\r
 }\r
 \r
-#ifdef configASSERT\r
-       #define portCURRENT_INTERRUPT_PRIORITY ( ( _CP0_GET_STATUS() & portALL_IPL_BITS ) >> portIPL_SHIFT )\r
-       #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( portCURRENT_INTERRUPT_PRIORITY <= configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
-#endif /* configASSERT */\r
-\r
+extern volatile UBaseType_t uxInterruptNesting;\r
+#define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )\r
 \r
-#define portNOP()      asm volatile (  "nop" )\r
+#define portNOP()      __asm volatile ( "nop" )\r
 \r
 /*-----------------------------------------------------------*/\r
 \r