/*\r
- FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
/*-----------------------------------------------------------\r
* Implementation of functions defined in portable.h for the PIC32MZ port.\r
*----------------------------------------------------------*/\r
\r
+/* Microchip specific headers. */\r
#include <xc.h>\r
\r
+/* Standard headers. */\r
+#include <string.h>\r
+\r
/* Scheduler include files. */\r
#include "FreeRTOS.h"\r
#include "task.h"\r
#define portIE_BIT ( 0x00000001 )\r
#define portEXL_BIT ( 0x00000002 )\r
#define portMX_BIT ( 0x01000000 ) /* Allow access to DSP instructions. */\r
+#define portCU1_BIT ( 0x20000000 ) /* enable CP1 for parts with hardware. */\r
+#define portFR_BIT ( 0x04000000 ) /* Enable 64 bit floating point registers. */\r
\r
/* Bits within the CAUSE register. */\r
#define portCORE_SW_0 ( 0x00000100 )\r
\r
/* The EXL bit is set to ensure interrupts do not occur while the context of\r
the first task is being restored. */\r
-#define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )\r
+#if ( __mips_hard_float == 1 )\r
+ #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT | portFR_BIT | portCU1_BIT )\r
+#else\r
+ #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )\r
+#endif\r
+\r
+/* The initial value to store into the FPU status and control register. This is\r
+ only used on parts that support a hardware FPU. */\r
+#define portINITIAL_FPSCR (0x1000000) /* High perf on denormal ops */\r
+\r
\r
/*\r
By default port.c generates its tick interrupt from TIMER1. The user can\r
#endif\r
\r
/* Let the user override the pre-loading of the initial RA with the address of\r
-prvTaskExitError() in case is messes up unwinding of the stack in the\r
+prvTaskExitError() in case it messes up unwinding of the stack in the\r
debugger - in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */\r
#ifdef configTASK_RETURN_ADDRESS\r
#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
UBaseType_t uxSavedTaskStackPointer = 0;\r
\r
/* The stack used by interrupt service routines that cause a context switch. */\r
-StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+__attribute__ ((aligned(8))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
\r
/* The top of stack value ensures there is enough space to store 6 registers on\r
-the callers stack, as some functions seem to want to do this. */\r
-const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
+the callers stack, as some functions seem to want to do this. 8 byte alignment\r
+is required to allow double word floating point stack pushes generated by the\r
+compiler. */\r
+const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );\r
+\r
+/* Saved as part of the task context. Set to pdFALSE if the task does not\r
+ require an FPU context. */\r
+#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )\r
+ uint32_t ulTaskHasFPUContext = 0;\r
+#endif\r
\r
/*-----------------------------------------------------------*/\r
\r
*/\r
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
- /* Ensure byte alignment is maintained when leaving this function. */\r
+ /* Ensure 8 byte alignment is maintained when leaving this function. */\r
+ pxTopOfStack--;\r
pxTopOfStack--;\r
\r
*pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
*pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */\r
- pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */\r
+ pxTopOfStack--;\r
\r
*pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */\r
- pxTopOfStack--;\r
+ pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */\r
\r
*pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */\r
pxTopOfStack -= 15;\r
*pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */\r
pxTopOfStack -= 15;\r
\r
+ *pxTopOfStack = (StackType_t) pdFALSE; /*by default disable FPU context save on parts with FPU */\r
+\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1UL;\r
\r
T1CON = 0x0000;\r
T1CONbits.TCKPS = portPRESCALE_BITS;\r
}\r
/*-----------------------------------------------------------*/\r
\r
+#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )\r
+\r
+ void vPortTaskUsesFPU(void)\r
+ {\r
+ extern void vPortInitialiseFPSCR( uint32_t uxFPSCRInit );\r
+\r
+ portENTER_CRITICAL();\r
+\r
+ /* Initialise the floating point status register. */\r
+ vPortInitialiseFPSCR(portINITIAL_FPSCR);\r
+\r
+ /* A task is registering the fact that it needs a FPU context. Set the\r
+ FPU flag (saved as part of the task context). */\r
+ ulTaskHasFPUContext = pdTRUE;\r
+\r
+ portEXIT_CRITICAL();\r
+ }\r
+\r
+#endif /* __mips_hard_float == 1 */\r
+\r
+/*-----------------------------------------------------------*/\r
\r
\r
\r