/*\r
- FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
the terms of the GNU General Public License (version 2) as published by the\r
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
#include "task.h"\r
\r
/* Constants required to setup the initial task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/*-----------------------------------------------------------*/\r
\r
track of the critical section nesting. This variable has to be stored\r
as part of the task context and must be initialised to a non zero value. */\r
\r
-#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )\r
-volatile unsigned portLONG ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
/* Setup the initial stack of the task. The stack is set exactly as \r
expected by the portRESTORE_CONTEXT() macro.\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. */\r
prvSetupTimerInterrupt();\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned portLONG ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
\r
/* A 1ms tick does not require the use of the timer prescale. This is\r
defaulted to zero but can be used if necessary. */\r
scheduler is being used. */\r
#if configUSE_PREEMPTION == 1\r
{ \r
- VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vPreemptiveTick;\r
}\r
#else\r
{\r
- VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick;\r
}\r
#endif\r
\r
projects / freertos / blobdiff