/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.2.1\r
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
/*-----------------------------------------------------------\r
* Implementation of functions defined in portable.h for the ARM CM0 port.\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11..R4. */\r
\r
return pxTopOfStack;\r
static void prvTaskExitError( void )\r
{\r
/* A function that implements a task must not exit or attempt to return to\r
- its caller as there is nothing to return to. If a task wants to exit it \r
+ its caller as there is nothing to return to. If a task wants to exit it\r
should instead call vTaskDelete( NULL ).\r
- \r
- Artificially force an assert() to be triggered if configASSERT() is \r
+\r
+ Artificially force an assert() to be triggered if configASSERT() is\r
defined, then stop here so application writers can catch the error. */\r
configASSERT( uxCriticalNesting == ~0UL );\r
- portDISABLE_INTERRUPTS(); \r
+ portDISABLE_INTERRUPTS();\r
for( ;; );\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vPortSVCHandler( void )\r
{\r
- /* This function is no longer used, but retained for backward \r
+ /* This function is no longer used, but retained for backward\r
compatibility. */\r
}\r
/*-----------------------------------------------------------*/\r
__asm void prvPortStartFirstTask( void )\r
{\r
extern pxCurrentTCB;\r
- \r
+\r
PRESERVE8\r
- \r
+\r
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
table offset register that can be used to locate the initial stack value.\r
Not all M0 parts have the application vector table at address 0. */\r
- \r
+\r
ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */\r
- ldr r1, [r3] \r
+ ldr r1, [r3]\r
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */\r
adds r0, #32 /* Discard everything up to r0. */\r
msr psp, r0 /* This is now the new top of stack to use in the task. */\r
movs r0, #2 /* Switch to the psp stack. */\r
msr CONTROL, r0\r
+ isb\r
pop {r0-r5} /* Pop the registers that are saved automatically. */\r
mov lr, r5 /* lr is now in r5. */\r
+ pop {r3} /* The return address is now in r3. */\r
+ pop {r2} /* Pop and discard the XPSR. */\r
cpsie i /* The first task has its context and interrupts can be enabled. */\r
- pop {pc} /* Finally, pop the PC to jump to the user defined task code. */\r
+ bx r3 /* Finally, jump to the user defined task code. */\r
\r
ALIGN\r
}\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
- /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
+ /* Make PendSV, CallSV and SysTick the same priority as the kernel. */\r
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
\r
\r
void vPortEndScheduler( void )\r
{\r
- /* It is unlikely that the CM0 port will require this function as there\r
- is nothing to return to. */\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxCriticalNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
void vPortExitCritical( void )\r
{\r
+ configASSERT( uxCriticalNesting );\r
uxCriticalNesting--;\r
if( uxCriticalNesting == 0 )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long ulSetInterruptMaskFromISR( void )\r
+__asm uint32_t ulSetInterruptMaskFromISR( void )\r
{\r
mrs r0, PRIMASK\r
cpsid i\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm void vClearInterruptMaskFromISR( unsigned long ulMask )\r
+__asm void vClearInterruptMaskFromISR( uint32_t ulMask )\r
{\r
msr PRIMASK, r0\r
bx lr\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulPreviousMask;\r
+uint32_t ulPreviousMask;\r
\r
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
*/\r
void prvSetupTimerInterrupt( void )\r
{\r
+ /* Stop and reset the SysTick. */\r
+ *(portNVIC_SYSTICK_CTRL) = 0UL;\r
+ *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;\r
+\r
/* Configure SysTick to interrupt at the requested rate. */\r
*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
projects / freertos / blobdiff