]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
Prepare for V7.3.0 release.
[freertos] / FreeRTOS / Source / portable / RVDS / ARM_CM3 / port.c
index 20a2fce4300c52e72b6a7ae16be74022bef3ce80..2bdcd8f9d24faf0cee31328ddf5f3042dc880e00 100644 (file)
@@ -1,6 +1,8 @@
 /*\r
-    FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
-       \r
+    FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+    FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
+    http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
     ***************************************************************************\r
      *                                                                       *\r
     ***************************************************************************\r
      *                                                                       *\r
      *    Having a problem?  Start by reading the FAQ "My application does   *\r
-     *    not run, what could be wrong?                                      *\r
+     *    not run, what could be wrong?"                                     *\r
      *                                                                       *\r
      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
      *                                                                       *\r
     ***************************************************************************\r
 \r
     \r
-    http://www.FreeRTOS.org - Documentation, training, latest information, \r
-    license and contact details.\r
+    http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+    and contact details.  \r
     \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool.\r
        #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html\r
 #endif\r
 \r
-/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL          ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD          ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL                      ( ( volatile unsigned long *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2                       ( ( volatile unsigned long *) 0xe000ed20 )\r
-#define portNVIC_SYSTICK_CLK           0x00000004\r
-#define portNVIC_SYSTICK_INT           0x00000002\r
-#define portNVIC_SYSTICK_ENABLE                0x00000001\r
-#define portNVIC_PENDSVSET                     0x10000000\r
-#define portNVIC_PENDSV_PRI                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
-#define portNVIC_SYSTICK_PRI           ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+#ifndef configSYSTICK_CLOCK_HZ\r
+       #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ\r
+       #if configUSE_TICKLESS_IDLE == 1\r
+               static const unsigned long ulStoppedTimerCompensation = 45UL;\r
+       #endif\r
+#else /* configSYSTICK_CLOCK_HZ */\r
+       #if configUSE_TICKLESS_IDLE == 1\r
+               /* Assumes the SysTick clock is slower than the CPU clock. */\r
+               static const unsigned long ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );\r
+       #endif\r
+#endif /* configSYSTICK_CLOCK_HZ */\r
+\r
+/* Constants required to manipulate the core.  Registers first... */\r
+#define portNVIC_SYSTICK_CTRL_REG                      ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG                      ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG     ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
+#define portNVIC_INT_CTRL_REG                          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_SYSPRI2_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+/* ...then bits in the registers. */\r
+#define portNVIC_SYSTICK_CLK_BIT                       ( 1UL << 2UL )\r
+#define portNVIC_SYSTICK_INT_BIT                       ( 1UL << 1UL )\r
+#define portNVIC_SYSTICK_ENABLE_BIT                    ( 1UL << 0UL )\r
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT                ( 1UL << 16UL )\r
+#define portNVIC_PENDSVSET_BIT                         ( 1UL << 28UL )\r
+#define portNVIC_PENDSVCLEAR_BIT                       ( 1UL << 27UL )\r
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT                ( 1UL << 25UL )\r
+\r
+#define portNVIC_PENDSV_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI                           ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
 \r
 /* Constants required to set up the initial stack. */\r
 #define portINITIAL_XPSR                       ( 0x01000000 )\r
 variable. */\r
 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 \r
-/* \r
+/*\r
  * Setup the timer to generate the tick interrupts.\r
  */\r
 static void prvSetupTimerInterrupt( void );\r
@@ -114,12 +134,27 @@ void vPortSVCHandler( void );
 /*\r
  * Start first task is a separate function so it can be tested in isolation.\r
  */\r
-void vPortStartFirstTask( void );\r
+static void prvStartFirstTask( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The number of SysTick increments that make up one tick period.\r
+ */\r
+static unsigned long ulTimerReloadValueForOneTick = 0;\r
+\r
+/*\r
+ * The maximum number of tick periods that can be suppressed is limited by the\r
+ * 24 bit resolution of the SysTick timer.\r
+ */\r
+#if configUSE_TICKLESS_IDLE == 1\r
+       static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+#endif /* configUSE_TICKLESS_IDLE */\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
-/* \r
- * See header file for description. \r
+/*\r
+ * See header file for description.\r
  */\r
 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 {\r
@@ -143,19 +178,19 @@ __asm void vPortSVCHandler( void )
 {\r
        PRESERVE8\r
 \r
-       ldr     r3, =pxCurrentTCB               /* Restore the context. */\r
-       ldr r1, [r3]                            /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
-       ldr r0, [r1]                            /* The first item in pxCurrentTCB is the task top of stack. */\r
+       ldr     r3, =pxCurrentTCB       /* Restore the context. */\r
+       ldr r1, [r3]                    /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
+       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
        ldmia r0!, {r4-r11}             /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
-       msr psp, r0                                     /* Restore the task stack pointer. */\r
+       msr psp, r0                             /* Restore the task stack pointer. */\r
        mov r0, #0\r
        msr     basepri, r0\r
-       orr r14, #0xd                           \r
-       bx r14                                          \r
+       orr r14, #0xd\r
+       bx r14\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-__asm void vPortStartFirstTask( void )\r
+__asm void prvStartFirstTask( void )\r
 {\r
        PRESERVE8\r
 \r
@@ -173,24 +208,24 @@ __asm void vPortStartFirstTask( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-/* \r
- * See header file for description. \r
+/*\r
+ * See header file for description.\r
  */\r
 portBASE_TYPE xPortStartScheduler( void )\r
 {\r
-       /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
-       *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
-       *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
+       /* Make PendSV, CallSV and SysTick the same priority as the kernel. */\r
+       portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;\r
+       portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;\r
 \r
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
        here already. */\r
        prvSetupTimerInterrupt();\r
-       \r
+\r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
 \r
        /* Start the first task. */\r
-       vPortStartFirstTask();\r
+       prvStartFirstTask();\r
 \r
        /* Should not get here! */\r
        return 0;\r
@@ -207,7 +242,7 @@ void vPortEndScheduler( void )
 void vPortYieldFromISR( void )\r
 {\r
        /* Set a PendSV to request a context switch. */\r
-       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -236,26 +271,26 @@ __asm void xPortPendSVHandler( void )
 \r
        PRESERVE8\r
 \r
-       mrs r0, psp                                              \r
+       mrs r0, psp\r
 \r
-       ldr     r3, =pxCurrentTCB                        /* Get the location of the current TCB. */\r
-       ldr     r2, [r3]                                                \r
+       ldr     r3, =pxCurrentTCB               /* Get the location of the current TCB. */\r
+       ldr     r2, [r3]\r
 \r
-       stmdb r0!, {r4-r11}                              /* Save the remaining registers. */\r
-       str r0, [r2]                                     /* Save the new top of stack into the first member of the TCB. */\r
+       stmdb r0!, {r4-r11}                     /* Save the remaining registers. */\r
+       str r0, [r2]                            /* Save the new top of stack into the first member of the TCB. */\r
 \r
-       stmdb sp!, {r3, r14}            \r
+       stmdb sp!, {r3, r14}\r
        mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
-       msr basepri, r0          \r
+       msr basepri, r0\r
        bl vTaskSwitchContext\r
        mov r0, #0\r
        msr basepri, r0\r
-       ldmia sp!, {r3, r14}                    \r
+       ldmia sp!, {r3, r14}\r
 \r
-       ldr r1, [r3]                                     \r
-       ldr r0, [r1]                                     /* The first item in pxCurrentTCB is the task top of stack. */\r
-       ldmia r0!, {r4-r11}                      /* Pop the registers and the critical nesting count. */\r
-       msr psp, r0                                              \r
+       ldr r1, [r3]\r
+       ldr r0, [r1]                            /* The first item in pxCurrentTCB is the task top of stack. */\r
+       ldmia r0!, {r4-r11}                     /* Pop the registers and the critical nesting count. */\r
+       msr psp, r0\r
        bx r14\r
        nop\r
 }\r
@@ -263,53 +298,164 @@ __asm void xPortPendSVHandler( void )
 \r
 void xPortSysTickHandler( void )\r
 {\r
-unsigned long ulDummy;\r
-\r
-       /* If using preemption, also force a context switch. */\r
        #if configUSE_PREEMPTION == 1\r
-               *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;      \r
+       {\r
+               /* If using preemption, also force a context switch. */\r
+               portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+       }\r
        #endif\r
 \r
-       ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
+       #if configUSE_TICKLESS_IDLE == 1\r
+               portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
+       #endif\r
+\r
+       ( void ) portSET_INTERRUPT_MASK_FROM_ISR();\r
        {\r
                vTaskIncrementTick();\r
        }\r
-       portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
+       portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+#if configUSE_TICKLESS_IDLE == 1\r
+\r
+       __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+       {\r
+       unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;\r
+\r
+               /* Make sure the SysTick reload value does not overflow the counter. */\r
+               if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
+               {\r
+                       xExpectedIdleTime = xMaximumPossibleSuppressedTicks;\r
+               }\r
+\r
+               /* Calculate the reload value required to wait xExpectedIdleTime\r
+               tick periods.  -1 is used because this code will execute part way\r
+               through one of the tick periods, and the fraction of a tick period is\r
+               accounted for later. */\r
+               ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );\r
+               if( ulReloadValue > ulStoppedTimerCompensation )\r
+               {\r
+                       ulReloadValue -= ulStoppedTimerCompensation;\r
+               }\r
+\r
+               /* Stop the SysTick momentarily.  The time the SysTick is stopped for\r
+               is accounted for as best it can be, but using the tickless mode will\r
+               inevitably result in some tiny drift of the time maintained by the\r
+               kernel with respect to calendar time. */\r
+               portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
+\r
+               /* If a context switch is pending then abandon the low power entry as\r
+               the context switch might have been pended by an external interrupt that\r
+               requires processing. */\r
+               if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )\r
+               {\r
+                       /* Restart SysTick. */\r
+                       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
+               }\r
+               else\r
+               {\r
+                       /* Adjust the reload value to take into account that the current\r
+                       time slice is already partially complete. */\r
+                       ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );\r
+                       portNVIC_SYSTICK_LOAD_REG = ulReloadValue;\r
+\r
+                       /* Clear the SysTick count flag and set the count value back to\r
+                       zero. */\r
+                       portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
+\r
+                       /* Restart SysTick. */\r
+                       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
+\r
+                       /* Sleep until something happens. */\r
+                       portPRE_SLEEP_PROCESSING();\r
+                       __wfi();\r
+                       portPOST_SLEEP_PROCESSING();\r
+\r
+                       /* Stop SysTick.  Again, the time the SysTick is stopped for is\r
+                       accounted for as best it can be, but using the tickless mode will\r
+                       inevitably result in some tiny drift of the time maintained by the\r
+                       kernel with respect to calendar time. */\r
+                       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
+\r
+                       if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
+                       {\r
+                               /* The tick interrupt has already executed, and the SysTick\r
+                               count reloaded with the portNVIC_SYSTICK_LOAD_REG value.\r
+                               Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of\r
+                               this tick period. */\r
+                               portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
+\r
+                               /* The tick interrupt handler will already have pended the tick\r
+                               processing in the kernel.  As the pending tick will be\r
+                               processed as soon as this function exits, the tick value\r
+                               maintained by the tick is stepped forward by one less than the\r
+                               time spent waiting. */\r
+                               ulCompleteTickPeriods = xExpectedIdleTime - 1UL;\r
+                       }\r
+                       else\r
+                       {\r
+                               /* Something other than the tick interrupt ended the sleep.\r
+                               Work out how long the sleep lasted. */\r
+                               ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;\r
+\r
+                               /* How many complete tick periods passed while the processor\r
+                               was waiting? */\r
+                               ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;\r
+\r
+                               /* The reload value is set to whatever fraction of a single tick\r
+                               period remains. */\r
+                               portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;\r
+                       }\r
+\r
+                       /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
+                       again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r
+                       value. */\r
+                       portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
+                       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
+\r
+                       vTaskStepTick( ulCompleteTickPeriods );\r
+               }\r
+       }\r
+\r
+#endif /* #if configUSE_TICKLESS_IDLE */\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
 /*\r
- * Setup the systick timer to generate the tick interrupts at the required\r
+ * Setup the SysTick timer to generate the tick interrupts at the required\r
  * frequency.\r
  */\r
 void prvSetupTimerInterrupt( void )\r
 {\r
+       /* Calculate the constants required to configure the tick interrupt. */\r
+       ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+       #if configUSE_TICKLESS_IDLE == 1\r
+               xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
+       #endif /* configUSE_TICKLESS_IDLE */\r
+\r
        /* Configure SysTick to interrupt at the requested rate. */\r
-       *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
-       *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+       portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
+       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-__asm void vPortSetInterruptMask( void )\r
+__asm unsigned long ulPortSetInterruptMask( void )\r
 {\r
        PRESERVE8\r
 \r
-       push { r0 }\r
-       mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
-       msr basepri, r0\r
-       pop { r0 }\r
+       mrs r0, basepri\r
+       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r1\r
        bx r14\r
 }\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
-__asm void vPortClearInterruptMask( void )\r
+__asm void vPortClearInterruptMask( unsigned long ulNewMask )\r
 {\r
        PRESERVE8\r
 \r
-       push { r0 }\r
-       mov r0, #0\r
        msr basepri, r0\r
-       pop { r0 }\r
        bx r14\r
 }\r