Update version number to 8.1.1 for patch release that re-enables mutexes to be given...

[freertos] / FreeRTOS / Source / portable / RVDS / ARM_CM4F / port.c

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
index f46b8a58df9d5aed88f3193603264819db520db7..fdf946e11d7b24236c5f08b18e317f9866f1781c 100644 (file)
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -24,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -123,6 +123,9 @@ is defined. */
 #define portPRIORITY_GROUP_MASK                                ( 0x07UL << 8UL )\r
 #define portPRIGROUP_SHIFT                                     ( 8UL )\r
 \r
+/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */\r
+#define portVECTACTIVE_MASK                                    ( 0x1FUL )\r
+\r
 /* Constants required to manipulate the VFP. */\r
 #define portFPCCR                                      ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */\r
 #define portASPEN_AND_LSPEN_BITS       ( 0x3UL << 30UL )\r
@@ -290,11 +293,13 @@ __asm void prvStartFirstTask( void )
        msr msp, r0\r
        /* Globally enable interrupts. */\r
        cpsie i\r
+       cpsie f\r
        dsb\r
        isb\r
        /* Call SVC to start the first task. */\r
        svc 0\r
        nop\r
+       nop\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -414,6 +419,16 @@ void vPortEnterCritical( void )
        uxCriticalNesting++;\r
        __dsb( portSY_FULL_READ_WRITE );\r
        __isb( portSY_FULL_READ_WRITE );\r
+\r
+       /* This is not the interrupt safe version of the enter critical function so\r
+       assert() if it is being called from an interrupt context.  Only API\r
+       functions that end in "FromISR" can be used in an interrupt.  Only assert if\r
+       the critical nesting count is 1 to protect against recursive calls if the\r
+       assert function also uses a critical section. */\r
+       if( uxCriticalNesting == 1 )\r
+       {\r
+               configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );\r
+       }\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -680,7 +695,7 @@ void xPortSysTickHandler( void )
                #endif /* configUSE_TICKLESS_IDLE */\r
 \r
                /* Configure SysTick to interrupt at the requested rate. */\r
-               portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;\r
+               portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
                portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );\r
        }\r
 \r