+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution and was contributed\r
- to the project by Technolution B.V. (www.technolution.nl,\r
- freertos-riscv@technolution.eu) under the terms of the FreeRTOS\r
- contributors license.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*-----------------------------------------------------------\r
- * Implementation of functions defined in portable.h for the RISC-V port.\r
- *----------------------------------------------------------*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "portmacro.h"\r
-\r
-#include "riscv_hal.h"\r
-\r
-#ifdef __riscv64\r
-# define STORE sd\r
-# define LOAD ld\r
-# define REGBYTES 8\r
-#else\r
-# define STORE sw\r
-# define LOAD lw\r
-# define REGBYTES 4\r
-#endif\r
-/* A variable is used to keep track of the critical section nesting. This\r
-variable has to be stored as part of the task context and must be initialized to\r
-a non zero value to ensure interrupts don't inadvertently become unmasked before\r
-the scheduler starts. As it is stored as part of the task context it will\r
-automatically be set to 0 when the first task is started. */\r
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
-\r
-/* Contains context when starting scheduler, save all 31 registers */\r
-#ifdef __gracefulExit\r
-BaseType_t xStartContext[31] = {0};\r
-#endif\r
-\r
-\r
-typedef struct\r
-{\r
- uint32_t val_low;\r
- uint32_t val_high;\r
-}riscv_machine_timer_t;\r
-\r
-static volatile riscv_machine_timer_t *mtime = (riscv_machine_timer_t *)0x4400BFF8;\r
-\r
-static volatile riscv_machine_timer_t *mtimecmp = (riscv_machine_timer_t *)0x44004000;\r
-\r
-/*\r
- * Setup the timer to generate the tick interrupts.\r
- */\r
-void vPortSetupTimer( void );\r
-\r
-/*\r
- * Set the next interval for the timer\r
- */\r
-static void prvSetNextTimerInterrupt( void );\r
-\r
-/*\r
- * Used to catch tasks that attempt to return from their implementing function.\r
- */\r
-static void prvTaskExitError( void );\r
-\r
-void vPortEnterCritical( void )\r
-{\r
- portDISABLE_INTERRUPTS();\r
- uxCriticalNesting++;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortExitCritical( void )\r
-{\r
- uxCriticalNesting--;\r
- if( uxCriticalNesting == 0 )\r
- {\r
- portENABLE_INTERRUPTS();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Sets the next timer interrupt\r
- * Reads previous timer compare register, and adds tickrate */\r
-static void prvSetNextTimerInterrupt(void)\r
-{\r
- uint64_t time;\r
-\r
- time = mtime->val_low;\r
- time |= ((uint64_t)mtime->val_high << 32);\r
-\r
- time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ);\r
-\r
- mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF);\r
- mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF);\r
-\r
- /* Enable timer interrupt */\r
- __asm volatile("csrs mie,%0"::"r"(0x80));\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Sets and enable the timer interrupt */\r
-void vPortSetupTimer(void)\r
-{\r
- uint64_t time;\r
-\r
- time = mtime->val_low;\r
- time |= ((uint64_t)mtime->val_high << 32);\r
-\r
- time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ);\r
-\r
- mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF);\r
- mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF);\r
-\r
-\r
- /* Enable timer interrupt */\r
- __asm volatile("csrs mie,%0"::"r"(0x80));\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void prvTaskExitError( void )\r
-{\r
- /* A function that implements a task must not exit or attempt to return to\r
- its caller as there is nothing to return to. If a task wants to exit it\r
- should instead call vTaskDelete( NULL ).\r
-\r
- Artificially force an assert() to be triggered if configASSERT() is\r
- defined, then stop here so application writers can catch the error. */\r
- configASSERT( uxCriticalNesting == ~0UL );\r
- portDISABLE_INTERRUPTS();\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Clear current interrupt mask and set given mask */\r
-void vPortClearInterruptMask(int mask)\r
-{\r
- __asm volatile("csrw mie, %0"::"r"(mask));\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Set interrupt mask and return current interrupt enable register */\r
-int vPortSetInterruptMask(void)\r
-{\r
- int ret;\r
- __asm volatile("csrr %0,mie":"=r"(ret));\r
- __asm volatile("csrc mie,%0"::"i"(7));\r
- return ret;\r
-}\r
-\r
-/*\r
- * See header file for description.\r
- */\r
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
-{\r
- /* Simulate the stack frame as it would be created by a context switch\r
- interrupt. */\r
- register int *tp asm("x3");\r
- pxTopOfStack--;\r
- *pxTopOfStack = (portSTACK_TYPE)pxCode; /* Start address */\r
- pxTopOfStack -= 22;\r
- *pxTopOfStack = (portSTACK_TYPE)pvParameters; /* Register a0 */\r
- pxTopOfStack -= 6;\r
- *pxTopOfStack = (portSTACK_TYPE)tp; /* Register thread pointer */\r
- pxTopOfStack -= 3;\r
- *pxTopOfStack = (portSTACK_TYPE)prvTaskExitError; /* Register ra */\r
- \r
- return pxTopOfStack;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortSysTickHandler( void )\r
-{\r
- /*Save Context*/\r
- {\r
- __asm volatile("lw t0, pxCurrentTCB");\r
- __asm volatile("sw a2, 0x0(t0)");\r
- }\r
-\r
- /* Increment the RTOS tick. */\r
- prvSetNextTimerInterrupt();\r
-\r
- /*Switch task */\r
- if( xTaskIncrementTick() != pdFALSE )\r
- {\r
- vTaskSwitchContext();\r
- }\r
-\r
- /*Restore Context*/\r
- {\r
- __asm volatile("lw sp, pxCurrentTCB");\r
- __asm volatile("lw sp, 0x0(sp)");\r
-\r
- __asm volatile("lw t0, 31 * 4(sp)");\r
- __asm volatile("csrw mepc, t0");\r
-\r
- __asm volatile("lw x1, 0x0(sp)");\r
- __asm volatile("lw x4, 3 * 4(sp)");\r
- __asm volatile("lw x5, 4 * 4(sp)");\r
- __asm volatile("lw x6, 5 * 4(sp)");\r
- __asm volatile("lw x7, 6 * 4(sp)");\r
- __asm volatile("lw x8, 7 * 4(sp)");\r
- __asm volatile("lw x9, 8 * 4(sp)");\r
- __asm volatile("lw x10, 9 * 4(sp)");\r
- __asm volatile("lw x11, 10 * 4(sp)");\r
- __asm volatile("lw x12, 11 * 4(sp)");\r
- __asm volatile("lw x13, 12 * 4(sp)");\r
- __asm volatile("lw x14, 13 * 4(sp)");\r
- __asm volatile("lw x15, 14 * 4(sp)");\r
- __asm volatile("lw x16, 15 * 4(sp)");\r
- __asm volatile("lw x17, 16 * 4(sp)");\r
- __asm volatile("lw x18, 17 * 4(sp)");\r
- __asm volatile("lw x19, 18 * 4(sp)");\r
- __asm volatile("lw x20, 19 * 4(sp)");\r
- __asm volatile("lw x21, 20 * 4(sp)");\r
- __asm volatile("lw x22, 21 * 4(sp)");\r
- __asm volatile("lw x23, 22 * 4(sp)");\r
- __asm volatile("lw x24, 23 * 4(sp)");\r
- __asm volatile("lw x25, 24 * 4(sp)");\r
- __asm volatile("lw x26, 25 * 4(sp)");\r
- __asm volatile("lw x27, 26 * 4(sp)");\r
- __asm volatile("lw x28, 27 * 4(sp)");\r
- __asm volatile("lw x29, 28 * 4(sp)");\r
- __asm volatile("lw x30, 29 * 4(sp)");\r
- __asm volatile("lw x31, 30 * 4(sp)");\r
-\r
- __asm volatile("addi sp, sp, 4 * 32");\r
-\r
- __asm volatile("mret");\r
- }\r
-}\r
-uint32_t g_startscheduler = 0;\r
-BaseType_t xPortStartScheduler( void )\r
-{\r
- vPortSetupTimer();\r
- uxCriticalNesting = 0;\r
- g_startscheduler = 1;\r
- __enable_irq();\r
-\r
- raise_soft_interrupt();\r
-\r
- /*Should not get here*/\r
- return pdFALSE;\r
-}\r
-\r
-void Software_IRQHandler(void)\r
-{\r
- if(1 == g_startscheduler)\r
- {\r
- g_startscheduler = 2; //skip the save n switch context first time when scheduler is starting.\r
- }\r
- else\r
- {\r
- /*Save Context*/\r
- {\r
- __asm volatile("lw t0, pxCurrentTCB");\r
- __asm volatile("sw a2, 0x0(t0)");\r
- }\r
-\r
- vTaskSwitchContext();\r
- }\r
-\r
- /*Restore Context*/\r
- {\r
- __asm volatile("lw sp, pxCurrentTCB");\r
- __asm volatile("lw sp, 0x0(sp)");\r
-\r
- __asm volatile("lw t0, 31 * 4(sp)");\r
- __asm volatile("csrw mepc, t0");\r
-\r
- __asm volatile("lw x1, 0x0(sp)");\r
- __asm volatile("lw x4, 3 * 4(sp)");\r
- __asm volatile("lw x5, 4 * 4(sp)");\r
- __asm volatile("lw x6, 5 * 4(sp)");\r
- __asm volatile("lw x7, 6 * 4(sp)");\r
- __asm volatile("lw x8, 7 * 4(sp)");\r
- __asm volatile("lw x9, 8 * 4(sp)");\r
- __asm volatile("lw x10, 9 * 4(sp)");\r
- __asm volatile("lw x11, 10 * 4(sp)");\r
- __asm volatile("lw x12, 11 * 4(sp)");\r
- __asm volatile("lw x13, 12 * 4(sp)");\r
- __asm volatile("lw x14, 13 * 4(sp)");\r
- __asm volatile("lw x15, 14 * 4(sp)");\r
- __asm volatile("lw x16, 15 * 4(sp)");\r
- __asm volatile("lw x17, 16 * 4(sp)");\r
- __asm volatile("lw x18, 17 * 4(sp)");\r
- __asm volatile("lw x19, 18 * 4(sp)");\r
- __asm volatile("lw x20, 19 * 4(sp)");\r
- __asm volatile("lw x21, 20 * 4(sp)");\r
- __asm volatile("lw x22, 21 * 4(sp)");\r
- __asm volatile("lw x23, 22 * 4(sp)");\r
- __asm volatile("lw x24, 23 * 4(sp)");\r
- __asm volatile("lw x25, 24 * 4(sp)");\r
- __asm volatile("lw x26, 25 * 4(sp)");\r
- __asm volatile("lw x27, 26 * 4(sp)");\r
- __asm volatile("lw x28, 27 * 4(sp)");\r
- __asm volatile("lw x29, 28 * 4(sp)");\r
- __asm volatile("lw x30, 29 * 4(sp)");\r
- __asm volatile("lw x31, 30 * 4(sp)");\r
-\r
- __asm volatile("addi sp, sp, 4 * 32");\r
-\r
- //PRCI->MSIP[0] = 0x00;\r
-\r
- __asm volatile("addi sp, sp, -1*4");\r
- __asm volatile("sw t0, 0(sp)");\r
- __asm volatile("li t0, 0x44000000"); // address of PRCI->MSIP[0]\r
- __asm volatile("sw zero,0(t0)");\r
- __asm volatile("lw t0, 0(sp)");\r
- __asm volatile("addi sp, sp, 1*4");\r
-\r
- __asm volatile("mret");\r
- }\r
-}\r
-\r
-void vPortYield( void )\r
-{\r
- raise_soft_interrupt();\r
-}\r
-\r