/*\r
- FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.\r
-\r
- This file is part of the FreeRTOS.org distribution.\r
-\r
- FreeRTOS.org is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 2 of the License, or\r
- (at your option) any later version.\r
-\r
- FreeRTOS.org is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with FreeRTOS.org; if not, write to the Free Software\r
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
-\r
- A special exception to the GPL can be applied should you wish to distribute\r
- a combined work that includes FreeRTOS.org, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section \r
- of http://www.FreeRTOS.org for full details of how and when the exception\r
- can be applied.\r
-\r
- ***************************************************************************\r
-\r
- Please ensure to read the configuration and relevant port sections of the \r
- online documentation.\r
-\r
- +++ http://www.FreeRTOS.org +++\r
- Documentation, latest information, license and contact details. \r
-\r
- +++ http://www.SafeRTOS.com +++\r
- A version that is certified for use in safety critical systems.\r
-\r
- +++ http://www.OpenRTOS.com +++\r
- Commercial support, development, porting, licensing and training services.\r
+ FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+ \r
\r
- ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong? *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest information, \r
+ license and contact details.\r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
*/\r
\r
/*-----------------------------------------------------------\r
#define configKERNEL_INTERRUPT_PRIORITY 255\r
#endif\r
\r
+#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0\r
+ #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html\r
+#endif\r
+\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned portLONG *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned portLONG *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
+#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
#define portNVIC_PENDSVSET 0x10000000\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
\r
/* Constants required to set up the initial stack. */\r
#define portINITIAL_XPSR ( 0x01000000 )\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
\r
/* \r
* Setup the timer to generate the tick interrupts.\r
/*\r
* Start first task is a separate function so it can be tested in isolation.\r
*/\r
-void vPortStartFirstTask( unsigned long ulValue );\r
+void vPortStartFirstTask( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
+ pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
*pxTopOfStack = 0; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
- pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
- *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */\r
+ pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
\r
return pxTopOfStack;\r
}\r
ldr r3, =pxCurrentTCB /* Restore the context. */\r
ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */\r
- ldmia r0!, {r1, r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
- ldr r2, =uxCriticalNesting /* Restore the critical nesting count used by the task. */\r
- str r1, [r2] \r
+ ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
msr psp, r0 /* Restore the task stack pointer. */\r
+ mov r0, #0\r
+ msr basepri, r0\r
orr r14, #0xd \r
bx r14 \r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm void vPortStartFirstTask( unsigned long ulValue )\r
+__asm void vPortStartFirstTask( void )\r
{\r
PRESERVE8\r
\r
- msr msp, r0 /* Set the msp back to the start of the stack. */\r
- svc 0 /* System call to start first task. */\r
+ /* Use the NVIC offset register to locate the stack. */\r
+ ldr r0, =0xE000ED08\r
+ ldr r0, [r0]\r
+ ldr r0, [r0]\r
+ /* Set the msp back to the start of the stack. */\r
+ msr msp, r0\r
+ /* Globally enable interrupts. */\r
+ cpsie i\r
+ /* Call SVC to start the first task. */\r
+ svc 0\r
+ nop\r
}\r
/*-----------------------------------------------------------*/\r
\r
here already. */\r
prvSetupTimerInterrupt();\r
\r
+ /* Initialise the critical nesting count ready for the first task. */\r
+ uxCriticalNesting = 0;\r
+\r
/* Start the first task. */\r
- vPortStartFirstTask( *((unsigned portLONG *) 0 ) );\r
+ vPortStartFirstTask();\r
\r
/* Should not get here! */\r
return 0;\r
void vPortYieldFromISR( void )\r
{\r
/* Set a PendSV to request a context switch. */\r
- *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
-\r
- /* This function is also called in response to a Yield(), so we want\r
- the yield to occur immediately. */\r
- portENABLE_INTERRUPTS();\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
mrs r0, psp \r
\r
- ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */\r
+ ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */\r
ldr r2, [r3] \r
\r
- ldr r1, =uxCriticalNesting /* Save the remaining registers and the critical nesting count onto the task stack. */\r
- ldr r1, [r1] \r
- stmdb r0!, {r1,r4-r11} \r
+ stmdb r0!, {r4-r11} /* Save the remaining registers. */\r
str r0, [r2] /* Save the new top of stack into the first member of the TCB. */\r
\r
- stmdb sp!, {r3, r14} \r
- bl vTaskSwitchContext \r
+ stmdb sp!, {r3, r14} \r
+ mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+ msr basepri, r0 \r
+ bl vTaskSwitchContext\r
+ mov r0, #0\r
+ msr basepri, r0\r
ldmia sp!, {r3, r14} \r
\r
ldr r1, [r3] \r
- ldr r2, =uxCriticalNesting\r
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */\r
- ldmia r0!, {r1, r4-r11} /* Pop the registers and the critical nesting count. */\r
- str r1, [r2] /* Save the new critical nesting value into ulCriticalNesting. */ \r
+ ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */\r
msr psp, r0 \r
- orr r14, #0xd \r
-\r
- cbnz r1, sv_disable_interrupts /* If the nesting count is greater than 0 we need to exit with interrupts masked. */\r
bx r14\r
-\r
-sv_disable_interrupts\r
- mov r1, #configKERNEL_INTERRUPT_PRIORITY\r
- msr basepri, r1 \r
- bx r14 \r
+ nop\r
}\r
/*-----------------------------------------------------------*/\r
\r
void xPortSysTickHandler( void )\r
{\r
- vTaskIncrementTick();\r
- \r
+unsigned long ulDummy;\r
+\r
/* If using preemption, also force a context switch. */\r
#if configUSE_PREEMPTION == 1\r
- *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET; \r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; \r
#endif\r
+\r
+ ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
+ {\r
+ vTaskIncrementTick();\r
+ }\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
}\r
/*-----------------------------------------------------------*/\r
\r
void prvSetupTimerInterrupt( void )\r
{\r
/* Configure SysTick to interrupt at the requested rate. */\r
- *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
+ *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
}\r
/*-----------------------------------------------------------*/\r
PRESERVE8\r
\r
push { r0 }\r
- mov r0, #configKERNEL_INTERRUPT_PRIORITY\r
+ mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
msr basepri, r0\r
pop { r0 }\r
+ bx r14\r
}\r
\r
/*-----------------------------------------------------------*/\r
mov r0, #0\r
msr basepri, r0\r
pop { r0 }\r
+ bx r14\r
}\r