X-Git-Url: https://git.sur5r.net/?p=freertos;a=blobdiff_plain;f=FreeRTOS%2FDemo%2FCORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso%2FNXP_Code%2FCMSIS%2Fcmsis_armcc.h;h=f0fec127e1427afedb6c6f41716ac81bd93eff9e;hp=f204e241c9293021e0d6642e7ac60c8b76616be1;hb=HEAD;hpb=c5efd011e8c638d413ac395419119a451a0cb169

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
index f204e241c..f0fec127e 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armcc.h
  * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.0.5
+ * @date     14. December 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -47,6 +47,10 @@
   /* __ARM_ARCH_8M_BASE__  not applicable */
   /* __ARM_ARCH_8M_MAIN__  not applicable */
 
+/* CMSIS compiler control DSP macros */
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __ARM_FEATURE_DSP         1
+#endif
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
@@ -337,8 +341,6 @@ __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
            (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 
 
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
 /**
   \brief   Get FPSCR
   \details Returns the current value of the Floating Point Status/Control register.
@@ -372,9 +374,6 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
 #endif
 }
 
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-
 
 /*@} end of CMSIS_Core_RegAccFunctions */