X-Git-Url: https://git.sur5r.net/?p=freertos;a=blobdiff_plain;f=FreeRTOS%2FSource%2Fportable%2FGCC%2FRISC-V%2Fport.c;fp=FreeRTOS%2FSource%2Fportable%2FGCC%2FRISC-V%2Fport.c;h=89b468e997192e5ddf503d46b7bf152261410d5c;hp=511882d3809a08e4e096f4578721d970b71a706f;hb=38a770622c6843e732738fe34ccd3772b4ac160c;hpb=53b6a1d8973d8e067ef9561154aad789b91c936a diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/port.c b/FreeRTOS/Source/portable/GCC/RISC-V/port.c index 511882d38..89b468e99 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/port.c +++ b/FreeRTOS/Source/portable/GCC/RISC-V/port.c @@ -38,15 +38,15 @@ #include "string.h" #ifdef configCLINT_BASE_ADDRESS - #warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS. + #warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS. See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html #endif #ifndef configMTIME_BASE_ADDRESS - #warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. + #warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html #endif #ifndef configMTIMECMP_BASE_ADDRESS - #warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. + #warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html #endif /* Let the user override the pre-loading of the initial LR with the address of @@ -72,7 +72,7 @@ interrupt stack after the scheduler has started. */ /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for the task stacks, and so will legitimately appear in many positions within the ISR stack. */ - #define portISR_STACK_FILL_BYTE 0xee + #define portISR_STACK_FILL_BYTE 0xee #else extern const uint32_t __freertos_irq_stack_top[]; const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top;