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Update RISK-V GCC port to ensure the first task starts with interrupts enabled -...
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 21 Oct 2019 04:16:32 +0000 (04:16 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 21 Oct 2019 04:16:32 +0000 (04:16 +0000)
commitdc399f97501e6b426f89cd9ccb25f97209fd1b80
tree4cd54efac8641cafd68cee9c65c0d83c51e80efetree | snapshot
parent9cd953644f25ba26aa0f53751b6d496fb4cc4a6ccommit | diff
Update RISK-V GCC port to ensure the first task starts with interrupts enabled - previously its interrupts were only enabled after it yielded for the first time.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2745 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V/portASM.S diff | blob | history
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