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<type>2</type>\r
<locationURI>virtual:/virtual</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/event_groups.c</name>\r
+ <name>freertos_source/event_groups.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/event_groups.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/include</name>\r
+ <name>freertos_source/include</name>\r
<type>2</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/include</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/list.c</name>\r
+ <name>freertos_source/list.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/list.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/portable</name>\r
+ <name>freertos_source/portable</name>\r
<type>2</type>\r
<locationURI>virtual:/virtual</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/queue.c</name>\r
+ <name>freertos_source/queue.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/queue.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/stream_buffer.c</name>\r
+ <name>freertos_source/stream_buffer.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/stream_buffer.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/tasks.c</name>\r
+ <name>freertos_source/tasks.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/tasks.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/timers.c</name>\r
+ <name>freertos_source/timers.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/timers.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks</name>\r
+ <name>full_demo/standard_demo_tasks</name>\r
<type>2</type>\r
<locationURI>virtual:/virtual</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/portable/GCC</name>\r
+ <name>freertos_source/portable/GCC</name>\r
<type>2</type>\r
<locationURI>virtual:/virtual</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/portable/MemMang</name>\r
+ <name>freertos_source/portable/MemMang</name>\r
<type>2</type>\r
<locationURI>virtual:/virtual</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/EventGroupsDemo.c</name>\r
+ <name>full_demo/standard_demo_tasks/EventGroupsDemo.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/EventGroupsDemo.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/GenQTest.c</name>\r
+ <name>full_demo/standard_demo_tasks/GenQTest.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/GenQTest.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/TaskNotify.c</name>\r
+ <name>full_demo/standard_demo_tasks/TaskNotify.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/TaskNotify.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/TimerDemo.c</name>\r
+ <name>full_demo/standard_demo_tasks/TimerDemo.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/TimerDemo.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/blocktim.c</name>\r
+ <name>full_demo/standard_demo_tasks/blocktim.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/blocktim.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/dynamic.c</name>\r
+ <name>full_demo/standard_demo_tasks/dynamic.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/dynamic.c</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/include</name>\r
+ <name>full_demo/standard_demo_tasks/include</name>\r
<type>2</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/include</locationURI>\r
</link>\r
<link>\r
- <name>full_demo/common_demo_tasks/recmutex.c</name>\r
+ <name>full_demo/standard_demo_tasks/recmutex.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Demo/Common/Minimal/recmutex.c</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/portable/GCC/RISC-V</name>\r
+ <name>freertos_source/portable/GCC/RISC-V</name>\r
<type>2</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/portable/GCC/RISC-V</locationURI>\r
</link>\r
<link>\r
- <name>FreeRTOS_Source/portable/MemMang/heap_4.c</name>\r
+ <name>freertos_source/portable/MemMang/heap_4.c</name>\r
<type>1</type>\r
<locationURI>FREERTOS_ROOT/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>\r
</link>\r
</linkedResources>\r
<filteredResources>\r
<filter>\r
- <id>1546280186727</id>\r
- <name>FreeRTOS_Source/portable/GCC/RISC-V/chip_specific_extensions</name>\r
+ <id>1571146760235</id>\r
+ <name>freertos_source/portable/GCC/RISC-V/chip_specific_extensions</name>\r
<type>9</type>\r
<matcher>\r
<id>org.eclipse.ui.ide.multiFilter</id>\r
<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
<project>\r
- \r
- <configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870" name="Debug">\r
- \r
- <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">\r
- \r
- <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>\r
- \r
- <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>\r
- \r
- <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>\r
- \r
- <provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="589632151712267266" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">\r
- \r
- <language-scope id="org.eclipse.cdt.core.gcc"/>\r
- \r
- <language-scope id="org.eclipse.cdt.core.g++"/>\r
- \r
- </provider>\r
- \r
- </extension>\r
- \r
- </configuration>\r
- \r
- <configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408" name="Release">\r
- \r
- <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">\r
- \r
- <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>\r
- \r
- <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>\r
- \r
- <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>\r
- \r
- <provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="602853956613322166" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">\r
- \r
- <language-scope id="org.eclipse.cdt.core.gcc"/>\r
- \r
- <language-scope id="org.eclipse.cdt.core.g++"/>\r
- \r
- </provider>\r
- \r
- </extension>\r
- \r
- </configuration>\r
- \r
+ <configuration id="cdt.managedbuild.config.gnu.cross.exe.debug.244253252" name="Debug">\r
+ <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">\r
+ <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>\r
+ <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>\r
+ <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>\r
+ <provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="-564276645149001" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">\r
+ <language-scope id="org.eclipse.cdt.core.gcc"/>\r
+ <language-scope id="org.eclipse.cdt.core.g++"/>\r
+ </provider>\r
+ </extension>\r
+ </configuration>\r
</project>\r
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )\r
#define configMAX_PRIORITIES ( 7 )\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 )\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) 14100 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) 14500 )\r
#define configMAX_TASK_NAME_LEN ( 16 )\r
#define configUSE_TRACE_FACILITY 0\r
#define configUSE_16_BIT_TICKS 0\r
#define configUSE_TIMERS 1\r
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
#define configTIMER_QUEUE_LENGTH 4\r
-#define configTIMER_TASK_STACK_DEPTH ( 100 )\r
+#define configTIMER_TASK_STACK_DEPTH ( 120 )\r
\r
/* Task priorities. Allow these to be overridden. */\r
#ifndef uartPRIMARY_PRIORITY\r
#define INCLUDE_vTaskDelay 1\r
#define INCLUDE_eTaskGetState 1\r
#define INCLUDE_xTimerPendFunctionCall 1\r
+#define INCLUDE_xTaskAbortDelay 1\r
+#define INCLUDE_xTaskGetHandle 1\r
+#define INCLUDE_xSemaphoreGetMutexHolder 1\r
\r
/* Normal assert() semantics without relying on the provision of an assert.h\r
header file. */\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="org.eclipse.cdt.debug.gdbjtag.core.jtagdevice.genericDevice"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>\r
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="riscv64-unknown-elf-gdb.exe -iex "set mem inaccessible-by-default off" -iex "set arch riscv:rv32" -iex "set riscv use_compressed_breakpoint off""/>\r
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REMOTE_TIMEOUT_ENABLED" value="false"/>\r
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.REMOTE_TIMEOUT_VALUE" value=""/>\r
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>\r
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>\r
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>\r
const unsigned long ulExpectedValue = 100UL;\r
const char * const pcPassMessage = "Blink\r\n";\r
const char * const pcFailMessage = "Unexpected value received\r\n";\r
+extern void vSendString( const char * pcString );\r
\r
/* Remove compiler warning about unused parameter. */\r
( void ) pvParameters;\r
is it the expected value? If it is, toggle the LED. */\r
if( ulReceivedValue == ulExpectedValue )\r
{\r
- write( STDOUT_FILENO, pcPassMessage, strlen( pcPassMessage ) );\r
+ vSendString( pcPassMessage );\r
ulReceivedValue = 0U;\r
}\r
else\r
{\r
- write( STDOUT_FILENO, pcFailMessage, strlen( pcFailMessage ) );\r
+ vSendString( pcFailMessage );\r
}\r
}\r
}\r
+++ /dev/null
-// See LICENSE file for license details\r
-\r
-#include "platform.h"\r
-\r
-#ifdef PRCI_CTRL_ADDR\r
-#include "fe300prci/fe300prci_driver.h"\r
-#include <unistd.h>\r
-\r
-#define rdmcycle(x) { \\r
- uint32_t lo, hi, hi2; \\r
- __asm__ __volatile__ ("1:\n\t" \\r
- "csrr %0, mcycleh\n\t" \\r
- "csrr %1, mcycle\n\t" \\r
- "csrr %2, mcycleh\n\t" \\r
- "bne %0, %2, 1b\n\t" \\r
- : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \\r
- *(x) = lo | ((uint64_t) hi << 32); \\r
- }\r
-\r
-uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)\r
-{\r
-\r
- uint32_t start_mtime = CLINT_REG(CLINT_MTIME);\r
- uint32_t end_mtime = start_mtime + mtime_ticks + 1;\r
-\r
- // Make sure we won't get rollover.\r
- while (end_mtime < start_mtime){\r
- start_mtime = CLINT_REG(CLINT_MTIME);\r
- end_mtime = start_mtime + mtime_ticks + 1;\r
- }\r
-\r
- // Don't start measuring until mtime edge.\r
- uint32_t tmp = start_mtime;\r
- do {\r
- start_mtime = CLINT_REG(CLINT_MTIME);\r
- } while (start_mtime == tmp);\r
- \r
- uint64_t start_mcycle;\r
- rdmcycle(&start_mcycle);\r
- \r
- while (CLINT_REG(CLINT_MTIME) < end_mtime) ;\r
- \r
- uint64_t end_mcycle;\r
- rdmcycle(&end_mcycle);\r
- uint32_t difference = (uint32_t) (end_mcycle - start_mcycle);\r
-\r
- uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks;\r
- return (uint32_t) freq & 0xFFFFFFFF;\r
- \r
-}\r
- \r
-\r
-void PRCI_use_hfrosc(int div, int trim)\r
-{\r
- // Make sure the HFROSC is running at its default setting\r
- // It is OK to change this even if we are running off of it.\r
- \r
- PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));\r
-\r
- while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);\r
- \r
- PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);\r
-}\r
-\r
-void PRCI_use_pll(int refsel, int bypass,\r
- int r, int f, int q, int finaldiv,\r
- int hfroscdiv, int hfrosctrim)\r
-{\r
- // Ensure that we aren't running off the PLL before we mess with it.\r
- if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {\r
- // Make sure the HFROSC is running at its default setting\r
- PRCI_use_hfrosc(4, 16);\r
- }\r
- \r
- // Set PLL Source to be HFXOSC if desired.\r
- uint32_t config_value = 0;\r
-\r
- config_value |= PLL_REFSEL(refsel);\r
- \r
- if (bypass) {\r
- // Bypass\r
- config_value |= PLL_BYPASS(1);\r
-\r
- PRCI_REG(PRCI_PLLCFG) = config_value;\r
-\r
- // If we don't have an HFXTAL, this doesn't really matter.\r
- // Set our Final output divide to divide-by-1:\r
- PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));\r
- } else {\r
- \r
- // To overclock, use the hfrosc\r
- if (hfrosctrim >= 0 && hfroscdiv >= 0) {\r
- PRCI_use_hfrosc(hfroscdiv, hfrosctrim);\r
- }\r
- \r
- // Set DIV Settings for PLL\r
- \r
- // (Legal values of f_REF are 6-48MHz)\r
-\r
- // Set DIVR to divide-by-2 to get 8MHz frequency\r
- // (legal values of f_R are 6-12 MHz)\r
-\r
- config_value |= PLL_BYPASS(1);\r
- config_value |= PLL_R(r);\r
-\r
- // Set DIVF to get 512Mhz frequncy\r
- // There is an implied multiply-by-2, 16Mhz.\r
- // So need to write 32-1\r
- // (legal values of f_F are 384-768 MHz)\r
- config_value |= PLL_F(f);\r
-\r
- // Set DIVQ to divide-by-2 to get 256 MHz frequency\r
- // (legal values of f_Q are 50-400Mhz)\r
- config_value |= PLL_Q(q);\r
-\r
- // Set our Final output divide to divide-by-1:\r
- if (finaldiv == 1){\r
- PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));\r
- } else {\r
- PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV(finaldiv-1));\r
- }\r
-\r
- PRCI_REG(PRCI_PLLCFG) = config_value;\r
-\r
- // Un-Bypass the PLL.\r
- PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);\r
-\r
- // Wait for PLL Lock\r
- // Note that the Lock signal can be glitchy.\r
- // Need to wait 100 us\r
- // RTC is running at 32kHz.\r
- // So wait 4 ticks of RTC.\r
- uint32_t now = CLINT_REG(CLINT_MTIME);\r
- while (CLINT_REG(CLINT_MTIME) - now < 4) ;\r
- \r
- // Now it is safe to check for PLL Lock\r
- while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);\r
-\r
- }\r
-\r
- // Switch over to PLL Clock source\r
- PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);\r
-\r
- // If we're running off HFXOSC, turn off the HFROSC to\r
- // save power.\r
- if (refsel) {\r
- PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);\r
- }\r
- \r
-}\r
-\r
-void PRCI_use_default_clocks()\r
-{\r
- // Turn off the LFROSC\r
- AON_REG(AON_LFROSC) &= ~ROSC_EN(1);\r
-\r
- // Use HFROSC\r
- PRCI_use_hfrosc(4, 16);\r
-}\r
-\r
-void PRCI_use_hfxosc(uint32_t finaldiv)\r
-{\r
- \r
- PRCI_use_pll(1, // Use HFXTAL\r
- 1, // Bypass = 1\r
- 0, // PLL settings don't matter\r
- 0, // PLL settings don't matter\r
- 0, // PLL settings don't matter\r
- finaldiv,\r
- -1,\r
- -1);\r
-}\r
-\r
-// This is a generic function, which\r
-// doesn't span the entire range of HFROSC settings.\r
-// It only adjusts the trim, which can span a hundred MHz or so.\r
-// This function does not check the legality of the PLL settings\r
-// at all, and it is quite possible to configure invalid PLL settings\r
-// this way.\r
-// It returns the actual measured CPU frequency.\r
-\r
-uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target )\r
-{\r
-\r
- uint32_t hfrosctrim = 0;\r
- uint32_t hfroscdiv = 4;\r
- uint32_t prev_trim = 0;\r
-\r
- // In this function we use PLL settings which\r
- // will give us a 32x multiplier from the output\r
- // of the HFROSC source to the output of the\r
- // PLL. We first measure our HFROSC to get the\r
- // right trim, then finally use it as the PLL source.\r
- // We should really check here that the f_cpu\r
- // requested is something in the limit of the PLL. For\r
- // now that is up to the user.\r
-\r
- // This will undershoot for frequencies not divisible by 16.\r
- uint32_t desired_hfrosc_freq = (f_cpu/ 16);\r
-\r
- PRCI_use_hfrosc(hfroscdiv, hfrosctrim);\r
- \r
- // Ignore the first run (for icache reasons)\r
- uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);\r
-\r
- cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);\r
- uint32_t prev_freq = cpu_freq;\r
- \r
- while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){\r
- prev_trim = hfrosctrim;\r
- prev_freq = cpu_freq;\r
- hfrosctrim ++;\r
- PRCI_use_hfrosc(hfroscdiv, hfrosctrim);\r
- cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);\r
- } \r
-\r
- // We couldn't go low enough\r
- if (prev_freq > desired_hfrosc_freq){\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);\r
- cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);\r
- return cpu_freq;\r
- }\r
- \r
- // We couldn't go high enough\r
- if (cpu_freq < desired_hfrosc_freq){\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);\r
- cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);\r
- return cpu_freq;\r
- }\r
-\r
- // Check for over/undershoot\r
- switch(target) {\r
- case(PRCI_FREQ_CLOSEST):\r
- if ((desired_hfrosc_freq - prev_freq) < (cpu_freq - desired_hfrosc_freq)) {\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);\r
- } else {\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);\r
- }\r
- break;\r
- case(PRCI_FREQ_UNDERSHOOT):\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);\r
- break;\r
- default:\r
- PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);\r
- }\r
-\r
- cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);\r
- return cpu_freq;\r
-\r
-}\r
-\r
-#endif\r
+++ /dev/null
-// See LICENSE file for license details\r
-\r
-#ifndef _FE300PRCI_DRIVER_H_\r
-#define _FE300PRCI_DRIVER_H_\r
-\r
-__BEGIN_DECLS\r
-\r
-#include <unistd.h>\r
-\r
-typedef enum prci_freq_target {\r
- \r
- PRCI_FREQ_OVERSHOOT,\r
- PRCI_FREQ_CLOSEST,\r
- PRCI_FREQ_UNDERSHOOT\r
-\r
-} PRCI_freq_target;\r
-\r
-/* Measure and return the approximate frequency of the \r
- * CPU, as given by measuring the mcycle counter against \r
- * the mtime ticks.\r
- */\r
-uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq);\r
-\r
-/* Safely switch over to the HFROSC using the given div\r
- * and trim settings.\r
- */\r
-void PRCI_use_hfrosc(int div, int trim);\r
-\r
-/* Safely switch over to the 16MHz HFXOSC,\r
- * applying the finaldiv clock divider (1 is the lowest\r
- * legal value).\r
- */\r
-void PRCI_use_hfxosc(uint32_t finaldiv);\r
-\r
-/* Safely switch over to the PLL using the given\r
- * settings.\r
- * \r
- * Note that not all combinations of the inputs are actually\r
- * legal, and this function does not check for their\r
- * legality ("safely" means that this function won't turn off\r
- * or glitch the clock the CPU is actually running off, but\r
- * doesn't protect against you making it too fast or slow.)\r
- */\r
-\r
-void PRCI_use_pll(int refsel, int bypass,\r
- int r, int f, int q, int finaldiv,\r
- int hfroscdiv, int hfrosctrim);\r
-\r
-/* Use the default clocks configured at reset.\r
- * This is ~16Mhz HFROSC and turns off the LFROSC\r
- * (on the current FE310 Dev Platforms, an external LFROSC is \r
- * used as it is more power efficient).\r
- */\r
-void PRCI_use_default_clocks();\r
-\r
-/* This routine will adjust the HFROSC trim\r
- * while using HFROSC as the clock source, \r
- * measure the resulting frequency, then\r
- * use it as the PLL clock source, \r
- * in an attempt to get over, under, or close to the \r
- * requested frequency. It returns the actual measured \r
- * frequency. \r
- *\r
- * Note that the requested frequency must be within the \r
- * range supported by the PLL so not all values are \r
- * achievable with this function, and not all \r
- * are guaranteed to actually work. The PLL\r
- * is rated higher than the hardware.\r
- * \r
- * There is no check on the desired f_cpu frequency, it\r
- * is up to the user to specify something reasonable.\r
- */\r
-\r
-uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target);\r
-\r
-__END_DECLS\r
-\r
-#endif\r
- \r
+++ /dev/null
-// See LICENSE for license details.\r
-\r
-#include "sifive/devices/plic.h"\r
-#include "plic/plic_driver.h"\r
-#include "platform.h"\r
-#include "encoding.h"\r
-#include <string.h>\r
-\r
-\r
-// Note that there are no assertions or bounds checking on these\r
-// parameter values.\r
-\r
-void volatile_memzero(uint8_t * base, unsigned int size)\r
-{\r
- volatile uint8_t * ptr;\r
- for (ptr = base; ptr < (base + size); ptr++){\r
- *ptr = 0;\r
- }\r
-}\r
-\r
-void PLIC_init (\r
- plic_instance_t * this_plic,\r
- uintptr_t base_addr,\r
- uint32_t num_sources,\r
- uint32_t num_priorities\r
- )\r
-{\r
- \r
- this_plic->base_addr = base_addr;\r
- this_plic->num_sources = num_sources;\r
- this_plic->num_priorities = num_priorities;\r
- \r
- // Disable all interrupts (don't assume that these registers are reset).\r
- unsigned long hart_id = read_csr(mhartid);\r
- volatile_memzero((uint8_t*) (this_plic->base_addr +\r
- PLIC_ENABLE_OFFSET +\r
- (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET)),\r
- (num_sources + 8) / 8);\r
- \r
- // Set all priorities to 0 (equal priority -- don't assume that these are reset).\r
- volatile_memzero ((uint8_t *)(this_plic->base_addr +\r
- PLIC_PRIORITY_OFFSET),\r
- (num_sources + 1) << PLIC_PRIORITY_SHIFT_PER_SOURCE);\r
-\r
- // Set the threshold to 0.\r
- volatile plic_threshold* threshold = (plic_threshold*)\r
- (this_plic->base_addr +\r
- PLIC_THRESHOLD_OFFSET +\r
- (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));\r
-\r
- *threshold = 0;\r
- \r
-}\r
-\r
-void PLIC_set_threshold (plic_instance_t * this_plic,\r
- plic_threshold threshold){\r
-\r
- unsigned long hart_id = read_csr(mhartid); \r
- volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr +\r
- PLIC_THRESHOLD_OFFSET +\r
- (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));\r
-\r
- *threshold_ptr = threshold;\r
-\r
-}\r
- \r
-\r
-void PLIC_enable_interrupt (plic_instance_t * this_plic, plic_source source){\r
-\r
- unsigned long hart_id = read_csr(mhartid);\r
- volatile uint8_t * current_ptr = (volatile uint8_t *)(this_plic->base_addr +\r
- PLIC_ENABLE_OFFSET +\r
- (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +\r
- (source >> 3));\r
- uint8_t current = *current_ptr;\r
- current = current | ( 1 << (source & 0x7));\r
- *current_ptr = current;\r
-\r
-}\r
-\r
-void PLIC_disable_interrupt (plic_instance_t * this_plic, plic_source source){\r
- \r
- unsigned long hart_id = read_csr(mhartid);\r
- volatile uint8_t * current_ptr = (volatile uint8_t *) (this_plic->base_addr +\r
- PLIC_ENABLE_OFFSET +\r
- (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +\r
- (source >> 3));\r
- uint8_t current = *current_ptr;\r
- current = current & ~(( 1 << (source & 0x7)));\r
- *current_ptr = current;\r
- \r
-}\r
-\r
-void PLIC_set_priority (plic_instance_t * this_plic, plic_source source, plic_priority priority){\r
-\r
- if (this_plic->num_priorities > 0) {\r
- volatile plic_priority * priority_ptr = (volatile plic_priority *)\r
- (this_plic->base_addr +\r
- PLIC_PRIORITY_OFFSET +\r
- (source << PLIC_PRIORITY_SHIFT_PER_SOURCE));\r
- *priority_ptr = priority;\r
- }\r
-}\r
-\r
-plic_source PLIC_claim_interrupt(plic_instance_t * this_plic){\r
- \r
- unsigned long hart_id = read_csr(mhartid);\r
-\r
- volatile plic_source * claim_addr = (volatile plic_source * )\r
- (this_plic->base_addr +\r
- PLIC_CLAIM_OFFSET +\r
- (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));\r
-\r
- return *claim_addr;\r
- \r
-}\r
-\r
-void PLIC_complete_interrupt(plic_instance_t * this_plic, plic_source source){\r
- \r
- unsigned long hart_id = read_csr(mhartid);\r
- volatile plic_source * claim_addr = (volatile plic_source *) (this_plic->base_addr +\r
- PLIC_CLAIM_OFFSET +\r
- (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));\r
- *claim_addr = source;\r
- \r
-}\r
-\r
+++ /dev/null
-// See LICENSE file for licence details\r
-\r
-#ifndef PLIC_DRIVER_H\r
-#define PLIC_DRIVER_H\r
-\r
-\r
-__BEGIN_DECLS\r
-\r
-#include "platform.h"\r
-\r
-typedef struct __plic_instance_t\r
-{\r
- uintptr_t base_addr;\r
-\r
- uint32_t num_sources;\r
- uint32_t num_priorities;\r
- \r
-} plic_instance_t;\r
-\r
-typedef uint32_t plic_source;\r
-typedef uint32_t plic_priority;\r
-typedef uint32_t plic_threshold;\r
-\r
-void PLIC_init (\r
- plic_instance_t * this_plic,\r
- uintptr_t base_addr,\r
- uint32_t num_sources,\r
- uint32_t num_priorities\r
- );\r
-\r
-void PLIC_set_threshold (plic_instance_t * this_plic,\r
- plic_threshold threshold);\r
- \r
-void PLIC_enable_interrupt (plic_instance_t * this_plic,\r
- plic_source source);\r
-\r
-void PLIC_disable_interrupt (plic_instance_t * this_plic,\r
- plic_source source);\r
- \r
-void PLIC_set_priority (plic_instance_t * this_plic,\r
- plic_source source,\r
- plic_priority priority);\r
-\r
-plic_source PLIC_claim_interrupt(plic_instance_t * this_plic);\r
-\r
-void PLIC_complete_interrupt(plic_instance_t * this_plic,\r
- plic_source source);\r
-\r
-__END_DECLS\r
-\r
-#endif\r
\r
SECTIONS\r
{\r
- __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;\r
+ __stack_size = DEFINED(__stack_size) ? __stack_size : 400;\r
\r
.init :\r
{\r
use_pll(0, 0, 1, 31, 1);\r
uart_init(115200);\r
\r
- printf("core freq at %d Hz\n", (int)get_cpu_freq());\r
-\r
write_csr(mtvec, &trap_entry);\r
if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present\r
write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping\r
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
const char * const pcPassMessage = "Pass";\r
const char * pcStatusMessage = ".";\r
+extern void vSendString( const char * pcString );\r
\r
/* Just to stop compiler warnings. */\r
( void ) pvParameters;\r
\r
- write( STDOUT_FILENO, pcPassMessage, strlen( pcPassMessage ) );\r
-\r
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
works correctly. */\r
xLastExecutionTime = xTaskGetTickCount();\r
ulLastRegTest2Value = ulRegTest2LoopCounter;\r
\r
/* Write the status message to the UART. */\r
- write( STDOUT_FILENO, pcStatusMessage, strlen( pcStatusMessage ) );\r
+ vSendString( pcStatusMessage );\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
or 0 to run the more comprehensive test and demo application. */\r
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
\r
/*\r
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
extern void main_full( void );\r
#endif /* #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 */\r
\r
-/* Prototypes for the standard FreeRTOS callback/hook functions implemented\r
-within this file. See https://www.freertos.org/a00016.html */\r
+/*\r
+ * Prototypes for the standard FreeRTOS callback/hook functions implemented\r
+ * within this file. See https://www.freertos.org/a00016.html\r
+ */\r
void vApplicationMallocFailedHook( void );\r
void vApplicationIdleHook( void );\r
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );\r
void vApplicationTickHook( void );\r
\r
+/*\r
+ * Very simply polling write to the UART. The full demo only writes single\r
+ * characters at a time so as not to disrupt the timing of the test and demo\r
+ * tasks.\r
+ */\r
+void vSendString( const char * pcString );\r
+\r
/*-----------------------------------------------------------*/\r
\r
int main( void )\r
{\r
+ vSendString( "Starting" );\r
+\r
/* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
of this file. */\r
#if( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )\r
__asm volatile( "NOP" );\r
}\r
}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSendString( const char * pcString )\r
+{\r
+ while( *pcString != 0x00 )\r
+ {\r
+ while( UART0_REG( UART_REG_TXFIFO ) & 0x80000000 );\r
+ UART0_REG( UART_REG_TXFIFO ) = *pcString;\r
+ *pcString++;\r
+ }\r
+}\r
+\r
+++ /dev/null
-adapter_khz 10000\r
-\r
-interface ftdi\r
-ftdi_device_desc "Dual RS232-HS"\r
-ftdi_vid_pid 0x0403 0x6010\r
-\r
-ftdi_layout_init 0x0008 0x001b\r
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020\r
-\r
-#Reset Stretcher logic on FE310 is ~1 second long\r
-#This doesn't apply if you use\r
-# ftdi_set_signal, but still good to document\r
-#adapter_nsrst_delay 1500\r
-\r
-set _CHIPNAME riscv\r
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME\r
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1\r
-\r
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME\r
-init\r
-#reset -- This type of reset is not implemented yet\r
-if {[ info exists pulse_srst]} {\r
- ftdi_set_signal nSRST 0\r
- ftdi_set_signal nSRST z\r
- #Wait for the reset stretcher\r
- #It will work without this, but\r
- #will incur lots of delays for later commands.\r
- sleep 1500\r
-} \r
-halt\r
-flash protect 0 64 last off\r
projects / freertos / commitdiff