Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRES...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2798 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
index 9e581431afdad6b55ae191e0605855b965847440..f3559b3a9b1b237cfd6377325332694c407b5877 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
@@ -59,7 +59,7 @@
 #ifndef __FREERTOS_RISC_V_EXTENSIONS_H__\r
 #define __FREERTOS_RISC_V_EXTENSIONS_H__\r
 \r
-#define portasmHAS_CLINT 0\r
+#define portasmHAS_MTIME 0\r
 \r
 /* Constants to define the additional registers found on the Pulpino RI5KY. */\r
 #define lpstart0       0x7b0\r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
index 3333a7cfce78a66500859b61c862b1d3e5a86932..7ce23b849ee8bc6bae5e744c8f2d98eda070fb02 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
@@ -53,7 +53,7 @@
 #ifndef __FREERTOS_RISC_V_EXTENSIONS_H__\r
 #define __FREERTOS_RISC_V_EXTENSIONS_H__\r
 \r
-#define portasmHAS_CLINT 1\r
+#define portasmHAS_MTIME 1\r
 #define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */\r
 \r
 .macro portasmSAVE_ADDITIONAL_REGISTERS\r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/port.c b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
index ff72e4755388a5ad9a03356db106c38dad0a04f6..acd579ffa3fd411c8f514901a22b0199ff4d4572 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
@@ -37,8 +37,16 @@
 /* Standard includes. */\r
 #include "string.h"\r
 \r
-#ifndef configCLINT_BASE_ADDRESS\r
-       #warning configCLINT_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a Core Local Interrupter (CLINT) then set configCLINT_BASE_ADDRESS to the CLINT base address.  Otherwise set configCLINT_BASE_ADDRESS to 0.\r
+#ifdef configCLINT_BASE_ADDRESS\r
+       #warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from configCLINT_BASE_ADDRESS.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.\r
+#endif\r
+\r
+#ifndef configMTIME_BASE_ADDRESS\r
+       #warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.\r
+#endif\r
+\r
+#ifndef configMTIMECMP_BASE_ADDRESS\r
+       #warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.\r
 #endif\r
 \r
 /* Let the user override the pre-loading of the initial LR with the address of\r
@@ -83,7 +91,7 @@ void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
 uint64_t ullNextTime = 0ULL;\r
 const uint64_t *pullNextTime = &ullNextTime;\r
 const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */\r
-uint32_t const ullMachineTimerCompareRegisterBase = ( uint64_t const ) ( ( configCLINT_BASE_ADDRESS ) + 0x4000 );\r
+uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;\r
 volatile uint64_t * pullMachineTimerCompareRegister = NULL;\r
 \r
 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
@@ -108,13 +116,13 @@ task stack, not the ISR stack). */
 \r
 /*-----------------------------------------------------------*/\r
 \r
-#if( configCLINT_BASE_ADDRESS != 0 )\r
+#if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )\r
 \r
        void vPortSetupTimerInterrupt( void )\r
        {\r
        uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;\r
-       volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );\r
-       volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );\r
+       volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte typer so high 32-bit word is 4 bytes up. */\r
+       volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );\r
        volatile uint32_t ulHartId;\r
 \r
                __asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );\r
@@ -127,7 +135,7 @@ task stack, not the ISR stack). */
                } while( ulCurrentTimeHigh != *pulTimeHigh );\r
 \r
                ullNextTime = ( uint64_t ) ulCurrentTimeHigh;\r
-               ullNextTime <<= 32ULL;\r
+               ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */\r
                ullNextTime |= ( uint64_t ) ulCurrentTimeLow;\r
                ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
                *pullMachineTimerCompareRegister = ullNextTime;\r
@@ -136,7 +144,7 @@ task stack, not the ISR stack). */
                ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
        }\r
 \r
-#endif /* ( configCLINT_BASE_ADDRESS != 0 ) */\r
+#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */\r
 /*-----------------------------------------------------------*/\r
 \r
 BaseType_t xPortStartScheduler( void )\r
@@ -170,7 +178,7 @@ extern void xPortStartFirstTask( void );
        configure whichever clock is to be used to generate the tick interrupt. */\r
        vPortSetupTimerInterrupt();\r
 \r
-       #if( configCLINT_BASE_ADDRESS != 0 )\r
+       #if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )\r
        {\r
                /* Enable mtime and external interrupts.  1<<7 for timer interrupt, 1<<11\r
                for external interrupt.  _RB_ What happens here when mtime is not present as\r
@@ -182,7 +190,7 @@ extern void xPortStartFirstTask( void );
                /* Enable external interrupts. */\r
                __asm volatile( "csrs mie, %0" :: "r"(0x800) );\r
        }\r
-       #endif /* configCLINT_BASE_ADDRESS */\r
+       #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */\r
 \r
        xPortStartFirstTask();\r
 \r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S
index a28942a09fa6775496236b9d8630cdd2c9aa72eb..a5756f9786b53fb50e92f7202ca8938c49395cf4 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S
@@ -71,8 +71,17 @@
 \r
 /* Check the freertos_risc_v_chip_specific_extensions.h and/or command line\r
 definitions. */\r
-#ifndef portasmHAS_CLINT\r
-       #error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_CLINT to either 1 (CLINT present) or 0 (clint not present).\r
+#if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )\r
+       #error The portasmHAS_CLINT constant has been depracted.  Please replace it with portasmHAS_CLINT.  portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.\r
+#endif\r
+\r
+#ifdef portasmHAS_CLINT\r
+       #warning The portasmHAS_CLINT constant has been depracted.  Please replace it with portasmHAS_CLINT.  For now portasmHAS_MTIME is derived from portasmHAS_CLINT.\r
+       #define portasmHAS_MTIME portasmHAS_CLINT\r
+#endif\r
+\r
+#ifndef portasmHAS_MTIME\r
+       #error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).\r
 #endif\r
 \r
 #ifndef portasmHANDLE_INTERRUPT\r
@@ -153,7 +162,7 @@ test_if_asynchronous:
 \r
 handle_asynchronous:\r
 \r
-#if( portasmHAS_CLINT != 0 )\r
+#if( portasmHAS_MTIME != 0 )\r
 \r
        test_if_mtimer:                                         /* If there is a CLINT then the mtimer is used to generate the tick interrupt. */\r
 \r
@@ -205,7 +214,7 @@ handle_asynchronous:
                addi t1, t1, 4                                  /* 0x80000007 + 4 = 0x8000000b == Machine external interrupt. */\r
                bne a0, t1, as_yet_unhandled    /* Something as yet unhandled. */\r
 \r
-#endif /* portasmHAS_CLINT */\r
+#endif /* portasmHAS_MTIME */\r
 \r
        load_x sp, xISRStackTop                         /* Switch to ISR stack before function call. */\r
        jal portasmHANDLE_INTERRUPT                     /* Jump to the interrupt handler if there is no CLINT or if there is a CLINT and it has been determined that an external interrupt is pending. */\r
@@ -284,7 +293,7 @@ processed_source:
 .func\r
 xPortStartFirstTask:\r
 \r
-#if( portasmHAS_CLINT != 0 )\r
+#if( portasmHAS_MTIME != 0 )\r
        /* If there is a clint then interrupts can branch directly to the FreeRTOS\r
        trap handler.  Otherwise the interrupt controller will need to be configured\r
        outside of this file. */\r

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
index 8e185d6f68e13c30254dac7be85e8118b18c4151..8e9ce0fbd86629b6cb010c8afa27111e8bc524c0 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h
@@ -153,6 +153,21 @@ not necessary for to use this port.  They are defined so the common demo files
 #endif\r
 \r
 #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/* configCLINT_BASE_ADDRESS is a legacy definition that was replaced by the\r
+configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions.  For\r
+backward compatibility derive the newer definitions from the old if the old\r
+definition is found. */\r
+#if defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS )\r
+       #define configMTIME_BASE_ADDRESS        ( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL )\r
+       #define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL )\r
+#elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS )\r
+       #error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html\r
+#endif\r
+\r
+\r
 \r
 #ifdef __cplusplus\r
 }\r