From: rtel Date: Fri, 7 Feb 2020 01:56:25 +0000 (+0000) Subject: Add "is inside interrupt" function to MPU ports. X-Git-Tag: V10.3.0~4 X-Git-Url: https://git.sur5r.net/?p=freertos;a=commitdiff_plain;h=bd4279c4becad04daaeb5effbca8c4a7bce884d7 Add "is inside interrupt" function to MPU ports. Make clock setup functions weak symbols in ARMv8-M ports. Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2819 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/port.c b/FreeRTOS/Source/portable/ARMv8M/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/port.c +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index e57ce9db1..f94dcd347 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -201,7 +201,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( @@ -213,7 +213,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index bebd9f6b0..a73570137 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index 95ad2f2fc..8dee923e3 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -196,7 +196,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( @@ -208,7 +208,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index bebd9f6b0..a73570137 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index dfec22dee..2aadacc79 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -176,24 +176,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " mrs r0, PRIMASK \n" - " cpsid i \n" - " bx lr \n" - ::: "memory" + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ + :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " msr PRIMASK, r0 \n" - " bx lr \n" + " msr basepri, r0 \n" /* basepri = ulMask. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -266,9 +271,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" - " cpsid i \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" " bl vTaskSwitchContext \n" - " cpsie i \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ " \n" " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ @@ -352,6 +361,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ "xRNRConst: .word 0xe000ed98 \n" "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ + :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index 90d9bc274..5ac934cd8 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index b6f1bbcef..dc5179fb3 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -171,24 +171,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " mrs r0, PRIMASK \n" - " cpsid i \n" - " bx lr \n" - ::: "memory" + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ + :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " msr PRIMASK, r0 \n" - " bx lr \n" + " msr basepri, r0 \n" /* basepri = ulMask. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -221,9 +226,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " str r0, [r1] \n" /* Save the new top of stack in TCB. */ " \n" - " cpsid i \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" " bl vTaskSwitchContext \n" - " cpsie i \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ " \n" " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ @@ -284,6 +293,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ "xRNRConst: .word 0xe000ed98 \n" "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ + :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index 90d9bc274..c582ecfb3 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 36872fabf..8ac94fd33 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -38,8 +38,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler PUBLIC vPortFreeSecureContext @@ -181,13 +181,13 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: +ulSetInterruptMask: mrs r0, PRIMASK cpsid i bx lr /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: +vClearInterruptMask: msr PRIMASK, r0 bx lr /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 38a5c7255..14cb37f86 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index b84c35685..d6a8cb844 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -34,8 +34,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler @@ -169,13 +169,13 @@ vStartFirstTask: nop /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: +ulSetInterruptMask: mrs r0, PRIMASK cpsid i bx lr /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: +vClearInterruptMask: msr PRIMASK, r0 bx lr /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 38a5c7255..14cb37f86 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 8d9bcc9cf..e3b590be9 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -24,6 +24,12 @@ * * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" EXTERN pxCurrentTCB EXTERN xSecureContext @@ -38,8 +44,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler PUBLIC vPortFreeSecureContext @@ -156,15 +162,20 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: - mrs r0, PRIMASK - cpsid i - bx lr +ulSetInterruptMask: + mrs r0, basepri /* r0 = basepri. Return original basepri value. */ + mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r1 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: - msr PRIMASK, r0 - bx lr +vClearInterruptMask: + msr basepri, r0 /* basepri = ulMask. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ PendSV_Handler: @@ -227,9 +238,13 @@ PendSV_Handler: #endif /* configENABLE_MPU */ select_next_task: - cpsid i + mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r0 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb bl vTaskSwitchContext - cpsie i + mov r0, #0 /* r0 = 0. */ + msr basepri, r0 /* Enable interrupts. */ ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r3, [r2] /* Read pxCurrentTCB. */ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 9ccdfc2a7..c5fb74b6d 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index 31623f2f2..aa65b946f 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -24,6 +24,12 @@ * * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" EXTERN pxCurrentTCB EXTERN vTaskSwitchContext @@ -34,8 +40,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler /*-----------------------------------------------------------*/ @@ -142,15 +148,20 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: - mrs r0, PRIMASK - cpsid i - bx lr +ulSetInterruptMask: + mrs r0, basepri /* r0 = basepri. Return original basepri value. */ + mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r1 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: - msr PRIMASK, r0 - bx lr +vClearInterruptMask: + msr basepri, r0 /* basepri = ulMask. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ PendSV_Handler: @@ -175,9 +186,13 @@ PendSV_Handler: ldr r1, [r2] /* Read pxCurrentTCB. */ str r0, [r1] /* Save the new top of stack in TCB. */ - cpsid i + mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r0 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb bl vTaskSwitchContext - cpsie i + mov r0, #0 /* r0 = 0. */ + msr basepri, r0 /* Enable interrupts. */ ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r1, [r2] /* Read pxCurrentTCB. */ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index 9ccdfc2a7..c5fb74b6d 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portasm.h b/FreeRTOS/Source/portable/ARMv8M/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c index e57ce9db1..f94dcd347 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -201,7 +201,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( @@ -213,7 +213,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h index bebd9f6b0..a73570137 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index 95ad2f2fc..8dee923e3 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -196,7 +196,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( @@ -208,7 +208,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index bebd9f6b0..a73570137 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c index dfec22dee..2aadacc79 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -176,24 +176,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " mrs r0, PRIMASK \n" - " cpsid i \n" - " bx lr \n" - ::: "memory" + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ + :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " msr PRIMASK, r0 \n" - " bx lr \n" + " msr basepri, r0 \n" /* basepri = ulMask. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -266,9 +271,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" - " cpsid i \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" " bl vTaskSwitchContext \n" - " cpsie i \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ " \n" " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ @@ -352,6 +361,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ "xRNRConst: .word 0xe000ed98 \n" "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ + :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h index 90d9bc274..5ac934cd8 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index b6f1bbcef..dc5179fb3 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -171,24 +171,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ } /*-----------------------------------------------------------*/ -uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " mrs r0, PRIMASK \n" - " cpsid i \n" - " bx lr \n" - ::: "memory" + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ + :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } /*-----------------------------------------------------------*/ -void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ +void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ { __asm volatile ( - " msr PRIMASK, r0 \n" - " bx lr \n" + " msr basepri, r0 \n" /* basepri = ulMask. */ + " dsb \n" + " isb \n" + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -221,9 +226,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " str r0, [r1] \n" /* Save the new top of stack in TCB. */ " \n" - " cpsid i \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" " bl vTaskSwitchContext \n" - " cpsie i \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ " \n" " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ @@ -284,6 +293,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ "xRNRConst: .word 0xe000ed98 \n" "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ + :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index 90d9bc274..c582ecfb3 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s index 36872fabf..8ac94fd33 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -38,8 +38,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler PUBLIC vPortFreeSecureContext @@ -181,13 +181,13 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: +ulSetInterruptMask: mrs r0, PRIMASK cpsid i bx lr /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: +vClearInterruptMask: msr PRIMASK, r0 bx lr /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h index 38a5c7255..14cb37f86 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index b84c35685..d6a8cb844 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -34,8 +34,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler @@ -169,13 +169,13 @@ vStartFirstTask: nop /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: +ulSetInterruptMask: mrs r0, PRIMASK cpsid i bx lr /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: +vClearInterruptMask: msr PRIMASK, r0 bx lr /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 38a5c7255..14cb37f86 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s index 8d9bcc9cf..a134120f0 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -25,6 +25,13 @@ * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + EXTERN pxCurrentTCB EXTERN xSecureContext EXTERN vTaskSwitchContext @@ -38,8 +45,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler PUBLIC vPortFreeSecureContext @@ -156,15 +163,20 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: - mrs r0, PRIMASK - cpsid i - bx lr +ulSetInterruptMask: + mrs r0, basepri /* r0 = basepri. Return original basepri value. */ + mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r1 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: - msr PRIMASK, r0 - bx lr +vClearInterruptMask: + msr basepri, r0 /* basepri = ulMask. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ PendSV_Handler: @@ -227,9 +239,13 @@ PendSV_Handler: #endif /* configENABLE_MPU */ select_next_task: - cpsid i + mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r0 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb bl vTaskSwitchContext - cpsie i + mov r0, #0 /* r0 = 0. */ + msr basepri, r0 /* Enable interrupts. */ ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r3, [r2] /* Read pxCurrentTCB. */ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h index 9ccdfc2a7..c5fb74b6d 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -257,11 +257,6 @@ #define portNO_SECURE_CONTEXT 0 /*-----------------------------------------------------------*/ -/** - * @brief Setup the timer to generate the tick interrupts. - */ -static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; - /** * @brief Used to catch tasks that attempt to return from their implementing * function. @@ -282,6 +277,22 @@ static void prvTaskExitError( void ); static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; #endif /* configENABLE_FPU */ +/** + * @brief Setup the timer to generate the tick interrupts. + * + * The implementation in this file is weak to allow application writers to + * change the timer used to generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION; + +/** + * @brief Checks whether the current execution context is interrupt. + * + * @return pdTRUE if the current execution context is interrupt, pdFALSE + * otherwise. + */ +BaseType_t xPortIsInsideInterrupt( void ); + /** * @brief Yield the processor. */ @@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */ /*-----------------------------------------------------------*/ -static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ +__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */ { /* Stop and reset the SysTick. */ *( portNVIC_SYSTICK_CTRL ) = 0UL; @@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled * here already. */ - prvSetupTimerInterrupt(); + vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; @@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ + +BaseType_t xPortIsInsideInterrupt( void ) +{ +uint32_t ulCurrentInterrupt; +BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. Interrupt Program + * Status Register (IPSR) holds the exception number of the currently-executing + * exception or zero for Thread mode.*/ + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index 6314e9658..8fc58eab2 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; /** * @brief Disables interrupts. */ -uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief Enables interrupts. */ -void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; +void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; /** * @brief PendSV Exception handler. diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index 31623f2f2..e7c888e7c 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -25,6 +25,13 @@ * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + EXTERN pxCurrentTCB EXTERN vTaskSwitchContext EXTERN vPortSVCHandler_C @@ -34,8 +41,8 @@ PUBLIC vRestoreContextOfFirstTask PUBLIC vRaisePrivilege PUBLIC vStartFirstTask - PUBLIC ulSetInterruptMaskFromISR - PUBLIC vClearInterruptMaskFromISR + PUBLIC ulSetInterruptMask + PUBLIC vClearInterruptMask PUBLIC PendSV_Handler PUBLIC SVC_Handler /*-----------------------------------------------------------*/ @@ -142,15 +149,20 @@ vStartFirstTask: svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ /*-----------------------------------------------------------*/ -ulSetInterruptMaskFromISR: - mrs r0, PRIMASK - cpsid i - bx lr +ulSetInterruptMask: + mrs r0, basepri /* r0 = basepri. Return original basepri value. */ + mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r1 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ -vClearInterruptMaskFromISR: - msr PRIMASK, r0 - bx lr +vClearInterruptMask: + msr basepri, r0 /* basepri = ulMask. */ + dsb + isb + bx lr /* Return. */ /*-----------------------------------------------------------*/ PendSV_Handler: @@ -175,9 +187,13 @@ PendSV_Handler: ldr r1, [r2] /* Read pxCurrentTCB. */ str r0, [r1] /* Save the new top of stack in TCB. */ - cpsid i + mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r0 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + dsb + isb bl vTaskSwitchContext - cpsie i + mov r0, #0 /* r0 = 0. */ + msr basepri, r0 /* Enable interrupts. */ ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r1, [r2] /* Read pxCurrentTCB. */ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index 9ccdfc2a7..c5fb74b6d 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t; /** * @brief Extern declarations. */ +extern BaseType_t xPortIsInsideInterrupt( void ); + extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; -extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; -extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; +extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; #if( configENABLE_TRUSTZONE == 1 ) extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ @@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS /** * @brief Critical section management. */ -#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() -#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) -#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) -#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) +#define portDISABLE_INTERRUPTS() ulSetInterruptMask() +#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s index 1c0db8da7..d223de62b 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -24,7 +24,11 @@ * * 1 tab == 4 spaces! */ - +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include RSEG CODE:CODE(2) diff --git a/Upgrading to FreeRTOS V10.3.0.url b/Upgrading to FreeRTOS V10.3.0.url new file mode 100644 index 000000000..a30f01875 --- /dev/null +++ b/Upgrading to FreeRTOS V10.3.0.url @@ -0,0 +1,5 @@ +[{000214A0-0000-0000-C000-000000000046}] +Prop3=19,11 +[InternetShortcut] +IDList= +URL=https://www.freertos.org/FreeRTOS-V10.3.x.html