From 4f2054f711d7de73f640eb102cbf7031835bb497 Mon Sep 17 00:00:00 2001 From: rtel Date: Wed, 9 Oct 2019 04:50:11 +0000 Subject: [PATCH] Base project to replace existing Freedom Studio project using latest Freedom Studio project format - builds and executes but does not yet include RTOS code. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2733 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../RISC-V_RV32_SiFive_HiFive1_GCC/.cproject | 75 + .../RISC-V_RV32_SiFive_HiFive1_GCC/.project | 26 + .../.settings/language.settings.xml | 14 + .../bsp/install/include/metal/button.h | 59 + .../bsp/install/include/metal/cache.h | 58 + .../bsp/install/include/metal/clock.h | 119 + .../bsp/install/include/metal/compiler.h | 22 + .../bsp/install/include/metal/cpu.h | 271 + .../include/metal/drivers/fixed-clock.h | 22 + .../metal/drivers/fixed-factor-clock.h | 22 + .../include/metal/drivers/riscv_clint0.h | 24 + .../install/include/metal/drivers/riscv_cpu.h | 203 + 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+ .../bsp/install/include/metal/lock.h | 127 + .../bsp/install/include/metal/machine.h | 872 ++ .../install/include/metal/machine/inline.h | 249 + .../install/include/metal/machine/platform.h | 237 + .../bsp/install/include/metal/memory.h | 81 + .../bsp/install/include/metal/pmp.h | 204 + .../bsp/install/include/metal/privilege.h | 122 + .../bsp/install/include/metal/shutdown.h | 36 + .../bsp/install/include/metal/spi.h | 78 + .../bsp/install/include/metal/switch.h | 51 + .../bsp/install/include/metal/timer.h | 36 + .../bsp/install/include/metal/tty.h | 23 + .../bsp/install/include/metal/uart.h | 94 + .../bsp/metal-inline.h | 249 + .../bsp/metal-platform.h | 237 + .../bsp/metal.default.lds | 234 + .../bsp/metal.h | 872 ++ .../freedom-metal/doc/Makefile | 52 + .../freedom-metal/doc/README.md | 55 + .../freedom-metal/doc/html/.buildinfo | 4 + .../doc/html/.doctrees/api.doctree | Bin 0 -> 3460 bytes .../doc/html/.doctrees/apiref/button.doctree | Bin 0 -> 16759 bytes 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.../freedom-metal/metal/button.h | 59 + .../freedom-metal/metal/cache.h | 58 + .../freedom-metal/metal/clock.h | 119 + .../freedom-metal/metal/compiler.h | 22 + .../freedom-metal/metal/cpu.h | 271 + .../freedom-metal/metal/drivers/fixed-clock.h | 22 + .../metal/drivers/fixed-factor-clock.h | 22 + .../metal/drivers/riscv_clint0.h | 24 + .../freedom-metal/metal/drivers/riscv_cpu.h | 203 + .../freedom-metal/metal/drivers/riscv_plic0.h | 31 + .../metal/drivers/sifive_clic0.h | 42 + .../metal/drivers/sifive_fe310-g000_hfrosc.h | 22 + .../metal/drivers/sifive_fe310-g000_hfxosc.h | 20 + .../metal/drivers/sifive_fe310-g000_pll.h | 26 + .../metal/drivers/sifive_fe310-g000_prci.h | 23 + .../metal/drivers/sifive_fu540-c000_l2.h | 23 + .../sifive_global-external-interrupts0.h | 21 + .../metal/drivers/sifive_gpio-buttons.h | 21 + .../metal/drivers/sifive_gpio-leds.h | 21 + .../metal/drivers/sifive_gpio-switches.h | 21 + .../metal/drivers/sifive_gpio0.h | 22 + .../sifive_local-external-interrupts0.h | 22 + .../freedom-metal/metal/drivers/sifive_spi0.h | 24 + .../metal/drivers/sifive_test0.h | 21 + .../metal/drivers/sifive_uart0.h | 28 + .../freedom-metal/metal/gpio.h | 151 + .../freedom-metal/metal/interrupt.h | 134 + .../freedom-metal/metal/io.h | 22 + .../freedom-metal/metal/itim.h | 21 + .../freedom-metal/metal/led.h | 68 + .../freedom-metal/metal/lock.h | 127 + .../freedom-metal/metal/memory.h | 81 + .../freedom-metal/metal/pmp.h | 204 + .../freedom-metal/metal/privilege.h | 122 + .../freedom-metal/metal/shutdown.h | 36 + .../freedom-metal/metal/spi.h | 78 + .../freedom-metal/metal/switch.h | 51 + .../freedom-metal/metal/timer.h | 36 + .../freedom-metal/metal/tty.h | 23 + .../freedom-metal/metal/uart.h | 94 + .../freedom-metal/src/button.c | 27 + .../freedom-metal/src/cache.c | 8 + .../freedom-metal/src/clock.c | 9 + .../freedom-metal/src/cpu.c | 59 + .../freedom-metal/src/drivers/fixed-clock.c | 27 + .../src/drivers/fixed-factor-clock.c | 32 + .../freedom-metal/src/drivers/inline.c | 5 + .../freedom-metal/src/drivers/riscv_clint0.c | 218 + .../freedom-metal/src/drivers/riscv_cpu.c | 690 ++ .../freedom-metal/src/drivers/riscv_plic0.c | 172 + .../freedom-metal/src/drivers/sifive_clic0.c | 564 + .../src/drivers/sifive_fe310-g000_hfrosc.c | 42 + .../src/drivers/sifive_fe310-g000_hfxosc.c | 41 + .../src/drivers/sifive_fe310-g000_pll.c | 360 + .../src/drivers/sifive_fe310-g000_prci.c | 26 + .../src/drivers/sifive_fu540-c000_l2.c | 81 + .../sifive_global-external-interrupts0.c | 120 + .../src/drivers/sifive_gpio-buttons.c | 55 + .../src/drivers/sifive_gpio-leds.c | 83 + .../src/drivers/sifive_gpio-switches.c | 54 + .../freedom-metal/src/drivers/sifive_gpio0.c | 85 + .../sifive_local-external-interrupts0.c | 117 + .../freedom-metal/src/drivers/sifive_spi0.c | 277 + .../freedom-metal/src/drivers/sifive_test0.c | 26 + .../freedom-metal/src/drivers/sifive_uart0.c | 151 + .../freedom-metal/src/entry.S | 107 + .../freedom-metal/src/gpio.c | 22 + .../freedom-metal/src/interrupt.c | 24 + .../freedom-metal/src/led.c | 38 + .../freedom-metal/src/lock.c | 8 + .../freedom-metal/src/memory.c | 26 + .../freedom-metal/src/pmp.c | 580 + .../freedom-metal/src/privilege.c | 57 + .../freedom-metal/src/shutdown.c | 22 + .../freedom-metal/src/spi.c | 19 + .../freedom-metal/src/switch.c | 27 + .../freedom-metal/src/timer.c | 80 + .../freedom-metal/src/trap.S | 53 + .../freedom-metal/src/tty.c | 37 + .../freedom-metal/src/uart.c | 10 + .../src/LICENSE | 3 + .../src/LICENSE.Apache2 | 202 + .../src/LICENSE.MIT | 21 + .../src/README.md | 2 + .../src/sifive-welcome.c | 158 + 313 files changed, 35861 insertions(+) create mode 100644 FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject create mode 100644 FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project create mode 100644 FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.settings/language.settings.xml create mode 100644 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FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/README.md create mode 100644 FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/sifive-welcome.c diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject new file mode 100644 index 000000000..1c18fb8ef --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject @@ -0,0 +1,75 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project new file mode 100644 index 000000000..1ee79134e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project @@ -0,0 +1,26 @@ + + + RTOSDemo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.settings/language.settings.xml b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.settings/language.settings.xml new file mode 100644 index 000000000..569805cb5 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.settings/language.settings.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/button.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/button.h new file mode 100644 index 000000000..0c26f435a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/button.h @@ -0,0 +1,59 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__BUTTON_H +#define METAL__BUTTON_H + +/*! + * @file button.h + * API for interfacing with physical buttons + */ + +#include + +struct metal_button; + +struct metal_button_vtable { + int (*button_exist)(struct metal_button *button, char *label); + struct metal_interrupt* (*interrupt_controller)(struct metal_button *button); + int (*get_interrupt_id)(struct metal_button *button); +}; + +/*! + * @brief A button device handle + * + * A `struct metal_button` is an implementation-defined object which represents + * a button on a development board. + */ +struct metal_button { + const struct metal_button_vtable *vtable; +}; + +/*! + * @brief Get a reference to a button + * + * @param label The DeviceTree label for the button + * @return A handle for the button + */ +struct metal_button* metal_button_get(char *label); + + +/*! + * @brief Get the interrupt controller for a button + * + * @param button The handle for the button + * @return A pointer to the interrupt controller responsible for handling + * button interrupts. + */ +inline struct metal_interrupt* + metal_button_interrupt_controller(struct metal_button *button) { return button->vtable->interrupt_controller(button); } + +/*! + * @brief Get the interrupt id for a button + * + * @param button The handle for the button + * @return The interrupt id corresponding to a button. + */ +inline int metal_button_get_interrupt_id(struct metal_button *button) { return button->vtable->get_interrupt_id(button); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cache.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cache.h new file mode 100644 index 000000000..a8a60ada6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cache.h @@ -0,0 +1,58 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__CACHE_H +#define METAL__CACHE_H + +/*! + * @file cache.h + * + * @brief API for configuring caches + */ + +struct metal_cache; + +struct __metal_cache_vtable { + void (*init)(struct metal_cache *cache, int ways); + int (*get_enabled_ways)(struct metal_cache *cache); + int (*set_enabled_ways)(struct metal_cache *cache, int ways); +}; + +/*! + * @brief a handle for a cache + */ +struct metal_cache { + const struct __metal_cache_vtable *vtable; +}; + +/*! + * @brief Initialize a cache + * @param cache The handle for the cache to initialize + * @param ways The number of ways to enable + * + * Initializes a cache with the requested number of ways enabled. + */ +inline void metal_cache_init(struct metal_cache *cache, int ways) { + return cache->vtable->init(cache, ways); +} + +/*! + * @brief Get the current number of enabled cache ways + * @param cache The handle for the cache + * @return The current number of enabled cache ways + */ +inline int metal_cache_get_enabled_ways(struct metal_cache *cache) { + return cache->vtable->get_enabled_ways(cache); +} + +/*! + * @brief Enable the requested number of cache ways + * @param cache The handle for the cache + * @param ways The number of ways to enabled + * @return 0 if the ways are successfully enabled + */ +inline int metal_cache_set_enabled_ways(struct metal_cache *cache, int ways) { + return cache->vtable->set_enabled_ways(cache, ways); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/clock.h new file mode 100644 index 000000000..277841e01 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/clock.h @@ -0,0 +1,119 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__CLOCK_H +#define METAL__CLOCK_H + +/*! + * @file clock.h + * @brief API for manipulating clock sources + * + * The clock interface allows for controlling the rate of various clocks in the system. + */ + +struct metal_clock; + +#include + +/* The generic interface to all clocks. */ +struct __metal_clock_vtable { + long (*get_rate_hz)(const struct metal_clock *clk); + long (*set_rate_hz)(struct metal_clock *clk, long hz); +}; + +/*! + * @brief Function signature of clock pre-rate change callbacks + */ +typedef void (*metal_clock_pre_rate_change_callback)(void *priv); + +/*! + * @brief Function signature of clock post-rate change callbacks + */ +typedef void (*metal_clock_post_rate_change_callback)(void *priv); + +/*! + * @struct metal_clock + * @brief The handle for a clock + * + * Clocks are defined as a pointer to a `struct metal_clock`, the contents of which + * are implementation defined. Users of the clock interface must call functions + * which accept a `struct metal_clock *` as an argument to interract with the clock. + * + * Note that no mechanism for obtaining a pointer to a `struct metal_clock` has been + * defined, making it impossible to call any of these functions without invoking + * implementation-defined behavior. + */ +struct metal_clock { + const struct __metal_clock_vtable *vtable; + + /* Pre-rate change callback */ + metal_clock_pre_rate_change_callback _pre_rate_change_callback; + void *_pre_rate_change_callback_priv; + + /* Post-rate change callback */ + metal_clock_post_rate_change_callback _post_rate_change_callback; + void *_post_rate_change_callback_priv; +}; + +/*! + * @brief Returns the current rate of the given clock + * + * @param clk The handle for the clock + * @return The current rate of the clock in Hz + */ +inline long metal_clock_get_rate_hz(const struct metal_clock *clk) { return clk->vtable->get_rate_hz(clk); } + +/*! + * @brief Set the current rate of a clock + * + * @param clk The handle for the clock + * @param hz The desired rate in Hz + * @return The new rate of the clock in Hz. + * + * Attempts to set the current rate of the given clock to as close as possible + * to the given rate in Hz. Returns the actual value that's been selected, which + * could be anything! + * + * Prior to and after the rate change of the clock, this will call the registered + * pre- and post-rate change callbacks. + */ +inline long metal_clock_set_rate_hz(struct metal_clock *clk, long hz) +{ + if(clk->_pre_rate_change_callback != NULL) + clk->_pre_rate_change_callback(clk->_pre_rate_change_callback_priv); + + long out = clk->vtable->set_rate_hz(clk, hz); + + if (clk->_post_rate_change_callback != NULL) + clk->_post_rate_change_callback(clk->_post_rate_change_callback_priv); + + return out; +} + +/*! + * @brief Register a callback that must be called before a rate change + * + * @param clk The handle for the clock + * @param cb The callback to be registered + * @param priv Private data for the callback handler + */ +inline void metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, metal_clock_pre_rate_change_callback cb, void *priv) +{ + clk->_pre_rate_change_callback = cb; + clk->_pre_rate_change_callback_priv = priv; +} + +/*! + * @brief Registers a callback that must be called after a rate change + * + * @param clk The handle for the clock + * @param cb The callback to be registered + * @param priv Private data for the callback handler + */ +inline void metal_clock_register_post_rate_change_callback(struct metal_clock *clk, metal_clock_post_rate_change_callback cb, void *priv) +{ + clk->_post_rate_change_callback = cb; + clk->_post_rate_change_callback_priv = priv; +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/compiler.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/compiler.h new file mode 100644 index 000000000..62c0ea975 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/compiler.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__COMPILER_H +#define METAL__COMPILER_H + +#define __METAL_DECLARE_VTABLE(type) \ + extern const struct type type; + +#define __METAL_DEFINE_VTABLE(type) \ + const struct type type + +#define __METAL_GET_FIELD(reg, mask) \ + (((reg) & (mask)) / ((mask) & ~((mask) << 1))) + +/* Set field with mask for a given value */ +#define __METAL_SET_FIELD(reg, mask, val) \ + (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask))) + +void _metal_trap(int ecode); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cpu.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cpu.h new file mode 100644 index 000000000..453bd12de --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/cpu.h @@ -0,0 +1,271 @@ +/* Copyright 2018 SiFive, Inc */ + +/* SPDX-License-Identifier: Apache-2.0 */ + +/*! @file cpu.h + * @brief API for accessing CPU capabilities. + */ + +#ifndef METAL__CPU_H +#define METAL__CPU_H + +#include +#include + +struct metal_cpu; + +/*! + * @brief Function signature for exception handlers + */ +typedef void (*metal_exception_handler_t) (struct metal_cpu *cpu, int ecode); + +struct metal_cpu_vtable { + unsigned long long (*timer_get)(struct metal_cpu *cpu); + unsigned long long (*timebase_get)(struct metal_cpu *cpu); + unsigned long long (*mtime_get)(struct metal_cpu *cpu); + int (*mtimecmp_set)(struct metal_cpu *cpu, unsigned long long time); + struct metal_interrupt* (*tmr_controller_interrupt)(struct metal_cpu *cpu); + int (*get_tmr_interrupt_id)(struct metal_cpu *cpu); + struct metal_interrupt* (*sw_controller_interrupt)(struct metal_cpu *cpu); + int (*get_sw_interrupt_id)(struct metal_cpu *cpu); + int (*set_sw_ipi)(struct metal_cpu *cpu, int hartid); + int (*clear_sw_ipi)(struct metal_cpu *cpu, int hartid); + int (*get_msip)(struct metal_cpu *cpu, int hartid); + struct metal_interrupt* (*controller_interrupt)(struct metal_cpu *cpu); + int (*exception_register)(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler); + int (*get_ilen)(struct metal_cpu *cpu, uintptr_t epc); + uintptr_t (*get_epc)(struct metal_cpu *cpu); + int (*set_epc)(struct metal_cpu *cpu, uintptr_t epc); +}; + +/*! @brief A device handle for a CPU hart + */ +struct metal_cpu { + const struct metal_cpu_vtable *vtable; +}; + +/*! @brief Get a reference to a CPU hart + * + * @param hartid The ID of the desired CPU hart + * @return A pointer to the CPU device handle + */ +struct metal_cpu* metal_cpu_get(int hartid); + +/*! @brief Get the hartid of the CPU hart executing this function + * + * @return The hartid of the current CPU hart */ +int metal_cpu_get_current_hartid(); + +/*! @brief Get the number of CPU harts + * + * @return The number of CPU harts */ +int metal_cpu_get_num_harts(); + +/*! @brief Get the CPU cycle count timer value + * + * Get the value of the cycle count timer for a given CPU + * + * @param cpu The CPU device handle + * @return The value of the CPU cycle count timer + */ +inline unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu) +{ return cpu->vtable->timer_get(cpu); } + +/*! @brief Get the timebase of the CPU + * + * Get the value of the timebase of the cycle count timer + * + * @param cpu The CPU device handle + * @return The value of the cycle count timer timebase + */ +inline unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu) +{ return cpu->vtable->timebase_get(cpu); } + +/*! @brief Get the value of the mtime RTC + * + * Get the value of the mtime real-time clock. The CPU interrupt controller + * must be initialized before this function is called or the return value + * will be 0. + * + * @param cpu The CPU device handle + * @return The value of mtime, or 0 if failure + */ +inline unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu) +{ return cpu->vtable->mtime_get(cpu); } + +/*! @brief Set the value of the RTC mtimecmp RTC + * + * Set the value of the mtime real-time clock compare register. The CPU + * interrupt controller must be initialized before this function is called + * or the return value will be -1; + * + * @param cpu The CPU device handle + * @param time The value to set the compare register to + * @return The value of mtimecmp or -1 if error + */ +inline int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, unsigned long long time) +{ return cpu->vtable->mtimecmp_set(cpu, time); } + +/*! @brief Get a reference to RTC timer interrupt controller + * + * Get a reference to the interrupt controller for the real-time clock interrupt. + * The controller returned by this function must be initialized before any interrupts + * are registered or enabled with it. + * + * @param cpu The CPU device handle + * @return A pointer to the timer interrupt handle + */ +inline struct metal_interrupt* metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->tmr_controller_interrupt(cpu); } + +/*! @brief Get the RTC timer interrupt id + * + * Get the interrupt ID of the real-time clock interrupt + * + * @param cpu The CPU device handle + * @return The timer interrupt ID + */ +inline int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu) +{ return cpu->vtable->get_tmr_interrupt_id(cpu); } + +/*! @brief Get a reference to the software interrupt controller + * + * Get a reference to the interrupt controller for the software/inter-process + * interrupt. The controller returned by this function must be initialized before + * any interrupts are registered or enabled with it. + * + * @param cpu The CPU device handle + * @return A pointer to the software interrupt handle + */ +inline struct metal_interrupt* metal_cpu_software_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->sw_controller_interrupt(cpu); } + +/*! @brief Get the software interrupt id + * + * Get the interrupt ID for the software/inter-process interrupt + * + * @param cpu The CPU device handle + * @return the software interrupt ID + */ +inline int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu) +{ return cpu->vtable->get_sw_interrupt_id(cpu); } + +/*! + * @brief Set the inter-process interrupt for a hart + * + * Trigger a software/inter-process interrupt for a hart. The CPU interrupt + * controller for the CPU handle passed to this function must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param hartid The CPU hart ID to be interrupted + * @return 0 upon success + */ +inline int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->set_sw_ipi(cpu, hartid); } + +/*! + * @brief Clear the inter-process interrupt for a hart + * + * Clear the software/inter-process interrupt for a hart. The CPU interrupt + * controller for the CPU handle passed to this function must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param hartid The CPU hart ID to clear + * @return 0 upon success + */ +inline int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->clear_sw_ipi(cpu, hartid); } + +/*! + * @brief Get the value of MSIP for the given hart + * + * Get the value of the machine software interrupt pending bit for + * the given hart. The CPU interrupt controller for the CPU handle passed + * as argument to this function must be initialized before this function + * is called. + * + * @param cpu the CPU device handle + * @param hartid The CPU hart to read + * @return 0 upon success + */ +inline int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->get_msip(cpu, hartid); } + +/*! + * @brief Get the interrupt controller for the CPU + * + * Get the CPU interrupt controller. The controller returned by this + * function must be initialized before any interrupts are registered + * or enabled and before any exception handlers are registered with + * this CPU. + * + * @param cpu The CPU device handle + * @return The handle for the CPU interrupt controller + */ +inline struct metal_interrupt* metal_cpu_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->controller_interrupt(cpu); } + +/*! + * @brief Register an exception handler + * + * Register an exception handler for the CPU. The CPU interrupt controller must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param ecode The exception code to register a handler for + * @param handler Callback function for the exception handler + * @return 0 upon success + */ +inline int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler) +{ return cpu->vtable->exception_register(cpu, ecode, handler); } + +/*! + * @brief Get the length of an instruction in bytes + * + * Get the length of an instruction in bytes. + * + * On RISC-V platforms, this is useful for detecting whether an instruction is + * compressed (2 bytes long) or uncompressed (4 bytes long). + * + * This function is useful in conjuction with `metal_cpu_get_exception_pc()` + * and `metal_cpu_set_exception_pc()` in order to cause the exception handler to + * return execution after the faulting instruction. + * + * @param cpu The CPU device handle + * @param epc The address of the instruction to measure + * @return the length of the instruction in bytes + */ +inline int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc) +{ return cpu->vtable->get_ilen(cpu, epc); } + +/*! + * @brief Get the program counter of the current exception. + * + * This function must be called within an exception handler. The behavior is + * undefined outside of an exception handler. + * + * @param cpu The CPU device handle + * @return The value of the program counter at the time of the exception + */ +inline uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu) +{ return cpu->vtable->get_epc(cpu); } + +/*! + * @brief Set the exception program counter + * + * This function must be called within an exception handler. The behavior + * is undefined outside of an exception handler. + * + * This function can be used to cause an exception handler to return execution + * to an address other than the one that caused the exception. + * + * @param cpu the CPU device handle + * @param epc The address to set the exception program counter to + * @return 0 upon success + */ +inline int metal_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t epc) +{ return cpu->vtable->set_epc(cpu, epc); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-clock.h new file mode 100644 index 000000000..2647c5981 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-clock.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__FIXED_CLOCK_H +#define METAL__DRIVERS__FIXED_CLOCK_H + +struct __metal_driver_fixed_clock; + +#include +#include + +struct __metal_driver_vtable_fixed_clock { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_fixed_clock) + +struct __metal_driver_fixed_clock { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-factor-clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-factor-clock.h new file mode 100644 index 000000000..936ce8d77 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/fixed-factor-clock.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__FIXED_FACTOR_CLOCK_H +#define METAL__DRIVERS__FIXED_FACTOR_CLOCK_H + +struct __metal_driver_fixed_factor_clock; + +#include +#include + +struct __metal_driver_vtable_fixed_factor_clock { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_fixed_factor_clock) + +struct __metal_driver_fixed_factor_clock { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_clint0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_clint0.h new file mode 100644 index 000000000..08d571e1c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_clint0.h @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_CLINT0_H +#define METAL__DRIVERS__RISCV_CLINT0_H + +#include +#include + +struct __metal_driver_vtable_riscv_clint0 { + struct metal_interrupt_vtable clint_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_clint0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_riscv_clint0 { + struct metal_interrupt controller; + int init_done; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_cpu.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_cpu.h new file mode 100644 index 000000000..eb1e5b8ca --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_cpu.h @@ -0,0 +1,203 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_CPU_H +#define METAL__DRIVERS__RISCV_CPU_H + +#include +#include +#include + +#define METAL_MAX_CORES 8 +#define METAL_MAX_MI 32 /* Per ISA MCause interrupts 32+ are Reserved */ +#define METAL_MAX_ME 12 /* Per ISA Exception codes 12+ are Reserved */ +#define METAL_DEFAULT_RTC_FREQ 32768 + +#define METAL_DISABLE 0 +#define METAL_ENABLE 1 + +#define METAL_ISA_A_EXTENSIONS 0x0001 +#define METAL_ISA_C_EXTENSIONS 0x0004 +#define METAL_ISA_D_EXTENSIONS 0x0008 +#define METAL_ISA_E_EXTENSIONS 0x0010 +#define METAL_ISA_F_EXTENSIONS 0x0020 +#define METAL_ISA_G_EXTENSIONS 0x0040 +#define METAL_ISA_I_EXTENSIONS 0x0100 +#define METAL_ISA_M_EXTENSIONS 0x1000 +#define METAL_ISA_N_EXTENSIONS 0x2000 +#define METAL_ISA_Q_EXTENSIONS 0x10000 +#define METAL_ISA_S_EXTENSIONS 0x40000 +#define METAL_ISA_U_EXTENSIONS 0x100000 +#define METAL_ISA_V_EXTENSIONS 0x200000 +#define METAL_ISA_XL32_EXTENSIONS 0x40000000UL +#define METAL_ISA_XL64_EXTENSIONS 0x8000000000000000UL +#define METAL_ISA_XL128_EXTENSIONS 0xC000000000000000UL + +#define METAL_MTVEC_DIRECT 0x00 +#define METAL_MTVEC_VECTORED 0x01 +#define METAL_MTVEC_CLIC 0x02 +#define METAL_MTVEC_CLIC_VECTORED 0x03 +#define METAL_MTVEC_CLIC_RESERVED 0x3C +#define METAL_MTVEC_MASK 0x3F +#if __riscv_xlen == 32 +#define METAL_MCAUSE_INTR 0x80000000UL +#define METAL_MCAUSE_CAUSE 0x000003FFUL +#else +#define METAL_MCAUSE_INTR 0x8000000000000000UL +#define METAL_MCAUSE_CAUSE 0x00000000000003FFUL +#endif +#define METAL_MCAUSE_MINHV 0x40000000UL +#define METAL_MCAUSE_MPP 0x30000000UL +#define METAL_MCAUSE_MPIE 0x08000000UL +#define METAL_MCAUSE_MPIL 0x00FF0000UL +#define METAL_MSTATUS_MIE 0x00000008UL +#define METAL_MSTATUS_MPIE 0x00000080UL +#define METAL_MSTATUS_MPP 0x00001800UL +#define METAL_MSTATUS_FS_INIT 0x00002000UL +#define METAL_MSTATUS_FS_CLEAN 0x00004000UL +#define METAL_MSTATUS_FS_DIRTY 0x00006000UL +#define METAL_MSTATUS_MPRV 0x00020000UL +#define METAL_MSTATUS_MXR 0x00080000UL +#define METAL_MINTSTATUS_MIL 0xFF000000UL +#define METAL_MINTSTATUS_SIL 0x0000FF00UL +#define METAL_MINTSTATUS_UIL 0x000000FFUL + +#define METAL_LOCAL_INTR(X) (16 + X) +#define METAL_MCAUSE_EVAL(cause) (cause & METAL_MCAUSE_INTR) +#define METAL_INTERRUPT(cause) (METAL_MCAUSE_EVAL(cause) ? 1 : 0) +#define METAL_EXCEPTION(cause) (METAL_MCAUSE_EVAL(cause) ? 0 : 1) +#define METAL_SW_INTR_EXCEPTION (METAL_MCAUSE_INTR + 3) +#define METAL_TMR_INTR_EXCEPTION (METAL_MCAUSE_INTR + 7) +#define METAL_EXT_INTR_EXCEPTION (METAL_MCAUSE_INTR + 11) +#define METAL_LOCAL_INTR_EXCEPTION(X) (METAL_MCAUSE_INTR + METAL_LOCAL_INTR(X)) +#define METAL_LOCAL_INTR_RESERVE0 1 +#define METAL_LOCAL_INTR_RESERVE1 2 +#define METAL_LOCAL_INTR_RESERVE2 4 +#define METAL_LOCAL_INTERRUPT_SW 8 /* Bit3 0x008 */ +#define METAL_LOCAL_INTR_RESERVE4 16 +#define METAL_LOCAL_INTR_RESERVE5 32 +#define METAL_LOCAL_INTR_RESERVE6 64 +#define METAL_LOCAL_INTERRUPT_TMR 128 /* Bit7 0x080 */ +#define METAL_LOCAL_INTR_RESERVE8 256 +#define METAL_LOCAL_INTR_RESERVE9 512 +#define METAL_LOCAL_INTR_RESERVE10 1024 +#define METAL_LOCAL_INTERRUPT_EXT 2048 /* Bit11 0x800 */ +/* Bit12 to Bit15 are Reserved */ +#define METAL_LOCAL_INTERRUPT(X) (0x10000 << X) /* Bit16+ Start of Custom Local Interrupt */ +#define METAL_MIE_INTERRUPT METAL_MSTATUS_MIE + +typedef enum { + METAL_MACHINE_PRIVILEGE_MODE, + METAL_SUPERVISOR_PRIVILEGE_MODE, + METAL_USER_PRIVILEGE_MODE, +} metal_privilege_mode_e; + +typedef enum { + METAL_INTERRUPT_ID_BASE, + METAL_INTERRUPT_ID_SW = (METAL_INTERRUPT_ID_BASE + 3), + METAL_INTERRUPT_ID_TMR = (METAL_INTERRUPT_ID_BASE + 7), + METAL_INTERRUPT_ID_EXT = (METAL_INTERRUPT_ID_BASE + 11), + METAL_INTERRUPT_ID_LC0 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(0)), + METAL_INTERRUPT_ID_LC1 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(1)), + METAL_INTERRUPT_ID_LC2 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(2)), + METAL_INTERRUPT_ID_LC3 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(3)), + METAL_INTERRUPT_ID_LC4 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(4)), + METAL_INTERRUPT_ID_LC5 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(5)), + METAL_INTERRUPT_ID_LC6 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(6)), + METAL_INTERRUPT_ID_LC7 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(7)), + METAL_INTERRUPT_ID_LC8 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(8)), + METAL_INTERRUPT_ID_LC9 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(9)), + METAL_INTERRUPT_ID_LC10 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(10)), + METAL_INTERRUPT_ID_LC11 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(11)), + METAL_INTERRUPT_ID_LC12 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(12)), + METAL_INTERRUPT_ID_LC13 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(13)), + METAL_INTERRUPT_ID_LC14 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(14)), + METAL_INTERRUPT_ID_LC15 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(15)), + METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GL0 = METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GLMX = (METAL_MCAUSE_CAUSE + 1), +} metal_interrupt_id_e; + +typedef enum { + METAL_IAM_EXCEPTION_CODE, /* Instruction address misaligned */ + METAL_IAF_EXCEPTION_CODE, /* Instruction access faultd */ + METAL_II_EXCEPTION_CODE, /* Illegal instruction */ + METAL_BREAK_EXCEPTION_CODE, /* Breakpoint */ + METAL_LAM_EXCEPTION_CODE, /* Load address misaligned */ + METAL_LAF_EXCEPTION_CODE, /* Load access fault */ + METAL_SAMOAM_EXCEPTION_CODE, /* Store/AMO address misaligned */ + METAL_SAMOAF_EXCEPTION_CODE, /* Store/AMO access fault */ + METAL_ECALL_U_EXCEPTION_CODE, /* Environment call from U-mode */ + METAL_R9_EXCEPTION_CODE, /* Reserved */ + METAL_R10_EXCEPTION_CODE, /* Reserved */ + METAL_ECALL_M_EXCEPTION_CODE, /* Environment call from M-mode */ + METAL_MAX_EXCEPTION_CODE, +} metal_exception_code_e; + +typedef enum { + METAL_TIMER_MTIME_GET = 1, + METAL_SOFTWARE_IPI_CLEAR, + METAL_SOFTWARE_IPI_SET, + METAL_SOFTWARE_MSIP_GET, + METAL_MAX_INTERRUPT_GET, + METAL_INDEX_INTERRUPT_GET, +} metal_interrup_cmd_e; + +typedef struct __metal_interrupt_data { + long long pad : 64; + metal_interrupt_handler_t handler; + void *sub_int; + void *exint_data; +} __metal_interrupt_data; + +/* CPU interrupt controller */ + +uintptr_t __metal_myhart_id(void); + +struct __metal_driver_interrupt_controller_vtable { + void (*interrupt_init)(struct metal_interrupt *controller); + int (*interrupt_register)(struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, void *priv_data); + int (*interrupt_enable)(struct metal_interrupt *controller, int id); + int (*interrupt_disable)(struct metal_interrupt *controller, int id); + int (*command_request)(struct metal_interrupt *intr, int cmd, void *data); +}; + +struct __metal_driver_vtable_riscv_cpu_intc { + struct metal_interrupt_vtable controller_vtable; +}; + + +void __metal_interrupt_global_enable(void); +void __metal_interrupt_global_disable(void); +void __metal_controller_interrupt_vector(metal_vector_mode mode, void *vec_table); +inline int __metal_controller_interrupt_is_selective_vectored (void) +{ + uintptr_t val; + + asm volatile ("csrr %0, mtvec" : "=r"(val)); + return ((val & METAL_MTVEC_CLIC_VECTORED) == METAL_MTVEC_CLIC); +} + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_cpu_intc) + +struct __metal_driver_riscv_cpu_intc { + struct metal_interrupt controller; + int init_done; + uintptr_t metal_mtvec_table[METAL_MAX_MI]; + __metal_interrupt_data metal_int_table[METAL_MAX_MI]; + metal_exception_handler_t metal_exception_table[METAL_MAX_ME]; +}; + +/* CPU driver*/ +struct __metal_driver_vtable_cpu { + struct metal_cpu_vtable cpu_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_cpu) + +struct __metal_driver_cpu { + struct metal_cpu cpu; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_plic0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_plic0.h new file mode 100644 index 000000000..159ee6d69 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/riscv_plic0.h @@ -0,0 +1,31 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_PLIC0_H +#define METAL__DRIVERS__RISCV_PLIC0_H + +#include +#include + +#define METAL_PLIC_SOURCE_MASK 0x1F +#define METAL_PLIC_SOURCE_SHIFT 5 +#define METAL_PLIC_SOURCE_PRIORITY_SHIFT 2 +#define METAL_PLIC_SOURCE_PENDING_SHIFT 0 + +struct __metal_driver_vtable_riscv_plic0 { + struct metal_interrupt_vtable plic_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_plic0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_riscv_plic0 { + struct metal_interrupt controller; + int init_done; + metal_interrupt_handler_t metal_exint_table[__METAL_PLIC_SUBINTERRUPTS]; + __metal_interrupt_data metal_exdata_table[__METAL_PLIC_SUBINTERRUPTS]; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_clic0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_clic0.h new file mode 100644 index 000000000..db9674625 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_clic0.h @@ -0,0 +1,42 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_CLIC0_H +#define METAL__DRIVERS__SIFIVE_CLIC0_H + +#include +#include + +#define METAL_CLIC_MAX_NMBITS 2 +#define METAL_CLIC_MAX_NLBITS 8 +#define METAL_CLIC_MAX_NVBITS 1 + +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MMODE 0x00 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE1 0x20 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE2 0x40 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK 0x60 +#define METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK 0x1E +#define METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK 0x01 + +#define METAL_CLIC_ICTRL_SMODE1_MASK 0x7F /* b8 set imply M-mode */ +#define METAL_CLIC_ICTRL_SMODE2_MASK 0x3F /* b8 set M-mode, b7 clear U-mode */ + +#define METAL_MAX_INTERRUPT_LEVEL ((1 << METAL_CLIC_MAX_NLBITS) - 1) + +struct __metal_driver_vtable_sifive_clic0 { + struct metal_interrupt_vtable clic_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_clic0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_sifive_clic0 { + struct metal_interrupt controller; + int init_done; + metal_interrupt_handler_t metal_mtvt_table[__METAL_CLIC_SUBINTERRUPTS]; + __metal_interrupt_data metal_exint_table[__METAL_CLIC_SUBINTERRUPTS]; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h new file mode 100644 index 000000000..d311f0cf2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H + +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_hfrosc { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfrosc) + +struct __metal_driver_sifive_fe310_g000_hfrosc { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfxosc.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfxosc.h new file mode 100644 index 000000000..b86926fba --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_hfxosc.h @@ -0,0 +1,20 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_HFXOSC_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_HFXOSC_H + +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_hfxosc { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfxosc) + +struct __metal_driver_sifive_fe310_g000_hfxosc { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_pll.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_pll.h new file mode 100644 index 000000000..67f818f7b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_pll.h @@ -0,0 +1,26 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_PLL_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_PLL_H + +struct __metal_driver_sifive_fe310_g000_pll; + +#include +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_pll { + void (*init)(struct __metal_driver_sifive_fe310_g000_pll *pll); + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_pll) + +struct __metal_driver_sifive_fe310_g000_pll { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h new file mode 100644 index 000000000..87c9ca985 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_PRCI_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_PRCI_H + +#include +#include + +struct __metal_driver_sifive_fe310_g000_prci; + +struct __metal_driver_vtable_sifive_fe310_g000_prci { + long (*get_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset); + long (*set_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset, long value); +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_prci) + +struct __metal_driver_sifive_fe310_g000_prci { +}; + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h new file mode 100644 index 000000000..8c3cf907e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FU540_C000_L2_H +#define METAL__DRIVERS__SIFIVE_FU540_C000_L2_H + +struct __metal_driver_sifive_fu540_c000_l2; + +#include +#include + +struct __metal_driver_vtable_sifive_fu540_c000_l2 { + struct __metal_cache_vtable cache; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fu540_c000_l2) + +struct __metal_driver_sifive_fu540_c000_l2 { + struct metal_cache cache; +}; + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_global-external-interrupts0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_global-external-interrupts0.h new file mode 100644 index 000000000..9e6f2faf6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_global-external-interrupts0.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0_H +#define METAL__DRIVERS__SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0_H + +#include +#include + +struct __metal_driver_vtable_sifive_global_external_interrupts0 { + struct metal_interrupt_vtable global0_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_global_external_interrupts0) + +struct __metal_driver_sifive_global_external_interrupts0 { + struct metal_interrupt irc; + int init_done; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-buttons.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-buttons.h new file mode 100644 index 000000000..a0caeaba8 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-buttons.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H +#define METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_button { + struct metal_button_vtable button_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_button) + +struct __metal_driver_sifive_gpio_button { + struct metal_button button; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-leds.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-leds.h new file mode 100644 index 000000000..a8dacf116 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-leds.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_LEDS_H +#define METAL__DRIVERS__SIFIVE_GPIO_LEDS_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_led { + struct metal_led_vtable led_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_led) + +struct __metal_driver_sifive_gpio_led { + struct metal_led led; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-switches.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-switches.h new file mode 100644 index 000000000..c9c7839e9 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio-switches.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H +#define METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_switch { + struct metal_switch_vtable switch_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_switch) + +struct __metal_driver_sifive_gpio_switch { + struct metal_switch flip; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio0.h new file mode 100644 index 000000000..cc56dc722 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_gpio0.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO0_H +#define METAL__DRIVERS__SIFIVE_GPIO0_H + +#include +#include + +struct __metal_driver_vtable_sifive_gpio0 { + const struct __metal_gpio_vtable gpio; +}; + +//struct __metal_driver_sifive_gpio0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_gpio0) + +struct __metal_driver_sifive_gpio0 { + struct metal_gpio gpio; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h new file mode 100644 index 000000000..aa8d63078 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_EXTERNAL_INTERRUPTS0_H +#define METAL__DRIVERS__SIFIVE_EXTERNAL_INTERRUPTS0_H + +#include +#include + +struct __metal_driver_vtable_sifive_local_external_interrupts0 { + struct metal_interrupt_vtable local0_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_local_external_interrupts0) + +struct __metal_driver_sifive_local_external_interrupts0 { + struct metal_interrupt irc; + int init_done; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_spi0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_spi0.h new file mode 100644 index 000000000..90d4c831e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_spi0.h @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_SPI0_H +#define METAL__DRIVERS__SIFIVE_SPI0_H + +#include +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_spi0 { + const struct metal_spi_vtable spi; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_spi0) + +struct __metal_driver_sifive_spi0 { + struct metal_spi spi; + unsigned long baud_rate; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_test0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_test0.h new file mode 100644 index 000000000..e87db2c83 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_test0.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_TEST0_H +#define METAL__DRIVERS__SIFIVE_TEST0_H + +#include +#include + +struct __metal_driver_vtable_sifive_test0 { + const struct __metal_shutdown_vtable shutdown; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_test0) + +struct __metal_driver_sifive_test0 { + struct __metal_shutdown shutdown; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_uart0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_uart0.h new file mode 100644 index 000000000..11d954002 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/drivers/sifive_uart0.h @@ -0,0 +1,28 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_UART0_H +#define METAL__DRIVERS__SIFIVE_UART0_H + +#include +#include +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_uart0 { + const struct metal_uart_vtable uart; +}; + +struct __metal_driver_sifive_uart0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_uart0) + +struct __metal_driver_sifive_uart0 { + struct metal_uart uart; + unsigned long baud_rate; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/gpio.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/gpio.h new file mode 100644 index 000000000..513687dd7 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/gpio.h @@ -0,0 +1,151 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__GPIO_H +#define METAL__GPIO_H + +#include + +/*! + * @file gpio.h + * @brief API for manipulating general-purpose input/output + */ + +struct metal_gpio; + +struct __metal_gpio_vtable { + int (*disable_input)(struct metal_gpio *, long pins); + long (*output)(struct metal_gpio *); + int (*enable_output)(struct metal_gpio *, long pins); + int (*output_set)(struct metal_gpio *, long value); + int (*output_clear)(struct metal_gpio *, long value); + int (*output_toggle)(struct metal_gpio *, long value); + int (*enable_io)(struct metal_gpio *, long pins, long dest); +}; + +/*! + * @struct metal_gpio + * @brief The handle for a GPIO interface + */ +struct metal_gpio { + const struct __metal_gpio_vtable *vtable; +}; + +/*! + * @brief Get a GPIO device handle + * @param device_num The GPIO device index + * @return The GPIO device handle, or NULL if there is no device at that index + */ +struct metal_gpio *metal_gpio_get_device(int device_num); + +/*! + * @brief Disable input on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the input is successfully disabled + */ +inline int metal_gpio_disable_input(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->disable_input(gpio, (1 << pin)); +} + +/*! + * @brief Enable output on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the output is successfully enabled + */ +inline int metal_gpio_enable_output(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->enable_output(gpio, (1 << pin)); +} + +/*! + * @brief Set the output value of a GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @param value The value to set the pin to + * @return 0 if the output is successfully set + */ +inline int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value) { + if(!gpio) { + return 1; + } + + if(value == 0) { + return gpio->vtable->output_clear(gpio, (1 << pin)); + } else { + return gpio->vtable->output_set(gpio, (1 << pin)); + } +} + +/*! + * @brief Get the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return The value of the GPIO pin + */ +inline int metal_gpio_get_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 0; + } + + long value = gpio->vtable->output(gpio); + + if(value & (1 << pin)) { + return 1; + } else { + return 0; + } +} + +/*! + * @brief Clears the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the pin is successfully cleared + */ +inline int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->output_clear(gpio, (1 << pin)); +} + +/*! + * @brief Toggles the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the pin is successfully toggled + */ +inline int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->output_toggle(gpio, (1 << pin)); +} + +/*! + * @brief Enables and sets the pinmux for a GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The bitmask for the pin to enable pinmux on + * @param io_function The IO function to set + * @return 0 if the pinmux is successfully set + */ +inline int metal_gpio_enable_pinmux(struct metal_gpio *gpio, int pin, int io_function) { + if(!gpio) { + return 1; + } + + return gpio->vtable->enable_io(gpio, (1 << pin), (io_function << pin)); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/interrupt.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/interrupt.h new file mode 100644 index 000000000..43f587aca --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/interrupt.h @@ -0,0 +1,134 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__INTERRUPT_H +#define METAL__INTERRUPT_H + +/*! @file interrupt.h + * @brief API for registering and manipulating interrupts + */ + +#include + +/*! + * @brief Possible mode of interrupts to operate + */ +typedef enum metal_vector_mode_ { + METAL_DIRECT_MODE = 0, + METAL_VECTOR_MODE = 1, + METAL_SELECTIVE_VECTOR_MODE = 2, + METAL_HARDWARE_VECTOR_MODE = 3 +} metal_vector_mode; + +/*! + * @brief Function signature for interrupt callback handlers + */ +typedef void (*metal_interrupt_handler_t) (int, void *); + +struct metal_interrupt; + +struct metal_interrupt_vtable { + void (*interrupt_init)(struct metal_interrupt *controller); + int (*interrupt_register)(struct metal_interrupt *controller, int id, + metal_interrupt_handler_t isr, void *priv_data); + int (*interrupt_enable)(struct metal_interrupt *controller, int id); + int (*interrupt_disable)(struct metal_interrupt *controller, int id); + int (*interrupt_vector_enable)(struct metal_interrupt *controller, + int id, metal_vector_mode mode); + int (*interrupt_vector_disable)(struct metal_interrupt *controller, int id); + int (*command_request)(struct metal_interrupt *controller, int cmd, void *data); + int (*mtimecmp_set)(struct metal_interrupt *controller, int hartid, unsigned long long time); +}; + +/*! + * @brief A handle for an interrupt + */ +struct metal_interrupt { + const struct metal_interrupt_vtable *vtable; +}; + +/*! + * @brief Initialize a given interrupt controller + * + * Initialize a given interrupt controller. This function must be called + * before any interrupts are registered or enabled with the handler. It + * is invalid to initialize an interrupt controller more than once. + * + * @param controller The handle for the interrupt controller + */ +inline void metal_interrupt_init(struct metal_interrupt *controller) +{ + return controller->vtable->interrupt_init(controller); +} + + +/*! + * @brief Register an interrupt handler + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to register + * @param handler The interrupt handler callback + * @param priv_data Private data for the interrupt handler + * @return 0 upon success + */ +inline int metal_interrupt_register_handler(struct metal_interrupt *controller, + int id, + metal_interrupt_handler_t handler, + void *priv_data) +{ + return controller->vtable->interrupt_register(controller, id, handler, priv_data); +} + +/*! + * @brief Enable an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @return 0 upon success + */ +inline int metal_interrupt_enable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_enable(controller, id); +} + +/*! + * @brief Disable an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to disable + * @return 0 upon success + */ +inline int metal_interrupt_disable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_disable(controller, id); +} + +/*! + * @brief Enable an interrupt vector + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @param mode The interrupt mode type to enable + * @return 0 upon success + */ +inline int metal_interrupt_vector_enable(struct metal_interrupt *controller, + int id, metal_vector_mode mode) +{ + return controller->vtable->interrupt_vector_enable(controller, id, mode); +} + +/*! + * @brief Disable an interrupt vector + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to disable + * @return 0 upon success + */ +inline int metal_interrupt_vector_disable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_vector_disable(controller, id); +} + +/* Utilities function to controll, manages devices via a given interrupt controller */ +inline int _metal_interrupt_command_request(struct metal_interrupt *controller, + int cmd, void *data) +{ + return controller->vtable->command_request(controller, cmd, data); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/io.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/io.h new file mode 100644 index 000000000..450054142 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/io.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__IO_H +#define METAL__IO_H + +/* This macro enforces that the compiler will not elide the given access. */ +#define __METAL_ACCESS_ONCE(x) (*(typeof(*x) volatile *)(x)) + +/* Allows users to specify arbitrary fences. */ +#define __METAL_IO_FENCE(pred, succ) __asm__ volatile ("fence " #pred "," #succ ::: "memory"); + +/* Types that explicitly describe an address as being used for memory-mapped + * IO. These should only be accessed via __METAL_ACCESS_ONCE. */ +typedef unsigned char __metal_io_u8; +typedef unsigned short __metal_io_u16; +typedef unsigned int __metal_io_u32; +#if __riscv_xlen >= 64 +typedef unsigned long __metal_io_u64; +#endif + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/itim.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/itim.h new file mode 100644 index 000000000..1a2a05b8b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/itim.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__ITIM_H +#define METAL__ITIM_H + +/*! @file itim.h + * + * API for manipulating ITIM allocation + */ + + +/*! @def METAL_PLACE_IN_ITIM + * @brief Link a function into the ITIM + * + * Link a function into the ITIM (Instruction Tightly Integrated + * Memory) if the ITIM is present on the target device. + */ +#define METAL_PLACE_IN_ITIM __attribute__((section(".itim"))) + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/led.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/led.h new file mode 100644 index 000000000..a430b84c2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/led.h @@ -0,0 +1,68 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__LED_H +#define METAL__LED_H + +/*! + * @file led.h + * @brief API for manipulating LEDs + */ + +struct metal_led; + +struct metal_led_vtable { + int (*led_exist)(struct metal_led *led, char *label); + void (*led_enable)(struct metal_led *led); + void (*led_on)(struct metal_led *led); + void (*led_off)(struct metal_led *led); + void (*led_toggle)(struct metal_led *led); +}; + +/*! + * @brief A handle for an LED + */ +struct metal_led { + const struct metal_led_vtable *vtable; +}; + +/*! + * @brief Get a handle for an LED + * @param label The DeviceTree label for the desired LED + * @return A handle to the LED, or NULL if none is found for the requested label + */ +struct metal_led* metal_led_get(char *label); + +/*! + * @brief Get a handle for a channel of an RGB LED + * @param label The DeviceTree label for the desired LED + * @param color The color for the LED in the DeviceTree + * @return A handle to the LED, or NULL if none is found for the requested label and color + */ +struct metal_led* metal_led_get_rgb(char *label, char *color); + +/*! + * @brief Enable an LED + * @param led The handle for the LED + */ +inline void metal_led_enable(struct metal_led *led) { led->vtable->led_enable(led); } + +/*! + * @brief Turn an LED on + * @param led The handle for the LED + */ +inline void metal_led_on(struct metal_led *led) { led->vtable->led_on(led); } + +/*! + * @brief Turn an LED off + * @param led The handle for the LED + */ +inline void metal_led_off(struct metal_led *led) { led->vtable->led_off(led); } + +/*! + * @brief Toggle the on/off state of an LED + * @param led The handle for the LED + */ +inline void metal_led_toggle(struct metal_led *led) { led->vtable->led_toggle(led); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/lock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/lock.h new file mode 100644 index 000000000..d863aa96e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/lock.h @@ -0,0 +1,127 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__LOCK_H +#define METAL__LOCK_H + +#include +#include + +/*! + * @file lock.h + * @brief An API for creating and using a software lock/mutex + */ + +/* TODO: How can we make the exception code platform-independant? */ +#define _METAL_STORE_AMO_ACCESS_FAULT 7 + +/*! + * @def METAL_LOCK_DECLARE + * @brief Declare a lock + * + * Locks must be declared with METAL_LOCK_DECLARE to ensure that the lock + * is linked into a memory region which supports atomic memory operations. + */ +#define METAL_LOCK_DECLARE(name) \ + __attribute__((section(".data.locks"))) \ + struct metal_lock name + +/*! + * @brief A handle for a lock + */ +struct metal_lock { + int _state; +}; + +/*! + * @brief Initialize a lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully initialized. A non-zero code indicates failure. + * + * If the lock cannot be initialized, attempts to take or give the lock + * will result in a Store/AMO access fault. + */ +inline int metal_lock_init(struct metal_lock *lock) { +#ifdef __riscv_atomic + /* Get a handle for the memory which holds the lock state */ + struct metal_memory *lock_mem = metal_get_memory_from_address((uintptr_t) &(lock->_state)); + if(!lock_mem) { + return 1; + } + + /* If the memory doesn't support atomics, report an error */ + if(!metal_memory_supports_atomics(lock_mem)) { + return 2; + } + + lock->_state = 0; + + return 0; +#else + return 3; +#endif +} + +/*! + * @brief Take a lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully taken + * + * If the lock initialization failed, attempts to take a lock will result in + * a Store/AMO access fault. + */ +inline int metal_lock_take(struct metal_lock *lock) { +#ifdef __riscv_atomic + int old = 1; + int new = 1; + + while(old != 0) { + __asm__ volatile("amoswap.w.aq %[old], %[new], (%[state])" + : [old] "=r" (old) + : [new] "r" (new), [state] "r" (&(lock->_state)) + : "memory"); + } + + return 0; +#else + /* Store the memory address in mtval like a normal store/amo access fault */ + __asm__ ("csrw mtval, %[state]" + :: [state] "r" (&(lock->_state))); + + /* Trigger a Store/AMO access fault */ + _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); + + /* If execution returns, indicate failure */ + return 1; +#endif +} + +/*! + * @brief Give back a held lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully given + * + * If the lock initialization failed, attempts to give a lock will result in + * a Store/AMO access fault. + */ +inline int metal_lock_give(struct metal_lock *lock) { +#ifdef __riscv_atomic + __asm__ volatile("amoswap.w.rl x0, x0, (%[state])" + :: [state] "r" (&(lock->_state)) + : "memory"); + + return 0; +#else + /* Store the memory address in mtval like a normal store/amo access fault */ + __asm__ ("csrw mtval, %[state]" + :: [state] "r" (&(lock->_state))); + + /* Trigger a Store/AMO access fault */ + _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); + + /* If execution returns, indicate failure */ + return 1; +#endif +} + +#endif /* METAL__LOCK_H */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine.h new file mode 100644 index 000000000..f76dbd632 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine.h @@ -0,0 +1,872 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef ASSEMBLY + +#include + +#ifdef __METAL_MACHINE_MACROS + +#ifndef MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H +#define MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H + +#define __METAL_CLINT_NUM_PARENTS 2 + +#ifndef __METAL_CLINT_NUM_PARENTS +#define __METAL_CLINT_NUM_PARENTS 0 +#endif +#define __METAL_PLIC_SUBINTERRUPTS 27 + +#define __METAL_PLIC_NUM_PARENTS 1 + +#ifndef __METAL_PLIC_SUBINTERRUPTS +#define __METAL_PLIC_SUBINTERRUPTS 0 +#endif +#ifndef __METAL_PLIC_NUM_PARENTS +#define __METAL_PLIC_NUM_PARENTS 0 +#endif +#ifndef __METAL_CLIC_SUBINTERRUPTS +#define __METAL_CLIC_SUBINTERRUPTS 0 +#endif + +#endif /* MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H*/ + +#else /* ! __METAL_MACHINE_MACROS */ + +#ifndef MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H +#define MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H + +#define __METAL_CLINT_2000000_INTERRUPTS 2 + +#define METAL_MAX_CLINT_INTERRUPTS 2 + +#define __METAL_CLINT_NUM_PARENTS 2 + +#define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1 + +#define __METAL_PLIC_SUBINTERRUPTS 27 + +#define METAL_MAX_PLIC_INTERRUPTS 1 + +#define __METAL_PLIC_NUM_PARENTS 1 + +#define __METAL_CLIC_SUBINTERRUPTS 0 +#define METAL_MAX_CLIC_INTERRUPTS 0 + +#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16 + +#define METAL_MAX_LOCAL_EXT_INTERRUPTS 16 + +#define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 + +#define __METAL_GPIO_10012000_INTERRUPTS 16 + +#define METAL_MAX_GPIO_INTERRUPTS 16 + +#define __METAL_SERIAL_10013000_INTERRUPTS 1 + +#define METAL_MAX_UART_INTERRUPTS 1 + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* From clock@0 */ +struct __metal_driver_fixed_clock __metal_dt_clock_0; + +/* From clock@2 */ +struct __metal_driver_fixed_clock __metal_dt_clock_2; + +/* From clock@5 */ +struct __metal_driver_fixed_clock __metal_dt_clock_5; + +struct metal_memory __metal_dt_mem_dtim_80000000; + +struct metal_memory __metal_dt_mem_spi_10014000; + +/* From clint@2000000 */ +struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; + +/* From cpu@0 */ +struct __metal_driver_cpu __metal_dt_cpu_0; + +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; + +/* From interrupt_controller@c000000 */ +struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; + +struct metal_pmp __metal_dt_pmp; + +/* From local_external_interrupts_0 */ +struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; + +/* From gpio@10012000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; + +/* From led@0red */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0red; + +/* From led@0green */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0green; + +/* From led@0blue */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue; + +/* From spi@10014000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; + +/* From serial@10013000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; + +/* From clock@3 */ +struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; + +/* From clock@1 */ +struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; + +/* From clock@4 */ +struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; + +/* From prci@10008000 */ +struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; + + + +/* --------------------- fixed_clock ------------ */ +static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_0) { + return METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY; + } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_2) { + return METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY; + } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_5) { + return METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY; + } + else { + return 0; + } +} + + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_MAX_CLINT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 1) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 3; + } + else if (idx == 1) { + return 7; + } + else { + return 0; + } +} + + + +/* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + +static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 1000000; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return &__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 8; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_plic0 ------------ */ +static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_NDEV; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 11; + } + else if (idx == 0) { + return 11; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ +static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { + return METAL_MAX_LOCAL_EXT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 16; + } + else if (idx == 1) { + return 17; + } + else if (idx == 2) { + return 18; + } + else if (idx == 3) { + return 19; + } + else if (idx == 4) { + return 20; + } + else if (idx == 5) { + return 21; + } + else if (idx == 6) { + return 22; + } + else if (idx == 7) { + return 23; + } + else if (idx == 8) { + return 24; + } + else if (idx == 9) { + return 25; + } + else if (idx == 10) { + return 26; + } + else if (idx == 11) { + return 27; + } + else if (idx == 12) { + return 28; + } + else if (idx == 13) { + return 29; + } + else if (idx == 14) { + return 30; + } + else if (idx == 15) { + return 31; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ + + +/* --------------------- sifive_gpio0 ------------ */ +static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_SIFIVE_GPIO0_10012000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_MAX_GPIO_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) +{ + if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 0)) { + return 7; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 1))) { + return 8; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 2))) { + return 9; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 3))) { + return 10; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 4))) { + return 11; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 5))) { + return 12; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 6))) { + return 13; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 7))) { + return 14; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 8))) { + return 15; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 9))) { + return 16; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 10))) { + return 17; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 11))) { + return 18; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 12))) { + return 19; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 13))) { + return 20; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 14))) { + return 21; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 15))) { + return 22; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_gpio_button ------------ */ + + +/* --------------------- sifive_gpio_led ------------ */ +static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return 22; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return 19; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return 21; + } + else { + return 0; + } +} + +static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return "LD0red"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return "LD0green"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return "LD0blue"; + } + else { + return ""; + } +} + + + +/* --------------------- sifive_gpio_switch ------------ */ + + +/* --------------------- sifive_spi0 ------------ */ +static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_SIZE; + } + else { + return 0; + } +} + +static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +{ + return (struct metal_clock *)&__metal_dt_clock_4.clock; +} + +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +{ + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +{ + return 60; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +{ + return 60; +} + + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_uart0 ------------ */ +static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_MAX_UART_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) +{ + return 5; +} + +static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) +{ + return (struct metal_clock *)&__metal_dt_clock_4.clock; +} + +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +{ + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; +} + +static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +{ + return 196608; +} + +static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +{ + return 196608; +} + + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_2.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + +static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG; +} + + + +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_0.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG; +} + + + +/* --------------------- sifive_fe310_g000_pll ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_3.clock; +} + +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_1.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_PLLCFG; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) +{ + return 16000000; +} + + + +/* --------------------- sifive_fe310_g000_prci ------------ */ +static inline long __metal_driver_sifive_fe310_g000_prci_base( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS; +} + +static inline long __metal_driver_sifive_fe310_g000_prci_size( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE; +} + +static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + + + +/* --------------------- sifive_fu540_c000_l2 ------------ */ + + +#define __METAL_DT_MAX_MEMORIES 2 + +asm (".weak __metal_memory_table"); +struct metal_memory *__metal_memory_table[] = { + &__metal_dt_mem_dtim_80000000, + &__metal_dt_mem_spi_10014000}; + +/* From serial@10013000 */ +#define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_10013000.uart) + +#define __METAL_DT_SERIAL_10013000_HANDLE (&__metal_dt_serial_10013000.uart) + +#define __METAL_DT_STDOUT_UART_BAUD 115200 + +/* From clint@2000000 */ +#define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller) + +#define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller) + +#define __METAL_DT_MAX_HARTS 1 + +asm (".weak __metal_cpu_table"); +struct __metal_driver_cpu *__metal_cpu_table[] = { + &__metal_dt_cpu_0}; + +/* From interrupt_controller@c000000 */ +#define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) + +#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) + +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) + +/* From local_external_interrupts_0 */ +#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) + +#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) + +#define __MEE_DT_MAX_GPIOS 1 + +asm (".weak __metal_gpio_table"); +struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { + &__metal_dt_gpio_10012000}; + +#define __METAL_DT_MAX_BUTTONS 0 + +asm (".weak __metal_button_table"); +struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { + NULL }; +#define __METAL_DT_MAX_LEDS 3 + +asm (".weak __metal_led_table"); +struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { + &__metal_dt_led_0red, + &__metal_dt_led_0green, + &__metal_dt_led_0blue}; + +#define __METAL_DT_MAX_SWITCHES 0 + +asm (".weak __metal_switch_table"); +struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { + NULL }; +#define __METAL_DT_MAX_SPIS 1 + +asm (".weak __metal_spi_table"); +struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { + &__metal_dt_spi_10014000}; + +/* From clock@4 */ +#define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4) + +#define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4) + +#endif /* MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H*/ + +#endif /* ! __METAL_MACHINE_MACROS */ + +#endif /* ! ASSEMBLY */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/inline.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/inline.h new file mode 100644 index 000000000..8c0cd048b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/inline.h @@ -0,0 +1,249 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef ASSEMBLY + +#ifndef SIFIVE_HIFIVE1_REVB____METAL_INLINE_H +#define SIFIVE_HIFIVE1_REVB____METAL_INLINE_H + +#include + + +/* --------------------- fixed_clock ------------ */ +extern inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); +extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); + + +/* --------------------- sifive_plic0 ------------ */ +extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ +extern inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ + + +/* --------------------- sifive_gpio0 ------------ */ +extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); +extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); +extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); + + +/* --------------------- sifive_gpio_button ------------ */ + + +/* --------------------- sifive_gpio_led ------------ */ +extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); +extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); +extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); + + +/* --------------------- sifive_gpio_switch ------------ */ + + +/* --------------------- sifive_spi0 ------------ */ +extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_uart0 ------------ */ +extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); +extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); +extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); +extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); + + +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); + + +/* --------------------- sifive_fe310_g000_pll ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); +extern inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ); + + +/* --------------------- fe310_g000_prci ------------ */ +extern inline long __metal_driver_sifive_fe310_g000_prci_base( ); +extern inline long __metal_driver_sifive_fe310_g000_prci_size( ); +extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); + + +/* --------------------- sifive_fu540_c000_l2 ------------ */ + + +/* From clock@0 */ +struct __metal_driver_fixed_clock __metal_dt_clock_0 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +/* From clock@2 */ +struct __metal_driver_fixed_clock __metal_dt_clock_2 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +/* From clock@5 */ +struct __metal_driver_fixed_clock __metal_dt_clock_5 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +struct metal_memory __metal_dt_mem_dtim_80000000 = { + ._base_address = 2147483648UL, + ._size = 16384UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_spi_10014000 = { + ._base_address = 536870912UL, + ._size = 500000UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +/* From clint@2000000 */ +struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, + .init_done = 0, +}; + +/* From cpu@0 */ +struct __metal_driver_cpu __metal_dt_cpu_0 = { + .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, +}; + +/* From interrupt_controller */ +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { + .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, + .init_done = 0, +}; + +/* From interrupt_controller@c000000 */ +struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable, + .init_done = 0, +}; + +/* From local_external_interrupts_0 */ +struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { + .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, + .init_done = 0, +}; + +/* From gpio@10012000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000 = { + .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, +}; + +/* From led@0red */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0green */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0blue */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From spi@10014000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + +/* From serial@10013000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000 = { + .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, +}; + +/* From clock@3 */ +struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc.clock, +}; + +/* From clock@1 */ +struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc.clock, +}; + +/* From clock@4 */ +struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll.clock, +}; + +/* From prci@10008000 */ +struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = { +}; + + +#endif /* SIFIVE_HIFIVE1_REVB____METAL_INLINE_H*/ +#endif /* ! ASSEMBLY */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/platform.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/platform.h new file mode 100644 index 000000000..4ecd3e336 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/machine/platform.h @@ -0,0 +1,237 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H +#define SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H + +/* From clock@0 */ +#define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 16000000UL + +/* From clock@2 */ +#define METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY 72000000UL + +/* From clock@5 */ +#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32000000UL + +#define METAL_FIXED_CLOCK + +/* From clint@2000000 */ +#define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_2000000_SIZE 65536UL +#define METAL_RISCV_CLINT0_0_SIZE 65536UL + +#define METAL_RISCV_CLINT0 +#define METAL_RISCV_CLINT0_MSIP_BASE 0UL +#define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL +#define METAL_RISCV_CLINT0_MTIME 49144UL + +/* From interrupt_controller@c000000 */ +#define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL +#define METAL_RISCV_PLIC0_0_SIZE 67108864UL +#define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 27UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 27UL + +#define METAL_RISCV_PLIC0 +#define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL +#define METAL_RISCV_PLIC0_PENDING_BASE 4096UL +#define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL +#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL +#define METAL_RISCV_PLIC0_CLAIM 2097156UL + +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_AON0 +#define METAL_SIFIVE_AON0_WDOGCFG 0UL +#define METAL_SIFIVE_AON0_WDOGCOUNT 8UL +#define METAL_SIFIVE_AON0_WDOGS 16UL +#define METAL_SIFIVE_AON0_WDOGFEED 24UL +#define METAL_SIFIVE_AON0_WDOGKEY 28UL +#define METAL_SIFIVE_AON0_WDOGCMP 32UL +#define METAL_SIFIVE_AON0_RTCCFG 64UL +#define METAL_SIFIVE_AON0_RTCLO 72UL +#define METAL_SIFIVE_AON0_RTCHI 72UL +#define METAL_SIFIVE_AON0_RTCS 80UL +#define METAL_SIFIVE_AON0_RTCCMP 96UL +#define METAL_SIFIVE_AON0_LFROSCCFG 112UL +#define METAL_SIFIVE_AON0_BACKUP0 128UL +#define METAL_SIFIVE_AON0_BACKUP1 132UL +#define METAL_SIFIVE_AON0_BACKUP2 136UL +#define METAL_SIFIVE_AON0_BACKUP3 140UL +#define METAL_SIFIVE_AON0_BACKUP4 144UL +#define METAL_SIFIVE_AON0_BACKUP5 148UL +#define METAL_SIFIVE_AON0_BACKUP6 152UL +#define METAL_SIFIVE_AON0_BACKUP7 152UL +#define METAL_SIFIVE_AON0_BACKUP8 160UL +#define METAL_SIFIVE_AON0_BACKUP9 164UL +#define METAL_SIFIVE_AON0_BACKUP10 168UL +#define METAL_SIFIVE_AON0_BACKUP11 172UL +#define METAL_SIFIVE_AON0_BACKUP12 176UL +#define METAL_SIFIVE_AON0_BACKUP13 180UL +#define METAL_SIFIVE_AON0_BACKUP14 184UL +#define METAL_SIFIVE_AON0_BACKUP15 188UL +#define METAL_SIFIVE_AON0_BACKUP16 192UL +#define METAL_SIFIVE_AON0_BACKUP17 196UL +#define METAL_SIFIVE_AON0_BACKUP18 200UL +#define METAL_SIFIVE_AON0_BACKUP19 204UL +#define METAL_SIFIVE_AON0_BACKUP20 208UL +#define METAL_SIFIVE_AON0_BACKUP21 212UL +#define METAL_SIFIVE_AON0_BACKUP22 216UL +#define METAL_SIFIVE_AON0_BACKUP23 220UL +#define METAL_SIFIVE_AON0_BACKUP24 224UL +#define METAL_SIFIVE_AON0_BACKUP25 228UL +#define METAL_SIFIVE_AON0_BACKUP26 232UL +#define METAL_SIFIVE_AON0_BACKUP27 236UL +#define METAL_SIFIVE_AON0_BACKUP28 240UL +#define METAL_SIFIVE_AON0_BACKUP29 244UL +#define METAL_SIFIVE_AON0_BACKUP30 248UL +#define METAL_SIFIVE_AON0_BACKUP31 252UL +#define METAL_SIFIVE_AON0_PMU_WAKEUP_BASE 256UL +#define METAL_SIFIVE_AON0_PWM_SLEEP_BASE 288UL +#define METAL_SIFIVE_AON0_PMUIE 320UL +#define METAL_SIFIVE_AON0_PMUCAUSE 324UL +#define METAL_SIFIVE_AON0_PMUSLEEP 328UL +#define METAL_SIFIVE_AON0_PMUKEY 332UL + +/* From clock@3 */ + +#define METAL_SIFIVE_FE310_G000_HFROSC + +/* From clock@1 */ + +#define METAL_SIFIVE_FE310_G000_HFXOSC + +/* From prci@10008000 */ +#define METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS 268468224UL +#define METAL_SIFIVE_FE310_G000_PRCI_0_BASE_ADDRESS 268468224UL +#define METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE 32768UL +#define METAL_SIFIVE_FE310_G000_PRCI_0_SIZE 32768UL + +#define METAL_SIFIVE_FE310_G000_PRCI +#define METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG 0UL +#define METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG 4UL +#define METAL_SIFIVE_FE310_G000_PRCI_PLLCFG 8UL +#define METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV 12UL + +/* From clock@4 */ +#define METAL_SIFIVE_FE310_G000_PLL_4_CLOCK_FREQUENCY 16000000UL + +#define METAL_SIFIVE_FE310_G000_PLL + +/* From gpio@10012000 */ +#define METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS 268509184UL +#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268509184UL +#define METAL_SIFIVE_GPIO0_10012000_SIZE 4096UL +#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL + +#define METAL_SIFIVE_GPIO0 +#define METAL_SIFIVE_GPIO0_VALUE 0UL +#define METAL_SIFIVE_GPIO0_INPUT_EN 4UL +#define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL +#define METAL_SIFIVE_GPIO0_PORT 12UL +#define METAL_SIFIVE_GPIO0_PUE 16UL +#define METAL_SIFIVE_GPIO0_DS 20UL +#define METAL_SIFIVE_GPIO0_RISE_IE 24UL +#define METAL_SIFIVE_GPIO0_RISE_IP 28UL +#define METAL_SIFIVE_GPIO0_FALL_IE 32UL +#define METAL_SIFIVE_GPIO0_FALL_IP 36UL +#define METAL_SIFIVE_GPIO0_HIGH_IE 40UL +#define METAL_SIFIVE_GPIO0_HIGH_IP 44UL +#define METAL_SIFIVE_GPIO0_LOW_IE 48UL +#define METAL_SIFIVE_GPIO0_LOW_IP 52UL +#define METAL_SIFIVE_GPIO0_IOF_EN 56UL +#define METAL_SIFIVE_GPIO0_IOF_SEL 60UL +#define METAL_SIFIVE_GPIO0_OUT_XOR 64UL + +/* From led@0red */ + +/* From led@0green */ + +/* From led@0blue */ + +#define METAL_SIFIVE_GPIO_LEDS + +/* From i2c@10016000 */ +#define METAL_SIFIVE_I2C0_10016000_BASE_ADDRESS 268525568UL +#define METAL_SIFIVE_I2C0_0_BASE_ADDRESS 268525568UL +#define METAL_SIFIVE_I2C0_10016000_SIZE 4096UL +#define METAL_SIFIVE_I2C0_0_SIZE 4096UL + +#define METAL_SIFIVE_I2C0 +#define METAL_SIFIVE_I2C0_PRESCALE_LOW 0UL +#define METAL_SIFIVE_I2C0_PRESCALE_HIGH 4UL +#define METAL_SIFIVE_I2C0_CONTROL 8UL +#define METAL_SIFIVE_I2C0_TRANSMIT 12UL +#define METAL_SIFIVE_I2C0_RECEIVE 12UL +#define METAL_SIFIVE_I2C0_COMMAND 16UL +#define METAL_SIFIVE_I2C0_STATUS 16UL + +/* From local_external_interrupts_0 */ + +#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 + +/* From pwm@10015000 */ +#define METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS 268521472UL +#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268521472UL +#define METAL_SIFIVE_PWM0_10015000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_0_SIZE 4096UL + +#define METAL_SIFIVE_PWM0 +#define METAL_SIFIVE_PWM0_PWMCFG 0UL +#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL +#define METAL_SIFIVE_PWM0_PWMS 16UL +#define METAL_SIFIVE_PWM0_PWMCMP0 32UL +#define METAL_SIFIVE_PWM0_PWMCMP1 36UL +#define METAL_SIFIVE_PWM0_PWMCMP2 40UL +#define METAL_SIFIVE_PWM0_PWMCMP3 44UL + +/* From spi@10014000 */ +#define METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS 268517376UL +#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268517376UL +#define METAL_SIFIVE_SPI0_10014000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_0_SIZE 4096UL + +#define METAL_SIFIVE_SPI0 +#define METAL_SIFIVE_SPI0_SCKDIV 0UL +#define METAL_SIFIVE_SPI0_SCKMODE 4UL +#define METAL_SIFIVE_SPI0_CSID 16UL +#define METAL_SIFIVE_SPI0_CSDEF 20UL +#define METAL_SIFIVE_SPI0_CSMODE 24UL +#define METAL_SIFIVE_SPI0_DELAY0 40UL +#define METAL_SIFIVE_SPI0_DELAY1 44UL +#define METAL_SIFIVE_SPI0_FMT 64UL +#define METAL_SIFIVE_SPI0_TXDATA 72UL +#define METAL_SIFIVE_SPI0_RXDATA 76UL +#define METAL_SIFIVE_SPI0_TXMARK 80UL +#define METAL_SIFIVE_SPI0_RXMARK 84UL +#define METAL_SIFIVE_SPI0_FCTRL 96UL +#define METAL_SIFIVE_SPI0_FFMT 100UL +#define METAL_SIFIVE_SPI0_IE 112UL +#define METAL_SIFIVE_SPI0_IP 116UL + +/* From serial@10013000 */ +#define METAL_SIFIVE_UART0_10013000_BASE_ADDRESS 268513280UL +#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 268513280UL +#define METAL_SIFIVE_UART0_10013000_SIZE 4096UL +#define METAL_SIFIVE_UART0_0_SIZE 4096UL + +#define METAL_SIFIVE_UART0 +#define METAL_SIFIVE_UART0_TXDATA 0UL +#define METAL_SIFIVE_UART0_RXDATA 4UL +#define METAL_SIFIVE_UART0_TXCTRL 8UL +#define METAL_SIFIVE_UART0_RXCTRL 12UL +#define METAL_SIFIVE_UART0_IE 16UL +#define METAL_SIFIVE_UART0_IP 20UL +#define METAL_SIFIVE_UART0_DIV 24UL + +#endif /* SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H*/ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/memory.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/memory.h new file mode 100644 index 000000000..b62d8b25a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/memory.h @@ -0,0 +1,81 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__MEMORY_H +#define METAL__MEMORY_H + +#include +#include + +/*! + * @file memory.h + * + * @brief API for enumerating memory blocks + */ + +struct _metal_memory_attributes { + int R : 1; + int W : 1; + int X : 1; + int C : 1; + int A : 1; +}; + +/*! + * @brief A handle for a memory block + */ +struct metal_memory { + const uintptr_t _base_address; + const size_t _size; + const struct _metal_memory_attributes _attrs; +}; + +/*! + * @brief Get the memory block which services the given address + * + * Given a physical memory address, get a handle for the memory block to which + * that address is mapped. + * + * @param address The address to query + * @return The memory block handle, or NULL if the address is not mapped to a memory block + */ +struct metal_memory *metal_get_memory_from_address(const uintptr_t address); + +/*! + * @brief Get the base address for a memory block + * @param memory The handle for the memory block + * @return The base address of the memory block + */ +inline uintptr_t metal_memory_get_base_address(const struct metal_memory *memory) { + return memory->_base_address; +} + +/*! + * @brief Get the size of a memory block + * @param memory The handle for the memory block + * @return The size of the memory block + */ +inline size_t metal_memory_get_size(const struct metal_memory *memory) { + return memory->_size; +} + +/*! + * @brief Query if a memory block supports atomic operations + * @param memory The handle for the memory block + * @return nonzero if the memory block supports atomic operations + */ +inline int metal_memory_supports_atomics(const struct metal_memory *memory) { + return memory->_attrs.A; +} + +/*! + * @brief Query if a memory block is cacheable + * @param memory The handle for the memory block + * @return nonzero if the memory block is cachable + */ +inline int metal_memory_is_cachable(const struct metal_memory *memory) { + return memory->_attrs.C; +} + +#endif /* METAL__MEMORY_H */ + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/pmp.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/pmp.h new file mode 100644 index 000000000..9121b10a1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/pmp.h @@ -0,0 +1,204 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__PMP_H +#define METAL__PMP_H + +/*! + * @file metal/pmp.h + * + * @brief API for Configuring Physical Memory Protection on RISC-V Cores + * + * The Physical Memory Protection (PMP) interface on RISC-V cores + * is a form of memory protection unit which allows for a finite number + * of physical memory regions to be configured with certain access + * permissions. + * + * Additional information about the use and configuration rules for PMPs + * can be found by reading the RISC-V Privileged Architecture Specification. + */ + +#include +#include + +struct metal_pmp; + +/*! + * @brief Set of available PMP addressing modes + */ +enum metal_pmp_address_mode { + /*! @brief Disable the PMP region */ + METAL_PMP_OFF = 0, + /*! @brief Use Top-of-Range mode */ + METAL_PMP_TOR = 1, + /*! @brief Use naturally-aligned 4-byte region mode */ + METAL_PMP_NA4 = 2, + /*! @brief Use naturally-aligned power-of-two mode */ + METAL_PMP_NAPOT = 3 +}; + +/*! + * @brief Configuration for a PMP region + */ +struct metal_pmp_config { + /*! @brief Sets whether reads to the PMP region succeed */ + int R : 1; + /*! @brief Sets whether writes to the PMP region succeed */ + int W : 1; + /*! @brief Sets whether the PMP region is executable */ + int X : 1; + + /*! @brief Sets the addressing mode of the PMP region */ + enum metal_pmp_address_mode A : 2; + + int _pad : 2; + + /*! @brief Sets whether the PMP region is locked */ + enum metal_pmp_locked { + METAL_PMP_UNLOCKED = 0, + METAL_PMP_LOCKED = 1 + } L : 1; +}; + +/*! + * @brief A handle for the PMP device + */ +struct metal_pmp { + /* The minimum granularity of the PMP region. Set by metal_pmp_init */ + uintptr_t _granularity[METAL_MAX_CORES]; +}; + +/*! + * @brief Get the PMP device handle + */ +struct metal_pmp *metal_pmp_get_device(void); + +/*! + * @brief Initialize the PMP + * @param pmp The PMP device handle to be initialized + * + * The PMP initialization routine is optional and may be called as many times + * as is desired. The effect of the initialization routine is to attempt to set + * all regions to unlocked and disabled, as well as to clear the X, W, and R + * bits. Only the pmp configuration of the hart which executes the routine will + * be affected. + * + * If any regions are fused to preset values by the implementation or locked, + * those PMP regions will silently remain uninitialized. + */ +void metal_pmp_init(struct metal_pmp *pmp); + +/*! + * @brief Configure a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to configure + * @param config The desired configuration of the PMP region + * @param address The desired address of the PMP region + * @return 0 upon success + */ +int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config config, size_t address); + +/*! + * @brief Get the configuration for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @param config Variable to store the PMP region configuration + * @param address Variable to store the PMP region address + * @return 0 if the region is read successfully + */ +int metal_pmp_get_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config *config, size_t *address); + +/*! + * @brief Lock a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to lock + * @return 0 if the region is successfully locked + */ +int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the address for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param address The desired address of the PMP region + * @return 0 if the address is successfully set + */ +int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address); + +/*! + * @brief Get the address of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return The address of the PMP region, or 0 if the region could not be read + */ +size_t metal_pmp_get_address(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the addressing mode of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param mode The PMP addressing mode to set + * @return 0 if the addressing mode is successfully set + */ +int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum metal_pmp_address_mode mode); + +/*! + * @brief Get the addressing mode of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return The address mode of the PMP region + */ +enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the executable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param X The desired value of the executable bit + * @return 0 if the executable bit is successfully set + */ +int metal_pmp_set_executable(struct metal_pmp *pmp, unsigned int region, int X); + +/*! + * @brief Get the executable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the executable bit + */ +int metal_pmp_get_executable(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the writable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param W The desired value of the writable bit + * @return 0 if the writable bit is successfully set + */ +int metal_pmp_set_writeable(struct metal_pmp *pmp, unsigned int region, int W); + +/*! + * @brief Get the writable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the writable bit + */ +int metal_pmp_get_writeable(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the readable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param R The desired value of the readable bit + * @return 0 if the readable bit is successfully set + */ +int metal_pmp_set_readable(struct metal_pmp *pmp, unsigned int region, int R); + +/*! + * @brief Set the readable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the readable bit + */ +int metal_pmp_get_readable(struct metal_pmp *pmp, unsigned int region); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/privilege.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/privilege.h new file mode 100644 index 000000000..c5212e5d1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/privilege.h @@ -0,0 +1,122 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__PRIVILEGE_H +#define METAL__PRIVILEGE_H + +/*! + * @file metal/privilege.h + * + * @brief API for manipulating the privilege mode of a RISC-V system + * + * Additional information about privilege modes on RISC-V systems can be found + * by reading the RISC-V Privileged Architecture Specification v1.10. + */ + +#include + +enum metal_privilege_mode { + METAL_PRIVILEGE_USER = 0, + METAL_PRIVILEGE_SUPERVISOR = 1, + METAL_PRIVELEGE_MACHINE = 3, +}; + +#if __riscv_xlen == 32 +typedef uint32_t metal_xreg_t; +#elif __riscv_xlen == 64 +typedef uint64_t metal_xreg_t; +#endif + +#if __riscv_flen == 32 +typedef uint32_t metal_freg_t; +#elif __riscv_flen == 64 +typedef uint64_t metal_freg_t; +#endif + +struct metal_register_file { + metal_xreg_t ra; + metal_xreg_t sp; + metal_xreg_t gp; + metal_xreg_t tp; + + metal_xreg_t t0; + metal_xreg_t t1; + metal_xreg_t t2; + + metal_xreg_t s0; + metal_xreg_t s1; + + metal_xreg_t a0; + metal_xreg_t a1; + metal_xreg_t a2; + metal_xreg_t a3; + metal_xreg_t a4; + metal_xreg_t a5; +#ifndef __riscv_32e + metal_xreg_t a6; + metal_xreg_t a7; + + metal_xreg_t s2; + metal_xreg_t s3; + metal_xreg_t s4; + metal_xreg_t s5; + metal_xreg_t s6; + metal_xreg_t s7; + metal_xreg_t s8; + metal_xreg_t s9; + metal_xreg_t s10; + metal_xreg_t s11; + + metal_xreg_t t3; + metal_xreg_t t4; + metal_xreg_t t5; + metal_xreg_t t6; +#endif /* __riscv_32e */ + +#ifdef __riscv_flen + metal_freg_t ft0; + metal_freg_t ft1; + metal_freg_t ft2; + metal_freg_t ft3; + metal_freg_t ft4; + metal_freg_t ft5; + metal_freg_t ft6; + metal_freg_t ft7; + + metal_freg_t fs0; + metal_freg_t fs1; + + metal_freg_t fa0; + metal_freg_t fa1; + metal_freg_t fa2; + metal_freg_t fa3; + metal_freg_t fa4; + metal_freg_t fa5; + metal_freg_t fa6; + metal_freg_t fa7; + + metal_freg_t fs2; + metal_freg_t fs3; + metal_freg_t fs4; + metal_freg_t fs5; + metal_freg_t fs6; + metal_freg_t fs7; + metal_freg_t fs8; + metal_freg_t fs9; + metal_freg_t fs10; + metal_freg_t fs11; + + metal_freg_t ft8; + metal_freg_t ft9; + metal_freg_t ft10; + metal_freg_t ft11; +#endif /* __riscv_flen */ +}; + +typedef void (*metal_privilege_entry_point_t)(); + +void metal_privilege_drop_to_mode(enum metal_privilege_mode mode, + struct metal_register_file regfile, + metal_privilege_entry_point_t entry_point); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/shutdown.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/shutdown.h new file mode 100644 index 000000000..3bebfa742 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/shutdown.h @@ -0,0 +1,36 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SHUTDOWN_H +#define METAL__SHUTDOWN_H + +/*! + * @file shutdown.h + * @brief API for shutting down a machine + */ + +struct __metal_shutdown; + +struct __metal_shutdown_vtable { + void (*exit)(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); +}; + +struct __metal_shutdown { + const struct __metal_shutdown_vtable *vtable; +}; + +inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); +inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) { sd->vtable->exit(sd, code); } + +/*! + * @brief The public METAL shutdown interface + * + * Shuts down the machine, if the machine enables an interface for + * shutting down. When no interface is provided, will cause the machine + * to spin indefinitely. + * + * @param code The return code to set. 0 indicates program success. + */ +void metal_shutdown(int code) __attribute__((noreturn)); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/spi.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/spi.h new file mode 100644 index 000000000..b011fe3ce --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/spi.h @@ -0,0 +1,78 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SPI_H +#define METAL__SPI_H + +struct metal_spi; + +/*! @brief The configuration for a SPI transfer */ +struct metal_spi_config { + /*! @brief The protocol for the SPI transfer */ + enum { + METAL_SPI_SINGLE, + METAL_SPI_DUAL, + METAL_SPI_QUAD + } protocol; + + /*! @brief The polarity of the SPI transfer, equivalent to CPOL */ + unsigned int polarity : 1; + /*! @brief The phase of the SPI transfer, equivalent to CPHA */ + unsigned int phase : 1; + /*! @brief The endianness of the SPI transfer */ + unsigned int little_endian : 1; + /*! @brief The active state of the chip select line */ + unsigned int cs_active_high : 1; + /*! @brief The chip select ID to activate for the SPI transfer */ + unsigned int csid; +}; + +struct metal_spi_vtable { + void (*init)(struct metal_spi *spi, int baud_rate); + int (*transfer)(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf); + int (*get_baud_rate)(struct metal_spi *spi); + int (*set_baud_rate)(struct metal_spi *spi, int baud_rate); +}; + +/*! @brief A handle for a SPI device */ +struct metal_spi { + const struct metal_spi_vtable *vtable; +}; + +/*! @brief Get a handle for a SPI device + * @param device_num The index of the desired SPI device + * @return A handle to the SPI device, or NULL if the device does not exist*/ +struct metal_spi *metal_spi_get_device(int device_num); + +/*! @brief Initialize a SPI device with a certain baud rate + * @param spi The handle for the SPI device to initialize + * @param baud_rate The baud rate to set the SPI device to + */ +inline void metal_spi_init(struct metal_spi *spi, int baud_rate) { spi->vtable->init(spi, baud_rate); } + +/*! @brief Perform a SPI transfer + * @param spi The handle for the SPI device to perform the transfer + * @param config The configuration for the SPI transfer. + * @param len The number of bytes to transfer + * @param tx_buf The buffer to send over the SPI bus. Must be len bytes long. If NULL, the SPI will transfer the value 0. + * @param rx_buf The buffer to receive data into. Must be len bytes long. If NULL, the SPI will ignore received bytes. + * @return 0 if the transfer succeeds + */ +inline int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf) { + return spi->vtable->transfer(spi, config, len, tx_buf, rx_buf); +} + +/*! @brief Get the current baud rate of the SPI device + * @param spi The handle for the SPI device + * @return The baud rate in Hz + */ +inline int metal_spi_get_baud_rate(struct metal_spi *spi) { return spi->vtable->get_baud_rate(spi); } + +/*! @brief Set the current baud rate of the SPI device + * @param spi The handle for the SPI device + * @param baud_rate The desired baud rate of the SPI device + * @return 0 if the baud rate is successfully changed + */ +inline int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate) { return spi->vtable->set_baud_rate(spi, baud_rate); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/switch.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/switch.h new file mode 100644 index 000000000..d1c35bc93 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/switch.h @@ -0,0 +1,51 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SWITCH_H +#define METAL__SWITCH_H + +/*! + * @file switch.h + * @brief API for reading toggle switches + */ + +#include + +struct metal_switch; + +struct metal_switch_vtable { + int (*switch_exist)(struct metal_switch *sw, char *label); + struct metal_interrupt* (*interrupt_controller)(struct metal_switch *sw); + int (*get_interrupt_id)(struct metal_switch *sw); +}; + +/*! + * @brief A handle for a switch + */ +struct metal_switch { + const struct metal_switch_vtable *vtable; +}; + +/*! + * @brief Get a handle for a switch + * @param label The DeviceTree label for the desired switch + * @return A handle to the switch, or NULL if none is found for the requested label + */ +struct metal_switch* metal_switch_get(char *label); + +/*! + * @brief Get the interrupt controller for a switch + * @param sw The handle for the switch + * @return The interrupt controller handle + */ +inline struct metal_interrupt* + metal_switch_interrupt_controller(struct metal_switch *sw) { return sw->vtable->interrupt_controller(sw); } + +/*! + * @brief Get the interrupt id for a switch + * @param sw The handle for the switch + * @return The interrupt ID for the switch + */ +inline int metal_switch_get_interrupt_id(struct metal_switch *sw) { return sw->vtable->get_interrupt_id(sw); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/timer.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/timer.h new file mode 100644 index 000000000..eeae1f60b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/timer.h @@ -0,0 +1,36 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__TIMER_H +#define METAL__TIMER_H + +/*! + * @file timer.h + * @brief API for reading and manipulating the machine timer + */ + +/*! + * @brief Read the machine cycle count + * @param hartid The hart ID to read the cycle count of + * @param cyclecount The variable to hold the value + * @return 0 upon success + */ +int metal_timer_get_cyclecount(int hartid, unsigned long long *cyclecount); + +/*! + * @brief Get the machine timebase frequency + * @param hartid The hart ID to read the timebase of + * @param timebase The variable to hold the value + * @return 0 upon success + */ +int metal_timer_get_timebase_frequency(int hartid, unsigned long long *timebase); + +/*! + * @brief Set the machine timer tick interval in seconds + * @param hartid The hart ID to read the timebase of + * @param second The number of seconds to set the tick interval to + * @return 0 upon success + */ +int metal_timer_set_tick(int hartid, int second); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/tty.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/tty.h new file mode 100644 index 000000000..d2583e3be --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/tty.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__TTY_H +#define METAL__TTY_H + +/*! + * @file tty.h + * @brief API for emulated serial teriminals + */ + +/*! + * @brief Write a character to the default output device + * + * Write a character to the default output device, which for most + * targets is the UART serial port. + * + * @param c The character to write to the terminal + * @return 0 on success, or -1 on failure. + */ +int metal_tty_putc(unsigned char c); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/uart.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/uart.h new file mode 100644 index 000000000..611792a6c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/install/include/metal/uart.h @@ -0,0 +1,94 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__UART_H +#define METAL__UART_H + +/*! + * @file uart.h + * @brief API for UART serial ports + */ + +#include + +struct metal_uart; + +struct metal_uart_vtable { + void (*init)(struct metal_uart *uart, int baud_rate); + int (*putc)(struct metal_uart *uart, unsigned char c); + int (*getc)(struct metal_uart *uart, unsigned char *c); + int (*get_baud_rate)(struct metal_uart *uart); + int (*set_baud_rate)(struct metal_uart *uart, int baud_rate); + struct metal_interrupt* (*controller_interrupt)(struct metal_uart *uart); + int (*get_interrupt_id)(struct metal_uart *uart); +}; + +/*! + * @brief Handle for a UART serial device + */ +struct metal_uart { + const struct metal_uart_vtable *vtable; +}; + +/*! + * @brief Initialize UART device + + * Initialize the UART device described by the UART handle. This function must be called before any + * other method on the UART can be invoked. It is invalid to initialize a UART more than once. + * + * @param uart The UART device handle + * @param baud_rate the baud rate to set the UART to + */ +inline void metal_uart_init(struct metal_uart *uart, int baud_rate) { return uart->vtable->init(uart, baud_rate); } + +/*! + * @brief Output a character over the UART + * @param uart The UART device handle + * @param c The character to send over the UART + * @return 0 upon success + */ +inline int metal_uart_putc(struct metal_uart *uart, unsigned char c) { return uart->vtable->putc(uart, c); } + +/*! + * @brief Read a character sent over the UART + * @param uart The UART device handle + * @param c The varible to hold the read character + * @return 0 upon success + */ +inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c) { return uart->vtable->getc(uart, c); } + +/*! + * @brief Get the baud rate of the UART peripheral + * @param uart The UART device handle + * @return The current baud rate of the UART + */ +inline int metal_uart_get_baud_rate(struct metal_uart *uart) { return uart->vtable->get_baud_rate(uart); } + +/*! + * @brief Set the baud rate of the UART peripheral + * @param uart The UART device handle + * @param baud_rate The baud rate to configure + * @return the new baud rate of the UART + */ +inline int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate) { return uart->vtable->set_baud_rate(uart, baud_rate); } + +/*! + * @brief Get the interrupt controller of the UART peripheral + * + * Get the interrupt controller for the UART peripheral. The interrupt + * controller must be initialized before any interrupts can be registered + * or enabled with it. + * + * @param uart The UART device handle + * @return The handle for the UART interrupt controller + */ +inline struct metal_interrupt* metal_uart_interrupt_controller(struct metal_uart *uart) { return uart->vtable->controller_interrupt(uart); } + +/*! + * @brief Get the interrupt ID of the UART controller + * @param uart The UART device handle + * @return The UART interrupt id + */ +inline int metal_uart_get_interrupt_id(struct metal_uart *uart) { return uart->vtable->get_interrupt_id(uart); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-inline.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-inline.h new file mode 100644 index 000000000..8c0cd048b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-inline.h @@ -0,0 +1,249 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef ASSEMBLY + +#ifndef SIFIVE_HIFIVE1_REVB____METAL_INLINE_H +#define SIFIVE_HIFIVE1_REVB____METAL_INLINE_H + +#include + + +/* --------------------- fixed_clock ------------ */ +extern inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- cpu ------------ */ +extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); +extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); + + +/* --------------------- sifive_plic0 ------------ */ +extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); +extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); +extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ +extern inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller); +extern inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ + + +/* --------------------- sifive_gpio0 ------------ */ +extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); +extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); +extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); +extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); + + +/* --------------------- sifive_gpio_button ------------ */ + + +/* --------------------- sifive_gpio_led ------------ */ +extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); +extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); +extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); + + +/* --------------------- sifive_gpio_switch ------------ */ + + +/* --------------------- sifive_spi0 ------------ */ +extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); +extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_uart0 ------------ */ +extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); +extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); +extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); +extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); +extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); +extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); +extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); + + +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); + + +/* --------------------- sifive_fe310_g000_pll ------------ */ +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); +extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); +extern inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ); +extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); +extern inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ); + + +/* --------------------- fe310_g000_prci ------------ */ +extern inline long __metal_driver_sifive_fe310_g000_prci_base( ); +extern inline long __metal_driver_sifive_fe310_g000_prci_size( ); +extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); + + +/* --------------------- sifive_fu540_c000_l2 ------------ */ + + +/* From clock@0 */ +struct __metal_driver_fixed_clock __metal_dt_clock_0 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +/* From clock@2 */ +struct __metal_driver_fixed_clock __metal_dt_clock_2 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +/* From clock@5 */ +struct __metal_driver_fixed_clock __metal_dt_clock_5 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + +struct metal_memory __metal_dt_mem_dtim_80000000 = { + ._base_address = 2147483648UL, + ._size = 16384UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_spi_10014000 = { + ._base_address = 536870912UL, + ._size = 500000UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +/* From clint@2000000 */ +struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, + .init_done = 0, +}; + +/* From cpu@0 */ +struct __metal_driver_cpu __metal_dt_cpu_0 = { + .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, +}; + +/* From interrupt_controller */ +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { + .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable, + .init_done = 0, +}; + +/* From interrupt_controller@c000000 */ +struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { + .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable, + .init_done = 0, +}; + +/* From local_external_interrupts_0 */ +struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { + .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, + .init_done = 0, +}; + +/* From gpio@10012000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000 = { + .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, +}; + +/* From led@0red */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0green */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From led@0blue */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { + .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, +}; + +/* From spi@10014000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + +/* From serial@10013000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000 = { + .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, +}; + +/* From clock@3 */ +struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc.clock, +}; + +/* From clock@1 */ +struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc.clock, +}; + +/* From clock@4 */ +struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll.clock, +}; + +/* From prci@10008000 */ +struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = { +}; + + +#endif /* SIFIVE_HIFIVE1_REVB____METAL_INLINE_H*/ +#endif /* ! ASSEMBLY */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-platform.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-platform.h new file mode 100644 index 000000000..4ecd3e336 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal-platform.h @@ -0,0 +1,237 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H +#define SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H + +/* From clock@0 */ +#define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 16000000UL + +/* From clock@2 */ +#define METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY 72000000UL + +/* From clock@5 */ +#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32000000UL + +#define METAL_FIXED_CLOCK + +/* From clint@2000000 */ +#define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL +#define METAL_RISCV_CLINT0_2000000_SIZE 65536UL +#define METAL_RISCV_CLINT0_0_SIZE 65536UL + +#define METAL_RISCV_CLINT0 +#define METAL_RISCV_CLINT0_MSIP_BASE 0UL +#define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL +#define METAL_RISCV_CLINT0_MTIME 49144UL + +/* From interrupt_controller@c000000 */ +#define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL +#define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL +#define METAL_RISCV_PLIC0_0_SIZE 67108864UL +#define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL +#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 27UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 27UL + +#define METAL_RISCV_PLIC0 +#define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL +#define METAL_RISCV_PLIC0_PENDING_BASE 4096UL +#define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL +#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL +#define METAL_RISCV_PLIC0_CLAIM 2097156UL + +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_AON0 +#define METAL_SIFIVE_AON0_WDOGCFG 0UL +#define METAL_SIFIVE_AON0_WDOGCOUNT 8UL +#define METAL_SIFIVE_AON0_WDOGS 16UL +#define METAL_SIFIVE_AON0_WDOGFEED 24UL +#define METAL_SIFIVE_AON0_WDOGKEY 28UL +#define METAL_SIFIVE_AON0_WDOGCMP 32UL +#define METAL_SIFIVE_AON0_RTCCFG 64UL +#define METAL_SIFIVE_AON0_RTCLO 72UL +#define METAL_SIFIVE_AON0_RTCHI 72UL +#define METAL_SIFIVE_AON0_RTCS 80UL +#define METAL_SIFIVE_AON0_RTCCMP 96UL +#define METAL_SIFIVE_AON0_LFROSCCFG 112UL +#define METAL_SIFIVE_AON0_BACKUP0 128UL +#define METAL_SIFIVE_AON0_BACKUP1 132UL +#define METAL_SIFIVE_AON0_BACKUP2 136UL +#define METAL_SIFIVE_AON0_BACKUP3 140UL +#define METAL_SIFIVE_AON0_BACKUP4 144UL +#define METAL_SIFIVE_AON0_BACKUP5 148UL +#define METAL_SIFIVE_AON0_BACKUP6 152UL +#define METAL_SIFIVE_AON0_BACKUP7 152UL +#define METAL_SIFIVE_AON0_BACKUP8 160UL +#define METAL_SIFIVE_AON0_BACKUP9 164UL +#define METAL_SIFIVE_AON0_BACKUP10 168UL +#define METAL_SIFIVE_AON0_BACKUP11 172UL +#define METAL_SIFIVE_AON0_BACKUP12 176UL +#define METAL_SIFIVE_AON0_BACKUP13 180UL +#define METAL_SIFIVE_AON0_BACKUP14 184UL +#define METAL_SIFIVE_AON0_BACKUP15 188UL +#define METAL_SIFIVE_AON0_BACKUP16 192UL +#define METAL_SIFIVE_AON0_BACKUP17 196UL +#define METAL_SIFIVE_AON0_BACKUP18 200UL +#define METAL_SIFIVE_AON0_BACKUP19 204UL +#define METAL_SIFIVE_AON0_BACKUP20 208UL +#define METAL_SIFIVE_AON0_BACKUP21 212UL +#define METAL_SIFIVE_AON0_BACKUP22 216UL +#define METAL_SIFIVE_AON0_BACKUP23 220UL +#define METAL_SIFIVE_AON0_BACKUP24 224UL +#define METAL_SIFIVE_AON0_BACKUP25 228UL +#define METAL_SIFIVE_AON0_BACKUP26 232UL +#define METAL_SIFIVE_AON0_BACKUP27 236UL +#define METAL_SIFIVE_AON0_BACKUP28 240UL +#define METAL_SIFIVE_AON0_BACKUP29 244UL +#define METAL_SIFIVE_AON0_BACKUP30 248UL +#define METAL_SIFIVE_AON0_BACKUP31 252UL +#define METAL_SIFIVE_AON0_PMU_WAKEUP_BASE 256UL +#define METAL_SIFIVE_AON0_PWM_SLEEP_BASE 288UL +#define METAL_SIFIVE_AON0_PMUIE 320UL +#define METAL_SIFIVE_AON0_PMUCAUSE 324UL +#define METAL_SIFIVE_AON0_PMUSLEEP 328UL +#define METAL_SIFIVE_AON0_PMUKEY 332UL + +/* From clock@3 */ + +#define METAL_SIFIVE_FE310_G000_HFROSC + +/* From clock@1 */ + +#define METAL_SIFIVE_FE310_G000_HFXOSC + +/* From prci@10008000 */ +#define METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS 268468224UL +#define METAL_SIFIVE_FE310_G000_PRCI_0_BASE_ADDRESS 268468224UL +#define METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE 32768UL +#define METAL_SIFIVE_FE310_G000_PRCI_0_SIZE 32768UL + +#define METAL_SIFIVE_FE310_G000_PRCI +#define METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG 0UL +#define METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG 4UL +#define METAL_SIFIVE_FE310_G000_PRCI_PLLCFG 8UL +#define METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV 12UL + +/* From clock@4 */ +#define METAL_SIFIVE_FE310_G000_PLL_4_CLOCK_FREQUENCY 16000000UL + +#define METAL_SIFIVE_FE310_G000_PLL + +/* From gpio@10012000 */ +#define METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS 268509184UL +#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268509184UL +#define METAL_SIFIVE_GPIO0_10012000_SIZE 4096UL +#define METAL_SIFIVE_GPIO0_0_SIZE 4096UL + +#define METAL_SIFIVE_GPIO0 +#define METAL_SIFIVE_GPIO0_VALUE 0UL +#define METAL_SIFIVE_GPIO0_INPUT_EN 4UL +#define METAL_SIFIVE_GPIO0_OUTPUT_EN 8UL +#define METAL_SIFIVE_GPIO0_PORT 12UL +#define METAL_SIFIVE_GPIO0_PUE 16UL +#define METAL_SIFIVE_GPIO0_DS 20UL +#define METAL_SIFIVE_GPIO0_RISE_IE 24UL +#define METAL_SIFIVE_GPIO0_RISE_IP 28UL +#define METAL_SIFIVE_GPIO0_FALL_IE 32UL +#define METAL_SIFIVE_GPIO0_FALL_IP 36UL +#define METAL_SIFIVE_GPIO0_HIGH_IE 40UL +#define METAL_SIFIVE_GPIO0_HIGH_IP 44UL +#define METAL_SIFIVE_GPIO0_LOW_IE 48UL +#define METAL_SIFIVE_GPIO0_LOW_IP 52UL +#define METAL_SIFIVE_GPIO0_IOF_EN 56UL +#define METAL_SIFIVE_GPIO0_IOF_SEL 60UL +#define METAL_SIFIVE_GPIO0_OUT_XOR 64UL + +/* From led@0red */ + +/* From led@0green */ + +/* From led@0blue */ + +#define METAL_SIFIVE_GPIO_LEDS + +/* From i2c@10016000 */ +#define METAL_SIFIVE_I2C0_10016000_BASE_ADDRESS 268525568UL +#define METAL_SIFIVE_I2C0_0_BASE_ADDRESS 268525568UL +#define METAL_SIFIVE_I2C0_10016000_SIZE 4096UL +#define METAL_SIFIVE_I2C0_0_SIZE 4096UL + +#define METAL_SIFIVE_I2C0 +#define METAL_SIFIVE_I2C0_PRESCALE_LOW 0UL +#define METAL_SIFIVE_I2C0_PRESCALE_HIGH 4UL +#define METAL_SIFIVE_I2C0_CONTROL 8UL +#define METAL_SIFIVE_I2C0_TRANSMIT 12UL +#define METAL_SIFIVE_I2C0_RECEIVE 12UL +#define METAL_SIFIVE_I2C0_COMMAND 16UL +#define METAL_SIFIVE_I2C0_STATUS 16UL + +/* From local_external_interrupts_0 */ + +#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 + +/* From pwm@10015000 */ +#define METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS 268521472UL +#define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268521472UL +#define METAL_SIFIVE_PWM0_10015000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_0_SIZE 4096UL + +#define METAL_SIFIVE_PWM0 +#define METAL_SIFIVE_PWM0_PWMCFG 0UL +#define METAL_SIFIVE_PWM0_PWMCOUNT 8UL +#define METAL_SIFIVE_PWM0_PWMS 16UL +#define METAL_SIFIVE_PWM0_PWMCMP0 32UL +#define METAL_SIFIVE_PWM0_PWMCMP1 36UL +#define METAL_SIFIVE_PWM0_PWMCMP2 40UL +#define METAL_SIFIVE_PWM0_PWMCMP3 44UL + +/* From spi@10014000 */ +#define METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS 268517376UL +#define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268517376UL +#define METAL_SIFIVE_SPI0_10014000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_0_SIZE 4096UL + +#define METAL_SIFIVE_SPI0 +#define METAL_SIFIVE_SPI0_SCKDIV 0UL +#define METAL_SIFIVE_SPI0_SCKMODE 4UL +#define METAL_SIFIVE_SPI0_CSID 16UL +#define METAL_SIFIVE_SPI0_CSDEF 20UL +#define METAL_SIFIVE_SPI0_CSMODE 24UL +#define METAL_SIFIVE_SPI0_DELAY0 40UL +#define METAL_SIFIVE_SPI0_DELAY1 44UL +#define METAL_SIFIVE_SPI0_FMT 64UL +#define METAL_SIFIVE_SPI0_TXDATA 72UL +#define METAL_SIFIVE_SPI0_RXDATA 76UL +#define METAL_SIFIVE_SPI0_TXMARK 80UL +#define METAL_SIFIVE_SPI0_RXMARK 84UL +#define METAL_SIFIVE_SPI0_FCTRL 96UL +#define METAL_SIFIVE_SPI0_FFMT 100UL +#define METAL_SIFIVE_SPI0_IE 112UL +#define METAL_SIFIVE_SPI0_IP 116UL + +/* From serial@10013000 */ +#define METAL_SIFIVE_UART0_10013000_BASE_ADDRESS 268513280UL +#define METAL_SIFIVE_UART0_0_BASE_ADDRESS 268513280UL +#define METAL_SIFIVE_UART0_10013000_SIZE 4096UL +#define METAL_SIFIVE_UART0_0_SIZE 4096UL + +#define METAL_SIFIVE_UART0 +#define METAL_SIFIVE_UART0_TXDATA 0UL +#define METAL_SIFIVE_UART0_RXDATA 4UL +#define METAL_SIFIVE_UART0_TXCTRL 8UL +#define METAL_SIFIVE_UART0_RXCTRL 12UL +#define METAL_SIFIVE_UART0_IE 16UL +#define METAL_SIFIVE_UART0_IP 20UL +#define METAL_SIFIVE_UART0_DIV 24UL + +#endif /* SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H*/ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds new file mode 100644 index 000000000..a28307841 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds @@ -0,0 +1,234 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +OUTPUT_ARCH("riscv") + +ENTRY(_enter) + +MEMORY +{ + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x4000 + flash (rxai!w) : ORIGIN = 0x20010000, LENGTH = 0x6a120 +} + +PHDRS +{ + flash PT_LOAD; + ram_init PT_LOAD; + itim_init PT_LOAD; + ram PT_NULL; + itim PT_NULL; +} + +SECTIONS +{ + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; + PROVIDE(__metal_boot_hart = 0); + PROVIDE(__metal_chicken_bit = 0); + + + .init : + { + KEEP (*(.text.metal.init.enter)) + KEEP (*(SORT_NONE(.init))) + KEEP (*(.text.libgloss.start)) + } >flash AT>flash :flash + + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.itim .itim.*) + *(.gnu.linkonce.t.*) + } >flash AT>flash :flash + + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + } >flash AT>flash :flash + + + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >flash AT>flash :flash + + + . = ALIGN(4); + + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >flash AT>flash :flash + + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >flash AT>flash :flash + + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >flash AT>flash :flash + + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >flash AT>flash :flash + + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >flash AT>flash :flash + + + .litimalign : + { + . = ALIGN(4); + PROVIDE( metal_segment_itim_source_start = . ); + } >flash AT>flash :flash + + + .ditimalign : + { + . = ALIGN(4); + PROVIDE( metal_segment_itim_target_start = . ); + } >ram AT>flash :ram_init + + + .itim : + { + *(.itim .itim.*) + } >flash AT>flash :flash + + + . = ALIGN(8); + PROVIDE( metal_segment_itim_target_end = . ); + + + .lalign : + { + . = ALIGN(4); + PROVIDE( _data_lma = . ); + PROVIDE( metal_segment_data_source_start = . ); + } >flash AT>flash :flash + + + .dalign : + { + . = ALIGN(4); + PROVIDE( metal_segment_data_target_start = . ); + } >ram AT>flash :ram_init + + + .data : + { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) + } >ram AT>flash :ram_init + + + . = ALIGN(4); + PROVIDE( _edata = . ); + PROVIDE( edata = . ); + PROVIDE( metal_segment_data_target_end = . ); + PROVIDE( _fbss = . ); + PROVIDE( __bss_start = . ); + PROVIDE( metal_segment_bss_target_start = . ); + + + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + } >ram AT>ram :ram + + + . = ALIGN(8); + PROVIDE( _end = . ); + PROVIDE( end = . ); + PROVIDE( metal_segment_bss_target_end = . ); + + + .stack : + { + PROVIDE(metal_segment_stack_begin = .); + . = __stack_size; + PROVIDE( _sp = . ); + PROVIDE(metal_segment_stack_end = .); + } >ram AT>ram :ram + + + .heap : + { + PROVIDE( metal_segment_heap_target_start = . ); + . = __heap_size; + PROVIDE( metal_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + } >ram AT>ram :ram + + +} + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.h new file mode 100644 index 000000000..f76dbd632 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.h @@ -0,0 +1,872 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ +/* ----------------------------------- */ +/* ----------------------------------- */ + +#ifndef ASSEMBLY + +#include + +#ifdef __METAL_MACHINE_MACROS + +#ifndef MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H +#define MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H + +#define __METAL_CLINT_NUM_PARENTS 2 + +#ifndef __METAL_CLINT_NUM_PARENTS +#define __METAL_CLINT_NUM_PARENTS 0 +#endif +#define __METAL_PLIC_SUBINTERRUPTS 27 + +#define __METAL_PLIC_NUM_PARENTS 1 + +#ifndef __METAL_PLIC_SUBINTERRUPTS +#define __METAL_PLIC_SUBINTERRUPTS 0 +#endif +#ifndef __METAL_PLIC_NUM_PARENTS +#define __METAL_PLIC_NUM_PARENTS 0 +#endif +#ifndef __METAL_CLIC_SUBINTERRUPTS +#define __METAL_CLIC_SUBINTERRUPTS 0 +#endif + +#endif /* MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H*/ + +#else /* ! __METAL_MACHINE_MACROS */ + +#ifndef MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H +#define MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H + +#define __METAL_CLINT_2000000_INTERRUPTS 2 + +#define METAL_MAX_CLINT_INTERRUPTS 2 + +#define __METAL_CLINT_NUM_PARENTS 2 + +#define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1 + +#define __METAL_PLIC_SUBINTERRUPTS 27 + +#define METAL_MAX_PLIC_INTERRUPTS 1 + +#define __METAL_PLIC_NUM_PARENTS 1 + +#define __METAL_CLIC_SUBINTERRUPTS 0 +#define METAL_MAX_CLIC_INTERRUPTS 0 + +#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16 + +#define METAL_MAX_LOCAL_EXT_INTERRUPTS 16 + +#define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 + +#define __METAL_GPIO_10012000_INTERRUPTS 16 + +#define METAL_MAX_GPIO_INTERRUPTS 16 + +#define __METAL_SERIAL_10013000_INTERRUPTS 1 + +#define METAL_MAX_UART_INTERRUPTS 1 + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* From clock@0 */ +struct __metal_driver_fixed_clock __metal_dt_clock_0; + +/* From clock@2 */ +struct __metal_driver_fixed_clock __metal_dt_clock_2; + +/* From clock@5 */ +struct __metal_driver_fixed_clock __metal_dt_clock_5; + +struct metal_memory __metal_dt_mem_dtim_80000000; + +struct metal_memory __metal_dt_mem_spi_10014000; + +/* From clint@2000000 */ +struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; + +/* From cpu@0 */ +struct __metal_driver_cpu __metal_dt_cpu_0; + +struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; + +/* From interrupt_controller@c000000 */ +struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; + +struct metal_pmp __metal_dt_pmp; + +/* From local_external_interrupts_0 */ +struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; + +/* From gpio@10012000 */ +struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; + +/* From led@0red */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0red; + +/* From led@0green */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0green; + +/* From led@0blue */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue; + +/* From spi@10014000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; + +/* From serial@10013000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; + +/* From clock@3 */ +struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; + +/* From clock@1 */ +struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; + +/* From clock@4 */ +struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; + +/* From prci@10008000 */ +struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; + + + +/* --------------------- fixed_clock ------------ */ +static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_0) { + return METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY; + } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_2) { + return METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY; + } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_5) { + return METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY; + } + else { + return 0; + } +} + + + +/* --------------------- fixed_factor_clock ------------ */ + + +/* --------------------- sifive_clint0 ------------ */ +static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_RISCV_CLINT0_2000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { + return METAL_MAX_CLINT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 1) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 3; + } + else if (idx == 1) { + return 7; + } + else { + return 0; + } +} + + + +/* --------------------- cpu ------------ */ +static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return -1; + } +} + +static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 1000000; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return &__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 8; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_plic0 ------------ */ +static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_NDEV; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { + return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else if (idx == 0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 11; + } + else if (idx == 0) { + return 11; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ +static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { + return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller) +{ + if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { + return METAL_MAX_LOCAL_EXT_INTERRUPTS; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) +{ + if (idx == 0) { + return 16; + } + else if (idx == 1) { + return 17; + } + else if (idx == 2) { + return 18; + } + else if (idx == 3) { + return 19; + } + else if (idx == 4) { + return 20; + } + else if (idx == 5) { + return 21; + } + else if (idx == 6) { + return 22; + } + else if (idx == 7) { + return 23; + } + else if (idx == 8) { + return 24; + } + else if (idx == 9) { + return 25; + } + else if (idx == 10) { + return 26; + } + else if (idx == 11) { + return 27; + } + else if (idx == 12) { + return 28; + } + else if (idx == 13) { + return 29; + } + else if (idx == 14) { + return 30; + } + else if (idx == 15) { + return 31; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_global_external_interrupts0 ------------ */ + + +/* --------------------- sifive_gpio0 ------------ */ +static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_SIFIVE_GPIO0_10012000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return METAL_MAX_GPIO_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) +{ + if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) +{ + if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 0)) { + return 7; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 1))) { + return 8; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 2))) { + return 9; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 3))) { + return 10; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 4))) { + return 11; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 5))) { + return 12; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 6))) { + return 13; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 7))) { + return 14; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 8))) { + return 15; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 9))) { + return 16; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 10))) { + return 17; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 11))) { + return 18; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 12))) { + return 19; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 13))) { + return 20; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 14))) { + return 21; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 15))) { + return 22; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_gpio_button ------------ */ + + +/* --------------------- sifive_gpio_led ------------ */ +static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return (struct metal_gpio *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return 22; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return 19; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return 21; + } + else { + return 0; + } +} + +static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) +{ + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + return "LD0red"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + return "LD0green"; + } + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + return "LD0blue"; + } + else { + return ""; + } +} + + + +/* --------------------- sifive_gpio_switch ------------ */ + + +/* --------------------- sifive_spi0 ------------ */ +static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_SIZE; + } + else { + return 0; + } +} + +static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +{ + return (struct metal_clock *)&__metal_dt_clock_4.clock; +} + +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +{ + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +{ + return 60; +} + +static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +{ + return 60; +} + + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_uart0 ------------ */ +static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_SIZE; + } + else { + return 0; + } +} + +static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_MAX_UART_INTERRUPTS; + } + else { + return 0; + } +} + +static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return NULL; + } +} + +static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) +{ + return 5; +} + +static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) +{ + return (struct metal_clock *)&__metal_dt_clock_4.clock; +} + +static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +{ + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; +} + +static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +{ + return 196608; +} + +static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +{ + return 196608; +} + + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_2.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + +static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG; +} + + + +/* --------------------- sifive_fe310_g000_hfxosc ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_0.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG; +} + + + +/* --------------------- sifive_fe310_g000_pll ------------ */ +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_3.clock; +} + +static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_1.clock; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) +{ + return METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV; +} + +static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_PLLCFG; +} + +static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) +{ + return 16000000; +} + + + +/* --------------------- sifive_fe310_g000_prci ------------ */ +static inline long __metal_driver_sifive_fe310_g000_prci_base( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS; +} + +static inline long __metal_driver_sifive_fe310_g000_prci_size( ) +{ + return METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE; +} + +static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + + + +/* --------------------- sifive_fu540_c000_l2 ------------ */ + + +#define __METAL_DT_MAX_MEMORIES 2 + +asm (".weak __metal_memory_table"); +struct metal_memory *__metal_memory_table[] = { + &__metal_dt_mem_dtim_80000000, + &__metal_dt_mem_spi_10014000}; + +/* From serial@10013000 */ +#define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_10013000.uart) + +#define __METAL_DT_SERIAL_10013000_HANDLE (&__metal_dt_serial_10013000.uart) + +#define __METAL_DT_STDOUT_UART_BAUD 115200 + +/* From clint@2000000 */ +#define __METAL_DT_RISCV_CLINT0_HANDLE (&__metal_dt_clint_2000000.controller) + +#define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller) + +#define __METAL_DT_MAX_HARTS 1 + +asm (".weak __metal_cpu_table"); +struct __metal_driver_cpu *__metal_cpu_table[] = { + &__metal_dt_cpu_0}; + +/* From interrupt_controller@c000000 */ +#define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) + +#define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) + +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) + +/* From local_external_interrupts_0 */ +#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) + +#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) + +#define __MEE_DT_MAX_GPIOS 1 + +asm (".weak __metal_gpio_table"); +struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { + &__metal_dt_gpio_10012000}; + +#define __METAL_DT_MAX_BUTTONS 0 + +asm (".weak __metal_button_table"); +struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { + NULL }; +#define __METAL_DT_MAX_LEDS 3 + +asm (".weak __metal_led_table"); +struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { + &__metal_dt_led_0red, + &__metal_dt_led_0green, + &__metal_dt_led_0blue}; + +#define __METAL_DT_MAX_SWITCHES 0 + +asm (".weak __metal_switch_table"); +struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { + NULL }; +#define __METAL_DT_MAX_SPIS 1 + +asm (".weak __metal_spi_table"); +struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { + &__metal_dt_spi_10014000}; + +/* From clock@4 */ +#define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4) + +#define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4) + +#endif /* MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H*/ + +#endif /* ! __METAL_MACHINE_MACROS */ + +#endif /* ! ASSEMBLY */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/Makefile b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/Makefile new file mode 100644 index 000000000..3fd596564 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/Makefile @@ -0,0 +1,52 @@ +# Copyright (c) 2019 SiFive Inc. +# +# Documentation Build + +.PHONY: all +all: html pdf + +.PHONY: clean +clean: clean-pdf clean-html clean-xml + +########################## +# Build PDF Documentation +########################## + +.PHONY: pdf +pdf: latex/FreedomMetal.pdf + +latex/FreedomMetal.pdf: latex/FreedomMetal.tex + $(MAKE) -C latex + +latex/FreedomMetal.tex: xml/index.xml sphinx/* + sphinx-build -b latex sphinx latex + +.PHONY: clean-pdf +clean-pdf: + rm -rf latex + +########################### +# Build HTML Documentation +########################### + +.PHONY: html +html: html/index.html + +# Use Sphinx to build HTML from Doxygen XML +html/index.html: xml/index.xml sphinx/* + sphinx-build -b html sphinx html + +.PHONY: clean-html +clean-html: + rm -rf html/* html/.buildinfo html/.doctrees + +########################## +# Build XML Documentation +########################## + +xml/index.xml: ../metal/*.h + cd .. && doxygen + +.PHONY: clean-xml +clean-xml: + rm -rf xml diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/README.md b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/README.md new file mode 100644 index 000000000..b81601c31 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/README.md @@ -0,0 +1,55 @@ +# Documentation Generation + +## Requirements + +You'll need the following software: +- [Doxygen](http://www.doxygen.nl/index.html) +- [Sphinx](http://www.sphinx-doc.org/en/master/index.html) +- LaTeX (For building a PDF) + +### Ubuntu + +You can install the required software on Ubuntu with the following: + +``` +sudo apt install doxygen python3-sphinx python3-breathe graphviz python3-pydot +sudo apt install texlive-full latexmk +``` + +The second line can be omitted if you don't intend to build the PDF. + +### MacOS + +You can install the required software on MacOS with the following: + +``` +brew install doxygen sphinx-doc graphviz +brew cask install mactex +``` + +The second line can be omitted if you don't intend to build the PDF. + +## Building the Docs + +You can generate both the HTML and PDF documentation with +``` +make +``` + +Or only the HTML or PDF docs using + +``` +make html +``` +or + +``` +make pdf +``` + +You can clean the build files and outputs with + +``` +make clean +``` + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/.buildinfo b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/.buildinfo new file mode 100644 index 000000000..557f5ea80 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/.buildinfo @@ -0,0 +1,4 @@ +# Sphinx build info version 1 +# This file hashes the configuration used when building these files. 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b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_images/graphviz-4e69a35c14995622b7f966825bca72b81124fc03.png.map new file mode 100644 index 000000000..dc0bd8f96 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_images/graphviz-4e69a35c14995622b7f966825bca72b81124fc03.png.map @@ -0,0 +1,2 @@ + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/api.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/api.rst.txt new file mode 100644 index 000000000..5615e2f58 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/api.rst.txt @@ -0,0 +1,13 @@ +API Reference +============= + +The API documentation aims to provide a complete reference to the +Freedom Metal API. + +The API documentation is split into sections corresponding to each feature: + +.. toctree:: + :glob: + + apiref/* + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/button.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/button.rst.txt new file mode 100644 index 000000000..2f749da14 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/button.rst.txt @@ -0,0 +1,6 @@ +Buttons +======= + +.. doxygenfile:: metal/button.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cache.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cache.rst.txt new file mode 100644 index 000000000..6de6a9f32 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cache.rst.txt @@ -0,0 +1,6 @@ +Caches +====== + +.. doxygenfile:: metal/cache.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/clock.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/clock.rst.txt new file mode 100644 index 000000000..5b3526e65 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/clock.rst.txt @@ -0,0 +1,6 @@ +Clocks +====== + +.. doxygenfile:: metal/clock.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cpu.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cpu.rst.txt new file mode 100644 index 000000000..5f192aaf4 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/cpu.rst.txt @@ -0,0 +1,6 @@ +CPU +=== + +.. doxygenfile:: metal/cpu.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/gpio.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/gpio.rst.txt new file mode 100644 index 000000000..2759a91d6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/gpio.rst.txt @@ -0,0 +1,5 @@ +GPIO +==== + +.. doxygenfile:: metal/gpio.h + :project: metal diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/interrupt.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/interrupt.rst.txt new file mode 100644 index 000000000..a6a6c2d32 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/interrupt.rst.txt @@ -0,0 +1,6 @@ +Interrupts +========== + +.. doxygenfile:: metal/interrupt.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/itim.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/itim.rst.txt new file mode 100644 index 000000000..3199324c2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/itim.rst.txt @@ -0,0 +1,7 @@ +ITIM +==== + +.. doxygenfile:: metal/itim.h + :project: metal + :no-link: + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/led.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/led.rst.txt new file mode 100644 index 000000000..e14156d65 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/led.rst.txt @@ -0,0 +1,6 @@ +LEDs +==== + +.. doxygenfile:: metal/led.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/lock.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/lock.rst.txt new file mode 100644 index 000000000..17f09f82c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/lock.rst.txt @@ -0,0 +1,6 @@ +Locks +======= + +.. doxygenfile:: metal/lock.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/memory.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/memory.rst.txt new file mode 100644 index 000000000..2fdff1674 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/memory.rst.txt @@ -0,0 +1,6 @@ +Memory Enumeration +================== + +.. doxygenfile:: metal/memory.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/pmp.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/pmp.rst.txt new file mode 100644 index 000000000..cc7771773 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/pmp.rst.txt @@ -0,0 +1,6 @@ +PMPs +==== + +.. doxygenfile:: metal/pmp.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/shutdown.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/shutdown.rst.txt new file mode 100644 index 000000000..86aecb5cf --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/shutdown.rst.txt @@ -0,0 +1,6 @@ +Shutdown +======== + +.. doxygenfile:: metal/shutdown.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/spi.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/spi.rst.txt new file mode 100644 index 000000000..a40c62472 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/spi.rst.txt @@ -0,0 +1,6 @@ +SPIs +===== + +.. doxygenfile:: metal/spi.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/switch.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/switch.rst.txt new file mode 100644 index 000000000..6870196b2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/switch.rst.txt @@ -0,0 +1,6 @@ +Switches +======== + +.. doxygenfile:: metal/switch.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/timer.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/timer.rst.txt new file mode 100644 index 000000000..2bea5c438 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/timer.rst.txt @@ -0,0 +1,6 @@ +Timer API +========= + +.. doxygenfile:: metal/timer.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/tty.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/tty.rst.txt new file mode 100644 index 000000000..7aaafa292 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/tty.rst.txt @@ -0,0 +1,6 @@ +TTY +=== + +.. doxygenfile:: metal/tty.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/uart.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/uart.rst.txt new file mode 100644 index 000000000..df7ef9a4d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/apiref/uart.rst.txt @@ -0,0 +1,6 @@ +UARTs +===== + +.. doxygenfile:: metal/uart.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide.rst.txt new file mode 100644 index 000000000..3377b2cda --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide.rst.txt @@ -0,0 +1,9 @@ +Developer Guide +=============== + +.. toctree:: + :maxdepth: 1 + :glob: + + devguide/* + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/exceptions.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/exceptions.rst.txt new file mode 100644 index 000000000..c8c53effe --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/exceptions.rst.txt @@ -0,0 +1,103 @@ +Exception Handlers +================== + +CPU exceptions are the mechanism by which various execution and memory system +errors are handled. When an exception occurs, Freedom Metal will call the +corresponding exception handler function, if one has been registered by the +application. + +Initializing the CPU +-------------------- + +When the user application enters the ``main()`` function, the Freedom Metal +framework has not yet performed the initialization necessary to register +exception handlers. If this initialization is not performed before an exception +occurs, any exception will cause the CPU to spin in a tight loop until reset. + +To initialize the Freedom Metal exception handlers, initialize CPU interrupts: + +.. code-block:: C + + struct metal_cpu *cpu0 = metal_get_cpu(0); + if(!cpu) { + /* There was an error acquiring the CPU hart 0 handle */ + } + + struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0); + if(!cpu_int) { + /* There was an error acquiring the CPU interrupt controller */ + } + + metal_interrupt_init(cpu_int); + +The Freedom Metal interrupt API is further documented in :doc:`/devguide/interrupts` +and :doc:`/apiref/interrupt`. + +Defining an Exception Handler +----------------------------- + +Exception handlers must conform to the following function signature: + +.. doxygentypedef:: metal_exception_handler_t + :project: metal + :no-link: + +Therefore, an example exception handler might look like: + +.. code-block:: C + + void my_exception_handler(struct metal_cpu *cpu, int ecode) { + /* Contents of handler */ + } + +Registering an Exception Handler +-------------------------------- + +Exception handlers are registered with a given CPU hart for an individual exception +code. + +.. code-block:: C + + /* CPU Hart 0's interrupt controller must be initialized + * if it is not already */ + struct metal_cpu *cpu0 = metal_get_cpu(0); + + int rc = metal_cpu_exception_register(cpu0, + , /* Set to your desired value */ + my_exception_handler); + if(rc != 0) { + /* Failed to register exception handler */ + } + +A single exception handler may be used for multiple exception codes. For this reason, +exception handlers receive the exception code as the ``ecode`` parameter and may use +this to determine how to handle the exception. + +Returing Execution after a Faulting Instruction +----------------------------------------------- + +The default behavior of a RISC-V CPU is to return execution to the faulting instruction. +If this is not the desired behavior, execution can be returned to the instruction after +the faulting instruction using the following method: + +.. code-block:: C + + void return_after_fault(struct metal_cpu *cpu, int ecode) + { + /* Get the faulting instruction address */ + uintptr_t epc = metal_cpu_get_exception_pc(cpu); + + /* Get the length of the faulting instruction */ + size_t len = metal_cpu_get_instruction_length(cpu, epc); + + /* Advance stored exception program counter by the + * instruction length */ + metal_cpu_set_exception_pc(cpu, epc + len); + } + +Additional Documentation +------------------------ + +Additional documentation for the exception handler API can be found in :doc:`The CPU API Reference `. + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/fe310-g000-pll.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/fe310-g000-pll.rst.txt new file mode 100644 index 000000000..af2ddd2d3 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/fe310-g000-pll.rst.txt @@ -0,0 +1,29 @@ +FE310-G00 PLL +============= + +On targets with a PLL compatible with the FE310-G000 SoC, the PLL is configured +at program initialization with a constructor. This PLL sets the clock frequency +of the RISC-V CPU, and users of Freedom Metal who wish to set a specific clock +rate can use Freedom Metal to request that the PLL take on a certain output rate. + +In the DeviceTree for your target, there should be a node like the following +(example taken from the SiFive HiFive1): + +.. code-block:: DeviceTree + + hfclk: clock@4 { + compatible = "sifive,fe310-g000,pll"; + clocks = <&hfxoscout &hfroscout>; + clock-names = "pllref", "pllsel0"; + reg = <&prci 0x8 &prci 0xc>; + reg-names = "config", "divider"; + clock-frequency = <16000000>; + }; + +The ``clock-frequency`` property of the node sets the requested clock rate of +the FE310-G000 PLL. The PLL driver will attempt to configure the PLL to achieve +this clock rate. + +Users should note that the FE310-G000 PLL only supports certain input/output +clock rate ratios, and so the effective output rate of the PLL may differ from +the requested rate. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/interrupts.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/interrupts.rst.txt new file mode 100644 index 000000000..914b58690 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/interrupts.rst.txt @@ -0,0 +1,112 @@ +Interrupt Handlers +================== + +The Interrupt Heirarchy +----------------------- + +Freedom Metal conceptualizes interrupts as a heirarchy of interrupt controllers. +This heirarchy is established by the interrupt heirarchy of the target platform +itself. Presently, the interrupt heirarchy for a given platform is best documented +by the target's DeviceTree representation, which can be found in +``bsp//design.dts``. + +In Freedom Metal, the heirarchy is a tree. The nodes of the tree consist of +``struct metal_interrupt``: + +.. doxygenstruct:: metal_interrupt + :project: metal + +And the vertices of the tree consist of interrupt ``id``. + +.. digraph:: int_heirarchy_graph + + cpu [label="CPU"]; + cpu_int [label="CPU Interrupt Controller", shape=box]; + timer_int [label="Timer Interrupt Controller", shape=box]; + soft_int [label="Software Interrupt Controller", shape=box]; + + cpu -> cpu_int [label="ID = 0"]; + cpu_int -> timer_int [label="ID = timer_id"]; + cpu_int -> soft_int [label="ID = software_id"]; + +The CPU Interrupt Controller +---------------------------- + +The CPU interrupt controller is the top of the interrupt heirarchy. It must be +initialized before any other interrupt controllers are initialized. In example: + +.. code-block:: C + + struct metal_cpu *cpu0 = metal_get_cpu(0); + if(!cpu) { + /* Unable to get CPU handle */ + } + struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0); + if(!cpu_int) { + /* Unable to get CPU interrupt handle */ + } + metal_interrupt_init(cpu_int); + +The CPU interrupt must be enabled for the CPU to receive any interrupts, and any +enabled interrupts can be masked by disabling the CPU interrupt. + +.. code-block:: C + + int rc = 0; + + /* Enable the CPU interrupt */ + rc = metal_interrupt_enable(cpu_int, 0); + if(rc != 0) { + /* Failed to enable the CPU interrupt */ + } + + /* Disable the CPU interrupt */ + rc = metal_interrupt_disable(cpu_int, 0); + if(rc != 0) { + /* Failed to disable the CPU interrupt */ + } + +Interrupt Handlers +------------------ + +Interrupt handlers must conform to the following function signature: + +.. doxygentypedef:: metal_interrupt_handler_t + :project: metal + +Therefore, an interrupt handler might look like: + +.. code-block:: C + + void my_interrupt_handler(int id, void *priv_data) { + /* Contents of handler */ + } + +Registering an Interrupt Handler +-------------------------------- + +Interrupt handlers are registered with the interrupt controller for the interrupt +they are servicing. For example, if we want to register a CPU timer interrupt: + +.. code-block:: C + + struct metal_interrupt *timer_int = metal_cpu_timer_interrupt_controller(cpu0); + if(!timer_int) { + /* Failed to get timer interrupt controller */ + } + metal_interrupt_init(timer_int); + + int timer_id = metal_cpu_timer_get_interrupt_id(cpu0); + + int rc = metal_interrupt_register_handler(timer_int, timer_id, my_interrupt_handler, cpu0); + if(rc != 0) { + /* Failed to register interrupt handler */ + } + +Additional Documentation +------------------------ + +Additional documentation for the interrupt handler API can be found in +:doc:`the CPU API reference ` and +:doc:`the Interrupt API reference `. + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/itim.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/itim.rst.txt new file mode 100644 index 000000000..cdee19ca9 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/itim.rst.txt @@ -0,0 +1,41 @@ +Instruction Tightly Integrated Memory +===================================== + +The Instruction Tightly Integrated Memory (ITIM) is an optional feature +on certain SiFive RISC-V CPUs. The ITIM is a memory device which is +optimized in the CoreIP memory heirarchy to provide low-latency +access to instruction memory. + +Freedom Metal provides the ability to designate functions to run out of +the ITIM by decorating the functions with the following "decorator": + +.. doxygendefine:: METAL_PLACE_IN_ITIM + :project: metal + +For example: + +.. code-block:: C + + METAL_PLACE_IN_ITIM + void my_itim_func() { + /* This code will run out of the ITIM */ + } + +Caveats +------- +The ``METAL_PLACE_IN_ITIM`` decorator tells the toolchain to link the +decorated function into the ITIM memory. However, compiler optimizations +such as function inlining may cause execution to never transfer to +instructions fetched from the ITIM. + +If this compiler optimization is not desired, one workaround is to +tell the compiler to not inline the function: + +.. code-block:: C + + __attribute__((noinline)) + METAL_PLACE_IN_ITIM + void my_itim_func() { + /* This code will run out of the ITIM */ + } + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/pmps.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/pmps.rst.txt new file mode 100644 index 000000000..aa535d651 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/pmps.rst.txt @@ -0,0 +1,88 @@ +Physical Memory Protection +========================== + +Physical Memory Protection (PMP) is a part of the RISC-V Privileged Architecture +Specification which discribes the interface for a standard RISC-V memory +protection unit. + +The PMP defines a finite number of PMP regions which can be individually configured +to enforce access permissions to a range of addresses in memory. Each PMP region +is configurable with the following options: + +.. doxygenstruct:: metal_pmp_config + :project: metal + :members: + :no-link: + +Initializing the PMP +-------------------- + +All PMP-related functions first depend on having a handle to the PMP device: + +.. code-block:: C + + struct metal_pmp *pmp = metal_pmp_get_device(); + if(!pmp) { + /* Failed to get PMP device handle */ + } + +PMP initialization is optional and has the effect of disabling all PMP regions, +if possible: + +.. code-block:: C + + metal_pmp_init(pmp); + +The number of PMP regions available can be retrieved from the PMP device handle: + +.. doxygenstruct:: metal_pmp + :project: metal + :members: + :no-link: + +Configuring a PMP Region +------------------------ + +Freedom Metal has a set of APIs for configuring a PMP region. The most generic of these +is + +.. doxygenfunction:: metal_pmp_set_region + :project: metal + +This function allows for the configuration of all PMP region settings. + +Additional APIs are provided for granularly changing individual PMP region settings. +For example: + +.. doxygenfunction:: metal_pmp_set_address + :project: metal + :no-link: +.. doxygenfunction:: metal_pmp_lock + :project: metal + :no-link: +.. doxygenfunction:: metal_pmp_set_writeable + :project: metal + :no-link: + +Additional documentation for this API is provided in :doc:`the PMP API reference `. + +The RISC-V specification allows implementation of PMP to hard-wire the configuration +values of PMP regions. In these cases, attempts to configure these PMP regions will +fail. + +Handling PMP Access Faults +-------------------------- + +Attempted memory accesses which the PMP is configured to prevent trigger a +CPU exception. These exceptions can be handled by installing a CPU exception +handler for exception codes related to memory access faults. + +Additional documentation about creating and registering exception handlers can +be found in :doc:`the Exception Handlers Developer Guide `. + +Additional Documentation +------------------------ + +Additional documentation about the Physical Memory Protection system and fault +handling on RISC-V systems can be found in +`The RISC-V Privileged ISA Specification v1.10 `_. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/tty.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/tty.rst.txt new file mode 100644 index 000000000..c94135174 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/devguide/tty.rst.txt @@ -0,0 +1,24 @@ +Standard I/O +============ + +Freedom Metal integrates with libc ``STDOUT`` to provide virtual terminal support. +The default ``STDOUT`` device is the first UART serial peripheral on the target. +If no UART serial peripheral is present, such as in the case of SiFive CoreIP +test harnesses, then the bytes sent to ``STDOUT`` are dropped. + +Hello World +----------- + +Using the virtual terminal with Freedom Metal is exactly what you might expect: + +.. code-block:: C + :linenos: + + #include + + int main(void) { + printf("Hello, world!"); + + return 0; + } + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/index.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/index.rst.txt new file mode 100644 index 000000000..b4e0e79d0 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/index.rst.txt @@ -0,0 +1,25 @@ +Freedom Metal +============= + +This is the documentation for the SiFive Freedom Metal library |version|. + +Freedom Metal is generally available from the `Freedom Metal GitHub Repository`_. + +.. _Freedom Metal GitHub Repository: + https://github.com/sifive/freedom-metal + +Table of Contents +----------------- + +.. toctree:: + :maxdepth: 2 + + introduction + devguide + api + +Indices and tables +------------------ + +* :ref:`genindex` +* :ref:`search` diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/introduction.rst.txt b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/introduction.rst.txt new file mode 100644 index 000000000..de4da0d64 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_sources/introduction.rst.txt @@ -0,0 +1,37 @@ +Introduction to Freedom Metal +============================= + +What is Freedom Metal? +---------------------- + +Freedom Metal enables portable, bare-metal application development for all of +SiFive's RISC-V IP, FPGA evaluation targets, and development boards. + +Freedom Metal provides: + - A bare-metal C application environment + - An API for controlling CPU features and peripherals + - The ability to retarget to any SiFive RISC-V product + +This makes Freedom Metal suitable for: + - Writing portable hardware tests + - Bootstrapping bare metal application development + - A RISC-V hardware abstraction layer + - And more! + + +How Do I Use Freedom Metal? +--------------------------- + +The best way to get started writing applications with Freedom Metal is to use +the `SiFive Freedom E SDK`_ which bundles the build scripts and configuration +necessary to use Freedom Metal with SiFive's standard evaluation products. + +If you prefer working with an Integrated Development Environment (IDE), +`SiFive Freedom Studio`_ comes packaged with a prebuilt toolchain and the same +Freedom Metal examples from Freedom E SDK. + +.. _SiFive Freedom E SDK: + https://github.com/sifive/freedom-e-sdk + +.. _SiFive Freedom Studio: + https://www.sifive.com/boards#software diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/ajax-loader.gif b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/ajax-loader.gif new file mode 100644 index 0000000000000000000000000000000000000000..61faf8cab23993bd3e1560bff0668bd628642330 GIT binary patch literal 673 zcmZ?wbhEHb6krfw_{6~Q|Nno%(3)e{?)x>&1u}A`t?OF7Z|1gRivOgXi&7IyQd1Pl zGfOfQ60;I3a`F>X^fL3(@);C=vM_KlFfb_o=k{|A33hf2a5d61U}gjg=>Rd%XaNQW zW@Cw{|b%Y*pl8F?4B9 zlo4Fz*0kZGJabY|>}Okf0}CCg{u4`zEPY^pV?j2@h+|igy0+Kz6p;@SpM4s6)XEMg z#3Y4GX>Hjlml5ftdH$4x0JGdn8~MX(U~_^d!Hi)=HU{V%g+mi8#UGbE-*ao8f#h+S z2a0-5+vc7MU$e-NhmBjLIC1v|)9+Im8x1yacJ7{^tLX(ZhYi^rpmXm0`@ku9b53aN zEXH@Y3JaztblgpxbJt{AtE1ad1Ca>{v$rwwvK(>{m~Gf_=-Ro7Fk{#;i~+{{>QtvI yb2P8Zac~?~=sRA>$6{!(^3;ZP0TPFR(G_-UDU(8Jl0?(IXu$~#4A!880|o%~Al1tN literal 0 HcmV?d00001 diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/alabaster.css b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/alabaster.css new file mode 100644 index 000000000..25e77387b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/alabaster.css @@ -0,0 +1,688 @@ +@import url("basic.css"); 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+} + +/* Hide certain items when printing */ +@media print { + div.related { + display: none; + } +} \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/basic.css b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/basic.css new file mode 100644 index 000000000..19ced1057 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/basic.css @@ -0,0 +1,665 @@ +/* + * basic.css + * ~~~~~~~~~ + * + * Sphinx stylesheet -- basic theme. + * + * :copyright: Copyright 2007-2018 by the Sphinx team, see AUTHORS. + * :license: BSD, see LICENSE for details. + * + */ + +/* -- main layout ----------------------------------------------------------- */ + +div.clearer { + clear: both; +} + +/* -- relbar ---------------------------------------------------------------- */ + +div.related { + width: 100%; + font-size: 90%; +} + +div.related h3 { + display: none; +} + +div.related ul { + margin: 0; + padding: 0 0 0 10px; + list-style: none; +} + +div.related li { + display: inline; +} + +div.related li.right { + float: right; + margin-right: 5px; +} + +/* -- sidebar --------------------------------------------------------------- */ + +div.sphinxsidebarwrapper { + padding: 10px 5px 0 10px; +} + +div.sphinxsidebar { + float: left; + width: 230px; + margin-left: -100%; + font-size: 90%; + word-wrap: break-word; + overflow-wrap : break-word; +} + +div.sphinxsidebar ul { + list-style: none; +} + +div.sphinxsidebar ul ul, +div.sphinxsidebar ul.want-points { + margin-left: 20px; + list-style: square; +} + +div.sphinxsidebar ul ul { + margin-top: 0; + margin-bottom: 0; +} + +div.sphinxsidebar form { + margin-top: 10px; +} + +div.sphinxsidebar input { + border: 1px solid #98dbcc; + font-family: sans-serif; + font-size: 1em; +} + +div.sphinxsidebar #searchbox input[type="text"] { + float: left; + width: 80%; + padding: 0.25em; + box-sizing: border-box; +} + +div.sphinxsidebar #searchbox input[type="submit"] { + float: left; + width: 20%; + border-left: none; + padding: 0.25em; + box-sizing: border-box; +} + + +img { + border: 0; + max-width: 100%; +} + +/* -- search page ----------------------------------------------------------- */ + +ul.search { + margin: 10px 0 0 20px; + padding: 0; +} + +ul.search li { + padding: 5px 0 5px 20px; + background-image: url(file.png); + background-repeat: no-repeat; + background-position: 0 7px; +} + +ul.search li a { + font-weight: bold; +} + +ul.search li div.context { + color: #888; + margin: 2px 0 0 30px; + text-align: left; +} + +ul.keywordmatches li.goodmatch a { + font-weight: bold; +} + +/* -- index page ------------------------------------------------------------ */ + +table.contentstable { + width: 90%; + margin-left: auto; + margin-right: auto; +} + +table.contentstable p.biglink { + line-height: 150%; +} + +a.biglink { + font-size: 1.3em; +} + +span.linkdescr { + font-style: italic; + padding-top: 5px; + font-size: 90%; +} + +/* -- general index --------------------------------------------------------- */ + +table.indextable { + width: 100%; +} + +table.indextable td { + text-align: left; + vertical-align: top; +} + +table.indextable ul { + margin-top: 0; + margin-bottom: 0; + list-style-type: none; +} + +table.indextable > tbody > tr > td > ul { + padding-left: 0em; +} + +table.indextable tr.pcap { + height: 10px; +} + +table.indextable tr.cap { + margin-top: 10px; + background-color: #f2f2f2; +} + +img.toggler { + margin-right: 3px; + margin-top: 3px; + cursor: pointer; +} + +div.modindex-jumpbox { + border-top: 1px solid #ddd; + border-bottom: 1px solid #ddd; + margin: 1em 0 1em 0; + padding: 0.4em; +} + +div.genindex-jumpbox { + border-top: 1px solid #ddd; + border-bottom: 1px solid #ddd; + margin: 1em 0 1em 0; + padding: 0.4em; +} + +/* -- domain module index --------------------------------------------------- */ + +table.modindextable td { + padding: 2px; + border-collapse: collapse; +} + +/* -- general body styles --------------------------------------------------- */ + +div.body { + min-width: 450px; + max-width: 800px; +} + +div.body p, div.body dd, div.body li, div.body blockquote { + -moz-hyphens: auto; + -ms-hyphens: auto; + -webkit-hyphens: auto; + hyphens: auto; +} + +a.headerlink { + visibility: hidden; +} + +h1:hover > a.headerlink, +h2:hover > a.headerlink, +h3:hover > a.headerlink, +h4:hover > a.headerlink, +h5:hover > a.headerlink, +h6:hover > a.headerlink, +dt:hover > a.headerlink, +caption:hover > a.headerlink, +p.caption:hover > a.headerlink, +div.code-block-caption:hover > a.headerlink { + visibility: visible; +} + +div.body p.caption { + text-align: inherit; +} + +div.body td { + text-align: left; +} + +.first { + margin-top: 0 !important; +} + +p.rubric { + margin-top: 30px; + font-weight: bold; +} + +img.align-left, .figure.align-left, object.align-left { + clear: left; + float: left; + margin-right: 1em; +} + +img.align-right, .figure.align-right, object.align-right { + clear: right; + float: right; + margin-left: 1em; +} + +img.align-center, .figure.align-center, object.align-center { + display: block; + margin-left: auto; + margin-right: auto; +} + +.align-left { + text-align: left; +} + +.align-center { + text-align: center; +} + +.align-right { + text-align: right; +} + +/* -- sidebars -------------------------------------------------------------- */ + +div.sidebar { + margin: 0 0 0.5em 1em; + border: 1px solid #ddb; + padding: 7px 7px 0 7px; + background-color: #ffe; + width: 40%; + float: right; +} + +p.sidebar-title { + font-weight: bold; +} + +/* -- topics ---------------------------------------------------------------- */ + +div.topic { + border: 1px solid #ccc; + padding: 7px 7px 0 7px; + margin: 10px 0 10px 0; +} + +p.topic-title { + font-size: 1.1em; + font-weight: bold; + margin-top: 10px; +} + +/* -- admonitions ----------------------------------------------------------- */ + +div.admonition { + margin-top: 10px; + margin-bottom: 10px; + padding: 7px; +} + +div.admonition dt { + font-weight: bold; +} + +div.admonition dl { + margin-bottom: 0; +} + +p.admonition-title { + margin: 0px 10px 5px 0px; + font-weight: bold; +} + +div.body p.centered { + text-align: center; + margin-top: 25px; +} + +/* -- tables ---------------------------------------------------------------- */ + +table.docutils { + border: 0; + border-collapse: collapse; +} + +table.align-center { + margin-left: auto; + margin-right: auto; +} + +table caption span.caption-number { + font-style: italic; +} + +table caption span.caption-text { +} + +table.docutils td, table.docutils th { + padding: 1px 8px 1px 5px; + border-top: 0; + border-left: 0; + border-right: 0; + border-bottom: 1px solid #aaa; +} + +table.footnote td, table.footnote th { + border: 0 !important; +} + +th { + text-align: left; + padding-right: 5px; +} + +table.citation { + border-left: solid 1px gray; + margin-left: 1px; +} + +table.citation td { + border-bottom: none; +} + +/* -- figures --------------------------------------------------------------- */ + +div.figure { + margin: 0.5em; + padding: 0.5em; +} + +div.figure p.caption { + padding: 0.3em; +} + +div.figure p.caption span.caption-number { + font-style: italic; +} + +div.figure p.caption span.caption-text { +} + +/* -- field list styles ----------------------------------------------------- */ + +table.field-list td, table.field-list th { + border: 0 !important; +} + +.field-list ul { + margin: 0; + padding-left: 1em; +} + +.field-list p { + margin: 0; +} + +.field-name { + -moz-hyphens: manual; + -ms-hyphens: manual; + -webkit-hyphens: manual; + hyphens: manual; +} + +/* -- other body styles ----------------------------------------------------- */ + +ol.arabic { + list-style: decimal; +} + +ol.loweralpha { + list-style: lower-alpha; +} + +ol.upperalpha { + list-style: upper-alpha; +} + +ol.lowerroman { + list-style: lower-roman; +} + +ol.upperroman { + list-style: upper-roman; +} + +dl { + margin-bottom: 15px; +} + +dd p { + margin-top: 0px; +} + +dd ul, dd table { + margin-bottom: 10px; +} + +dd { + margin-top: 3px; + margin-bottom: 10px; + margin-left: 30px; +} + +dt:target, span.highlighted { + background-color: #fbe54e; +} + +rect.highlighted { + fill: #fbe54e; +} + +dl.glossary dt { + font-weight: bold; + font-size: 1.1em; +} + +.optional { + font-size: 1.3em; +} + +.sig-paren { + font-size: larger; +} + +.versionmodified { + font-style: italic; +} + +.system-message { + background-color: #fda; + padding: 5px; + border: 3px solid red; +} + +.footnote:target { + background-color: #ffa; +} + +.line-block { + display: block; + margin-top: 1em; + margin-bottom: 1em; +} + +.line-block .line-block { + margin-top: 0; + margin-bottom: 0; + margin-left: 1.5em; +} + +.guilabel, .menuselection { + font-family: sans-serif; +} + +.accelerator { + text-decoration: underline; +} + +.classifier { + font-style: oblique; +} + +abbr, acronym { + border-bottom: dotted 1px; + cursor: help; +} + +/* -- code displays --------------------------------------------------------- */ + +pre { + overflow: auto; + overflow-y: hidden; /* fixes display issues on Chrome browsers */ +} + +span.pre { + -moz-hyphens: none; + -ms-hyphens: none; + -webkit-hyphens: none; + hyphens: none; +} + +td.linenos pre { + padding: 5px 0px; + border: 0; + background-color: transparent; + color: #aaa; +} + +table.highlighttable { + margin-left: 0.5em; +} + +table.highlighttable td { + padding: 0 0.5em 0 0.5em; +} + +div.code-block-caption { + padding: 2px 5px; + font-size: small; +} + +div.code-block-caption code { + background-color: transparent; +} + +div.code-block-caption + div > div.highlight > pre { + margin-top: 0; +} + +div.code-block-caption span.caption-number { + padding: 0.1em 0.3em; + font-style: italic; +} + +div.code-block-caption span.caption-text { +} + +div.literal-block-wrapper { + padding: 1em 1em 0; +} + +div.literal-block-wrapper div.highlight { + margin: 0; +} + +code.descname { + background-color: transparent; + font-weight: bold; + font-size: 1.2em; +} + +code.descclassname { + background-color: transparent; +} + +code.xref, a code { + background-color: transparent; + font-weight: bold; +} + +h1 code, h2 code, h3 code, h4 code, h5 code, h6 code { + background-color: transparent; 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+ +/** + * make the code below compatible with browsers without + * an installed firebug like debugger +if (!window.console || !console.firebug) { + var names = ["log", "debug", "info", "warn", "error", "assert", "dir", + "dirxml", "group", "groupEnd", "time", "timeEnd", "count", "trace", + "profile", "profileEnd"]; + window.console = {}; + for (var i = 0; i < names.length; ++i) + window.console[names[i]] = function() {}; +} + */ + +/** + * small helper function to urldecode strings + */ +jQuery.urldecode = function(x) { + return decodeURIComponent(x).replace(/\+/g, ' '); +}; + +/** + * small helper function to urlencode strings + */ +jQuery.urlencode = encodeURIComponent; + +/** + * This function returns the parsed url parameters of the + * current request. Multiple values per key are supported, + * it will always return arrays of strings for the value parts. + */ +jQuery.getQueryParameters = function(s) { + if (typeof s === 'undefined') + s = document.location.search; + var parts = s.substr(s.indexOf('?') + 1).split('&'); + var result = {}; + for (var i = 0; i < parts.length; i++) { + var tmp = parts[i].split('=', 2); + var key = jQuery.urldecode(tmp[0]); + var value = jQuery.urldecode(tmp[1]); + if (key in result) + result[key].push(value); + else + result[key] = [value]; + } + return result; +}; + +/** + * highlight a given string on a jquery object by wrapping it in + * span elements with the given class name. + */ +jQuery.fn.highlightText = function(text, className) { + function highlight(node, addItems) { + if (node.nodeType === 3) { + var val = node.nodeValue; + var pos = val.toLowerCase().indexOf(text); + if (pos >= 0 && + !jQuery(node.parentNode).hasClass(className) && + !jQuery(node.parentNode).hasClass("nohighlight")) { + var span; + var isInSVG = jQuery(node).closest("body, svg, foreignObject").is("svg"); + if (isInSVG) { + span = document.createElementNS("http://www.w3.org/2000/svg", "tspan"); + } else { + span = document.createElement("span"); + span.className = className; + } + span.appendChild(document.createTextNode(val.substr(pos, text.length))); + node.parentNode.insertBefore(span, node.parentNode.insertBefore( + document.createTextNode(val.substr(pos + text.length)), + node.nextSibling)); + node.nodeValue = val.substr(0, pos); + if (isInSVG) { + var bbox = span.getBBox(); + var rect = document.createElementNS("http://www.w3.org/2000/svg", "rect"); + rect.x.baseVal.value = bbox.x; + rect.y.baseVal.value = bbox.y; + rect.width.baseVal.value = bbox.width; + rect.height.baseVal.value = bbox.height; + rect.setAttribute('class', className); + var parentOfText = node.parentNode.parentNode; + addItems.push({ + "parent": node.parentNode, + "target": rect}); + } + } + } + else if (!jQuery(node).is("button, select, textarea")) { + jQuery.each(node.childNodes, function() { + highlight(this, addItems); + }); + } + } + var addItems = []; + var result = this.each(function() { + highlight(this, addItems); + }); + for (var i = 0; i < addItems.length; ++i) { + jQuery(addItems[i].parent).before(addItems[i].target); + } + return result; +}; + +/* + * backward compatibility for jQuery.browser + * This will be supported until firefox bug is fixed. + */ +if (!jQuery.browser) { + jQuery.uaMatch = function(ua) { + ua = ua.toLowerCase(); + + var match = /(chrome)[ \/]([\w.]+)/.exec(ua) || + /(webkit)[ \/]([\w.]+)/.exec(ua) || + /(opera)(?:.*version|)[ \/]([\w.]+)/.exec(ua) || + /(msie) ([\w.]+)/.exec(ua) || + ua.indexOf("compatible") < 0 && /(mozilla)(?:.*? rv:([\w.]+)|)/.exec(ua) || + []; + + return { + browser: match[ 1 ] || "", + version: match[ 2 ] || "0" + }; + }; + jQuery.browser = {}; + jQuery.browser[jQuery.uaMatch(navigator.userAgent).browser] = true; +} + +/** + * Small JavaScript module for the documentation. + */ +var Documentation = { + + init : function() { + this.fixFirefoxAnchorBug(); + this.highlightSearchWords(); + this.initIndexTable(); + + }, + + /** + * i18n support + */ + TRANSLATIONS : {}, + PLURAL_EXPR : function(n) { return n === 1 ? 0 : 1; }, + LOCALE : 'unknown', + + // gettext and ngettext don't access this so that the functions + // can safely bound to a different name (_ = Documentation.gettext) + gettext : function(string) { + var translated = Documentation.TRANSLATIONS[string]; + if (typeof translated === 'undefined') + return string; + return (typeof translated === 'string') ? translated : translated[0]; + }, + + ngettext : function(singular, plural, n) { + var translated = Documentation.TRANSLATIONS[singular]; + if (typeof translated === 'undefined') + return (n == 1) ? singular : plural; + return translated[Documentation.PLURALEXPR(n)]; + }, + + addTranslations : function(catalog) { + for (var key in catalog.messages) + this.TRANSLATIONS[key] = catalog.messages[key]; + this.PLURAL_EXPR = new Function('n', 'return +(' + catalog.plural_expr + ')'); + this.LOCALE = catalog.locale; + }, + + /** + * add context elements like header anchor links + */ + addContextElements : function() { + $('div[id] > :header:first').each(function() { + $('\u00B6'). + attr('href', '#' + this.id). + attr('title', _('Permalink to this headline')). + appendTo(this); + }); + $('dt[id]').each(function() { + $('\u00B6'). + attr('href', '#' + this.id). + attr('title', _('Permalink to this definition')). + appendTo(this); + }); + }, + + /** + * workaround a firefox stupidity + * see: https://bugzilla.mozilla.org/show_bug.cgi?id=645075 + */ + fixFirefoxAnchorBug : function() { + if (document.location.hash && $.browser.mozilla) + window.setTimeout(function() { + document.location.href += ''; + }, 10); + }, + + /** + * highlight the search words provided in the url in the text + */ + highlightSearchWords : function() { + var params = $.getQueryParameters(); + var terms = (params.highlight) ? params.highlight[0].split(/\s+/) : []; + if (terms.length) { + var body = $('div.body'); + if (!body.length) { + body = $('body'); + } + window.setTimeout(function() { + $.each(terms, function() { + body.highlightText(this.toLowerCase(), 'highlighted'); + }); + }, 10); + $('

' + _('Hide Search Matches') + '

') + .appendTo($('#searchbox')); + } + }, + + /** + * init the domain index toggle buttons + */ + initIndexTable : function() { + var togglers = $('img.toggler').click(function() { + var src = $(this).attr('src'); + var idnum = $(this).attr('id').substr(7); + $('tr.cg-' + idnum).toggle(); + if (src.substr(-9) === 'minus.png') + $(this).attr('src', src.substr(0, src.length-9) + 'plus.png'); + else + $(this).attr('src', src.substr(0, src.length-8) + 'minus.png'); + }).css('display', ''); + if (DOCUMENTATION_OPTIONS.COLLAPSE_INDEX) { + togglers.click(); + } + }, + + /** + * helper function to hide the search marks again + */ + hideSearchWords : function() { + $('#searchbox .highlight-link').fadeOut(300); + $('span.highlighted').removeClass('highlighted'); + }, + + /** + * make the url absolute + */ + makeURL : function(relativeURL) { + return DOCUMENTATION_OPTIONS.URL_ROOT + '/' + relativeURL; + }, + + /** + * get the current relative url + */ + getCurrentURL : function() { + var path = document.location.pathname; + var parts = path.split(/\//); + $.each(DOCUMENTATION_OPTIONS.URL_ROOT.split(/\//), function() { + if (this === '..') + parts.pop(); + }); + var url = parts.join('/'); + return path.substring(url.lastIndexOf('/') + 1, path.length - 1); + }, + + initOnKeyListeners: function() { + $(document).keyup(function(event) { + var activeElementType = document.activeElement.tagName; + // don't navigate when in search box or textarea + if (activeElementType !== 'TEXTAREA' && activeElementType !== 'INPUT' && activeElementType !== 'SELECT') { + switch (event.keyCode) { + case 37: // left + var prevHref = $('link[rel="prev"]').prop('href'); + if (prevHref) { + window.location.href = prevHref; + return false; + } + case 39: // right + var nextHref = $('link[rel="next"]').prop('href'); + if (nextHref) { + window.location.href = nextHref; + return false; + } + } + } + }); + } +}; + +// quick alias for translations +_ = Documentation.gettext; + +$(document).ready(function() { + Documentation.init(); +}); \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/documentation_options.js b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/documentation_options.js new file mode 100644 index 000000000..0182c8aab --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/documentation_options.js @@ -0,0 +1,9 @@ +var DOCUMENTATION_OPTIONS = { + URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'), + VERSION: 'v201905', + LANGUAGE: 'None', + COLLAPSE_INDEX: false, + FILE_SUFFIX: '.html', + HAS_SOURCE: true, + SOURCELINK_SUFFIX: '.txt' +}; \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/down-pressed.png b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/down-pressed.png new file mode 100644 index 0000000000000000000000000000000000000000..5756c8cad8854722893dc70b9eb4bb0400343a39 GIT binary patch literal 222 zcmeAS@N?(olHy`uVBq!ia0vp^0wB!61|;P_|4#%`OFdm2Ln;`PZ^+1>KjR?B@S0W7 z%OS_REiHONoJ6{+Ks@6k3590|7k9F+ddB6!zw3#&!aw#S`x}3V3&=A(a#84O-&F7T z^k3tZB;&iR9siw0|F|E|DAL<8r-F4!1H-;1{e*~yAKZN5f0|Ei6yUmR#Is)EM(Po_ zi`qJR6|P<~+)N+kSDgL7AjdIC_!O7Q?eGb+L+qOjm{~LLinM4NHn7U%HcK%uoMYO5 VJ~8zD2B3o(JYD@<);T3K0RV0%P>BEl literal 0 HcmV?d00001 diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/down.png b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/down.png new file mode 100644 index 0000000000000000000000000000000000000000..1b3bdad2ceffae91cee61b32f3295f9bbe646e48 GIT binary patch literal 202 zcmeAS@N?(olHy`uVBq!ia0vp^0wB!60wlNoGJgf6CVIL!hEy=F?b*7pIY7kW{q%Rg zx!yQ<9v8bmJwa`TQk7YSw}WVQ()mRdQ;TC;* literal 0 HcmV?d00001 diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/file.png b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/file.png new file mode 100644 index 0000000000000000000000000000000000000000..a858a410e4faa62ce324d814e4b816fff83a6fb3 GIT binary patch literal 286 zcmV+(0pb3MP)s`hMrGg#P~ix$^RISR_I47Y|r1 z_CyJOe}D1){SET-^Amu_i71Lt6eYfZjRyw@I6OQAIXXHDfiX^GbOlHe=Ae4>0m)d(f|Me07*qoM6N<$f}vM^LjV8( literal 0 HcmV?d00001 diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/jquery-3.2.1.js b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/jquery-3.2.1.js new file mode 100644 index 000000000..d2d8ca479 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/_static/jquery-3.2.1.js @@ -0,0 +1,10253 @@ +/*! + * jQuery JavaScript Library v3.2.1 + * https://jquery.com/ + * + * Includes Sizzle.js + * https://sizzlejs.com/ + * + * Copyright JS Foundation and other contributors + * Released under the MIT license + * https://jquery.org/license + * + * Date: 2017-03-20T18:59Z + */ +( function( global, factory ) { + + "use strict"; + + if ( typeof module === "object" && typeof module.exports === "object" ) { + + // For CommonJS and CommonJS-like environments where a proper `window` + // is present, execute the factory and get jQuery. + // For environments that do not have a `window` with a `document` + // (such as Node.js), expose a factory as module.exports. + // This accentuates the need for the creation of a real `window`. + // e.g. var jQuery = require("jquery")(window); + // See ticket #14549 for more info. + module.exports = global.document ? + factory( global, true ) : + function( w ) { + if ( !w.document ) { + throw new Error( "jQuery requires a window with a document" ); + } + return factory( w ); + }; + } else { + factory( global ); + } + +// Pass this if window is not defined yet +} )( typeof window !== "undefined" ? window : this, function( window, noGlobal ) { + +// Edge <= 12 - 13+, Firefox <=18 - 45+, IE 10 - 11, Safari 5.1 - 9+, iOS 6 - 9.1 +// throw exceptions when non-strict code (e.g., ASP.NET 4.5) accesses strict mode +// arguments.callee.caller (trac-13335). But as of jQuery 3.0 (2016), strict mode should be common +// enough that all such attempts are guarded in a try block. +"use strict"; + +var arr = []; + +var document = window.document; + +var getProto = Object.getPrototypeOf; + +var slice = arr.slice; + +var concat = arr.concat; + +var push = arr.push; + +var indexOf = arr.indexOf; + +var class2type = {}; + +var toString = class2type.toString; + +var hasOwn = class2type.hasOwnProperty; + +var fnToString = hasOwn.toString; + +var ObjectFunctionString = fnToString.call( Object ); + +var support = {}; + + + + function DOMEval( code, doc ) { + doc = doc || document; + + var script = doc.createElement( "script" ); + + script.text = code; + doc.head.appendChild( script ).parentNode.removeChild( script ); + } +/* global Symbol */ +// Defining this global in .eslintrc.json would create a danger of using the global +// unguarded in another place, it seems safer to define global only for this module + + + +var + version = "3.2.1", + + // Define a local copy of jQuery + jQuery = function( selector, context ) { + + // The jQuery object is actually just the init constructor 'enhanced' + // Need init if jQuery is called (just allow error to be thrown if not included) + return new jQuery.fn.init( selector, context ); + }, + + // Support: Android <=4.0 only + // Make sure we trim BOM and NBSP + rtrim = /^[\s\uFEFF\xA0]+|[\s\uFEFF\xA0]+$/g, + + // Matches dashed string for camelizing + rmsPrefix = /^-ms-/, + rdashAlpha = /-([a-z])/g, + + // Used by jQuery.camelCase as callback to replace() + fcamelCase = function( all, letter ) { + return letter.toUpperCase(); + }; + +jQuery.fn = jQuery.prototype = { + + // The current version of jQuery being used + jquery: version, + + constructor: jQuery, + + // The default length of a jQuery object is 0 + length: 0, + + toArray: function() { + return slice.call( this ); + }, + + // Get the Nth element in the matched element set OR + // Get the whole matched element set as a clean array + get: function( num ) { + + // Return all the elements in a clean array + if ( num == null ) { + return slice.call( this ); + } + + // Return just the one element from the set + return num < 0 ? this[ num + this.length ] : this[ num ]; + }, + + // Take an array of elements and push it onto the stack + // (returning the new matched element set) + pushStack: function( elems ) { + + // Build a new jQuery matched element set + var ret = jQuery.merge( this.constructor(), elems ); + + // Add the old object onto the stack (as a reference) + ret.prevObject = this; + + // Return the newly-formed element set + return ret; + }, + + // Execute a callback for every element in the matched set. + each: function( callback ) { + return jQuery.each( this, callback ); + }, + + map: function( callback ) { + return this.pushStack( jQuery.map( this, function( elem, i ) { + return callback.call( elem, i, elem ); + } ) ); + }, + + slice: function() { + return this.pushStack( slice.apply( this, arguments ) ); + }, + + first: function() { + return this.eq( 0 ); + }, + + last: function() { + return this.eq( -1 ); + }, + + eq: function( i ) { + var len = this.length, + j = +i + ( i < 0 ? len : 0 ); + return this.pushStack( j >= 0 && j < len ? [ this[ j ] ] : [] ); + }, + + end: function() { + return this.prevObject || this.constructor(); + }, + + // For internal use only. + // Behaves like an Array's method, not like a jQuery method. + push: push, + sort: arr.sort, + splice: arr.splice +}; + +jQuery.extend = jQuery.fn.extend = function() { + var options, name, src, copy, copyIsArray, clone, + target = arguments[ 0 ] || {}, + i = 1, + length = arguments.length, + deep = false; + + // Handle a deep copy situation + if ( typeof target === "boolean" ) { + deep = target; + + // Skip the boolean and the target + target = arguments[ i ] || {}; + i++; + } + + // Handle case when target is a string or something (possible in deep copy) + if ( typeof target !== "object" && !jQuery.isFunction( target ) ) { + target = {}; + } + + // Extend jQuery itself if only one argument is passed + if ( i === length ) { + target = this; + i--; + } + + for ( ; i < length; i++ ) { + + // Only deal with non-null/undefined values + if ( ( options = arguments[ i ] ) != null ) { + + // Extend the base object + for ( name in options ) { + src = target[ name ]; + copy = options[ name ]; + + // Prevent never-ending loop + if ( target === copy ) { + continue; + } + + // Recurse if we're merging plain objects or arrays + if ( deep && copy && ( jQuery.isPlainObject( copy ) || + ( copyIsArray = Array.isArray( copy ) ) ) ) { + + if ( copyIsArray ) { + copyIsArray = false; + clone = src && Array.isArray( src ) ? src : []; + + } else { + clone = src && jQuery.isPlainObject( src ) ? src : {}; + } + + // Never move original objects, clone them + target[ name ] = jQuery.extend( deep, clone, copy ); + + // Don't bring in undefined values + } else if ( copy !== undefined ) { + target[ name ] = copy; + } + } + } + } + + // Return the modified object + return target; +}; + +jQuery.extend( { + + // Unique for each copy of jQuery on the page + expando: "jQuery" + ( version + Math.random() ).replace( /\D/g, "" ), + + // Assume jQuery is ready without the ready module + isReady: true, + + error: function( msg ) { + throw new Error( msg ); + }, + + noop: function() {}, + + isFunction: function( obj ) { + return jQuery.type( obj ) === "function"; + }, + + isWindow: function( obj ) { + return obj != null && obj === obj.window; + }, + + isNumeric: function( obj ) { + + // As of jQuery 3.0, isNumeric is limited to + // strings and numbers (primitives or objects) + // that can be coerced to finite numbers (gh-2662) + var type = jQuery.type( obj ); + return ( type === "number" || type === "string" ) && + + // parseFloat NaNs numeric-cast false positives ("") + // ...but misinterprets leading-number strings, particularly hex literals ("0x...") + // subtraction forces infinities to NaN + !isNaN( obj - parseFloat( obj ) ); + }, + + isPlainObject: function( obj ) { + var proto, Ctor; + + // Detect obvious negatives + // Use toString instead of jQuery.type to catch host objects + if ( !obj || toString.call( obj ) !== "[object Object]" ) { + return false; + } + + proto = getProto( obj ); + + // Objects with no prototype (e.g., `Object.create( null )`) are plain + if ( !proto ) { + return true; + } + + // Objects with prototype are plain iff they were constructed by a global Object function + Ctor = hasOwn.call( proto, "constructor" ) && proto.constructor; + return typeof Ctor === "function" && fnToString.call( Ctor ) === ObjectFunctionString; + }, + + isEmptyObject: function( obj ) { + + /* eslint-disable no-unused-vars */ + // See https://github.com/eslint/eslint/issues/6125 + var name; + + for ( name in obj ) { + return false; + } + return true; + }, + + type: function( obj ) { + if ( obj == null ) { + return obj + ""; + } + + // Support: Android <=2.3 only (functionish RegExp) + return typeof obj === "object" || typeof obj === "function" ? + class2type[ toString.call( obj ) ] || "object" : + typeof obj; + }, + + // Evaluates a script in a global context + globalEval: function( code ) { + DOMEval( code ); + }, + + // Convert dashed to camelCase; used by the css and data modules + // Support: IE <=9 - 11, Edge 12 - 13 + // Microsoft forgot to hump their vendor prefix (#9572) + camelCase: function( string ) { + return string.replace( rmsPrefix, "ms-" ).replace( rdashAlpha, fcamelCase ); + }, + + each: function( obj, callback ) { + var length, i = 0; + + if ( isArrayLike( obj ) ) { + length = obj.length; + for ( ; i < length; i++ ) { + if ( callback.call( obj[ i ], i, obj[ i ] ) === false ) { + break; + } + } + } else { + for ( i in obj ) { + if ( callback.call( obj[ i ], i, obj[ i ] ) === false ) { + break; + } + } + } + + return obj; + }, + + // Support: Android <=4.0 only + trim: function( text ) { + return text == null ? + "" : + ( text + "" ).replace( rtrim, "" ); + }, + + // results is for internal usage only + makeArray: function( arr, results ) { + var ret = results || []; + + if ( arr != null ) { + if ( isArrayLike( Object( arr ) ) ) { + jQuery.merge( ret, + typeof arr === "string" ? + [ arr ] : arr + ); + } else { + push.call( ret, arr ); + } + } + + return ret; + }, + + inArray: function( elem, arr, i ) { + return arr == null ? -1 : indexOf.call( arr, elem, i ); + }, + + // Support: Android <=4.0 only, PhantomJS 1 only + // push.apply(_, arraylike) throws on ancient WebKit + merge: function( first, second ) { + var len = +second.length, + j = 0, + i = first.length; + + for ( ; j < len; j++ ) { + first[ i++ ] = second[ j ]; + } + + first.length = i; + + return first; + }, + + grep: function( elems, callback, invert ) { + var callbackInverse, + matches = [], + i = 0, + length = elems.length, + callbackExpect = !invert; + + // Go through the array, only saving the items + // that pass the validator function + for ( ; i < length; i++ ) { + callbackInverse = !callback( elems[ i ], i ); + if ( callbackInverse !== callbackExpect ) { + matches.push( elems[ i ] ); + } + } + + return matches; + }, + + // arg is for internal usage only + map: function( elems, callback, arg ) { + var length, value, + i = 0, + ret = []; + + // Go through the array, translating each of the items to their new values + if ( isArrayLike( elems ) ) { + length = elems.length; + for ( ; i < length; i++ ) { + value = callback( elems[ i ], i, arg ); + + if ( value != null ) { + ret.push( value ); + } + } + + // Go through every key on the object, + } else { + for ( i in elems ) { + value = callback( elems[ i ], i, arg ); + + if ( value != null ) { + ret.push( value ); + } + } + } + + // Flatten any nested arrays + return concat.apply( [], ret ); + }, + + // A global GUID counter for objects + guid: 1, + + // Bind a function to a context, optionally partially applying any + // arguments. + proxy: function( fn, context ) { + var tmp, args, proxy; + + if ( typeof context === "string" ) { + tmp = fn[ context ]; + context = fn; + fn = tmp; + } + + // Quick check to determine if target is callable, in the spec + // this throws a TypeError, but we will just return undefined. + if ( !jQuery.isFunction( fn ) ) { + return undefined; + } + + // Simulated bind + args = slice.call( arguments, 2 ); + proxy = function() { + return fn.apply( context || this, args.concat( slice.call( arguments ) ) ); + }; + + // Set the guid of unique handler to the same of original handler, so it can be removed + proxy.guid = fn.guid = fn.guid || jQuery.guid++; + + return proxy; + }, + + now: Date.now, + + // jQuery.support is not used in Core but other projects attach their + // properties to it so it needs to exist. + support: support +} ); + +if ( typeof Symbol === "function" ) { + jQuery.fn[ Symbol.iterator ] = arr[ Symbol.iterator ]; +} + +// Populate the class2type map +jQuery.each( "Boolean Number String Function Array Date RegExp Object Error Symbol".split( " " ), +function( i, name ) { + class2type[ "[object " + name + "]" ] = name.toLowerCase(); +} ); + +function isArrayLike( obj ) { + + // Support: real iOS 8.2 only (not reproducible in simulator) + // `in` check used to prevent JIT error (gh-2145) + // hasOwn isn't used here due to false negatives + // regarding Nodelist length in IE + var length = !!obj && "length" in obj && obj.length, + type = jQuery.type( obj ); + + if ( type === "function" || jQuery.isWindow( obj ) ) { + return false; + } + + return type === "array" || length === 0 || + typeof length === "number" && length > 0 && ( length - 1 ) in obj; +} +var Sizzle = +/*! + * Sizzle CSS Selector Engine v2.3.3 + * https://sizzlejs.com/ + * + * Copyright jQuery Foundation and other contributors + * Released under the MIT license + * http://jquery.org/license + * + * Date: 2016-08-08 + */ +(function( window ) { + +var i, + support, + Expr, + getText, + isXML, + tokenize, + compile, + select, + outermostContext, + sortInput, + hasDuplicate, + + // Local document vars + setDocument, + document, + docElem, + documentIsHTML, + rbuggyQSA, + rbuggyMatches, + matches, + contains, + + // Instance-specific data + expando = "sizzle" + 1 * new Date(), + preferredDoc = window.document, + dirruns = 0, + done = 0, + classCache = createCache(), + tokenCache = createCache(), + compilerCache = createCache(), + sortOrder = function( a, b ) { + if ( a === b ) { + hasDuplicate = true; + } + return 0; + }, + + // Instance methods + hasOwn = ({}).hasOwnProperty, + arr = [], + pop = arr.pop, + push_native = arr.push, + push = arr.push, + slice = arr.slice, + // Use a stripped-down indexOf as it's faster than native + // https://jsperf.com/thor-indexof-vs-for/5 + indexOf = function( list, elem ) { + var i = 0, + len = list.length; + for ( ; i < len; i++ ) { + if ( list[i] === elem ) { + return i; + } + } + return -1; + }, + + booleans = "checked|selected|async|autofocus|autoplay|controls|defer|disabled|hidden|ismap|loop|multiple|open|readonly|required|scoped", + + // Regular expressions + + // http://www.w3.org/TR/css3-selectors/#whitespace + whitespace = "[\\x20\\t\\r\\n\\f]", + + // http://www.w3.org/TR/CSS21/syndata.html#value-def-identifier + identifier = "(?:\\\\.|[\\w-]|[^\0-\\xa0])+", + + // Attribute selectors: http://www.w3.org/TR/selectors/#attribute-selectors + attributes = "\\[" + whitespace + "*(" + identifier + ")(?:" + whitespace + + // Operator (capture 2) + "*([*^$|!~]?=)" + whitespace + + // "Attribute values must be CSS identifiers [capture 5] or strings [capture 3 or capture 4]" + "*(?:'((?:\\\\.|[^\\\\'])*)'|\"((?:\\\\.|[^\\\\\"])*)\"|(" + identifier + "))|)" + whitespace + + "*\\]", + + pseudos = ":(" + identifier + ")(?:\\((" + + // To reduce the number of selectors needing tokenize in the preFilter, prefer arguments: + // 1. quoted (capture 3; capture 4 or capture 5) + "('((?:\\\\.|[^\\\\'])*)'|\"((?:\\\\.|[^\\\\\"])*)\")|" + + // 2. simple (capture 6) + "((?:\\\\.|[^\\\\()[\\]]|" + attributes + ")*)|" + + // 3. anything else (capture 2) + ".*" + + ")\\)|)", + + // Leading and non-escaped trailing whitespace, capturing some non-whitespace characters preceding the latter + rwhitespace = new RegExp( whitespace + "+", "g" ), + rtrim = new RegExp( "^" + whitespace + "+|((?:^|[^\\\\])(?:\\\\.)*)" + whitespace + "+$", "g" ), + + rcomma = new RegExp( "^" + whitespace + "*," + whitespace + "*" ), + rcombinators = new RegExp( "^" + whitespace + "*([>+~]|" + whitespace + ")" + whitespace + "*" ), + + rattributeQuotes = new RegExp( "=" + whitespace + "*([^\\]'\"]*?)" + whitespace + "*\\]", "g" ), + + rpseudo = new RegExp( pseudos ), + ridentifier = new RegExp( "^" + identifier + "$" ), + + matchExpr = { + "ID": new RegExp( "^#(" + identifier + ")" ), + "CLASS": new RegExp( "^\\.(" + identifier + ")" ), + "TAG": new RegExp( "^(" + identifier + "|[*])" ), + "ATTR": new RegExp( "^" + attributes ), + "PSEUDO": new RegExp( "^" + pseudos ), + "CHILD": new RegExp( "^:(only|first|last|nth|nth-last)-(child|of-type)(?:\\(" + whitespace + + "*(even|odd|(([+-]|)(\\d*)n|)" + whitespace + "*(?:([+-]|)" + whitespace + + "*(\\d+)|))" + whitespace + "*\\)|)", "i" ), + "bool": new RegExp( "^(?:" + booleans + ")$", "i" ), + // For use in libraries implementing .is() + // We use this for POS matching in `select` + "needsContext": new RegExp( "^" + whitespace + "*[>+~]|:(even|odd|eq|gt|lt|nth|first|last)(?:\\(" + + whitespace + "*((?:-\\d)?\\d*)" + whitespace + "*\\)|)(?=[^-]|$)", "i" ) + }, + + rinputs = /^(?:input|select|textarea|button)$/i, + rheader = /^h\d$/i, + + rnative = /^[^{]+\{\s*\[native \w/, + + // Easily-parseable/retrievable ID or TAG or CLASS selectors + rquickExpr = /^(?:#([\w-]+)|(\w+)|\.([\w-]+))$/, + + rsibling = /[+~]/, + + // CSS escapes + // http://www.w3.org/TR/CSS21/syndata.html#escaped-characters + runescape = new RegExp( "\\\\([\\da-f]{1,6}" + whitespace + "?|(" + whitespace + ")|.)", "ig" ), + funescape = function( _, escaped, escapedWhitespace ) { + var high = "0x" + escaped - 0x10000; + // NaN means non-codepoint + // Support: Firefox<24 + // Workaround erroneous numeric interpretation of +"0x" + return high !== high || escapedWhitespace ? + escaped : + high < 0 ? + // BMP codepoint + String.fromCharCode( high + 0x10000 ) : + // Supplemental Plane codepoint (surrogate pair) + String.fromCharCode( high >> 10 | 0xD800, high & 0x3FF | 0xDC00 ); + }, + + // CSS string/identifier serialization + // https://drafts.csswg.org/cssom/#common-serializing-idioms + rcssescape = /([\0-\x1f\x7f]|^-?\d)|^-$|[^\0-\x1f\x7f-\uFFFF\w-]/g, + fcssescape = function( ch, asCodePoint ) { + if ( asCodePoint ) { + + // U+0000 NULL becomes U+FFFD REPLACEMENT CHARACTER + if ( ch === "\0" ) { + return "\uFFFD"; + } + + // Control characters and (dependent upon position) numbers get escaped as code points + return ch.slice( 0, -1 ) + "\\" + ch.charCodeAt( ch.length - 1 ).toString( 16 ) + " "; + } + + // Other potentially-special ASCII characters get backslash-escaped + return "\\" + ch; + }, + + // Used for iframes + // See setDocument() + // Removing the function wrapper causes a "Permission Denied" + // error in IE + unloadHandler = function() { + setDocument(); + }, + + disabledAncestor = addCombinator( + function( elem ) { + return elem.disabled === true && ("form" in elem || "label" in elem); + }, + { dir: "parentNode", next: "legend" } + ); + +// Optimize for push.apply( _, NodeList ) +try { + push.apply( + (arr = slice.call( preferredDoc.childNodes )), + preferredDoc.childNodes + ); + // Support: Android<4.0 + // Detect silently failing push.apply + arr[ preferredDoc.childNodes.length ].nodeType; +} catch ( e ) { + push = { apply: arr.length ? + + // Leverage slice if possible + function( target, els ) { + push_native.apply( target, slice.call(els) ); + } : + + // Support: IE<9 + // Otherwise append directly + function( target, els ) { + var j = target.length, + i = 0; + // Can't trust NodeList.length + while ( (target[j++] = els[i++]) ) {} + target.length = j - 1; + } + }; +} + +function Sizzle( selector, context, results, seed ) { + var m, i, elem, nid, match, groups, newSelector, + newContext = context && context.ownerDocument, + + // nodeType defaults to 9, since context defaults to document + nodeType = context ? context.nodeType : 9; + + results = results || []; + + // Return early from calls with invalid selector or context + if ( typeof selector !== "string" || !selector || + nodeType !== 1 && nodeType !== 9 && nodeType !== 11 ) { + + return results; + } + + // Try to shortcut find operations (as opposed to filters) in HTML documents + if ( !seed ) { + + if ( ( context ? context.ownerDocument || context : preferredDoc ) !== document ) { + setDocument( context ); + } + context = context || document; + + if ( documentIsHTML ) { + + // If the selector is sufficiently simple, try using a "get*By*" DOM method + // (excepting DocumentFragment context, where the methods don't exist) + if ( nodeType !== 11 && (match = rquickExpr.exec( selector )) ) { + + // ID selector + if ( (m = match[1]) ) { + + // Document context + if ( nodeType === 9 ) { + if ( (elem = context.getElementById( m )) ) { + + // Support: IE, Opera, Webkit + // TODO: identify versions + // getElementById can match elements by name instead of ID + if ( elem.id === m ) { + results.push( elem ); + return results; + } + } else { + return results; + } + + // Element context + } else { + + // Support: IE, Opera, Webkit + // TODO: identify versions + // getElementById can match elements by name instead of ID + if ( newContext && (elem = newContext.getElementById( m )) && + contains( context, elem ) && + elem.id === m ) { + + results.push( elem ); + return results; + } + } + + // Type selector + } else if ( match[2] ) { + push.apply( results, context.getElementsByTagName( selector ) ); + return results; + + // Class selector + } else if ( (m = match[3]) && support.getElementsByClassName && + context.getElementsByClassName ) { + + push.apply( results, context.getElementsByClassName( m ) ); + return results; + } + } + + // Take advantage of querySelectorAll + if ( support.qsa && + !compilerCache[ selector + " " ] && + (!rbuggyQSA || !rbuggyQSA.test( selector )) ) { + + if ( nodeType !== 1 ) { + newContext = context; + newSelector = selector; + + // qSA looks outside Element context, which is not what we want + // Thanks to Andrew Dupont for this workaround technique + // Support: IE <=8 + // Exclude object elements + } else if ( context.nodeName.toLowerCase() !== "object" ) { + + // Capture the context ID, setting it first if necessary + if ( (nid = context.getAttribute( "id" )) ) { + nid = nid.replace( rcssescape, fcssescape ); + } else { + context.setAttribute( "id", (nid = expando) ); + } + + // Prefix every selector in the list + groups = tokenize( selector ); + i = groups.length; + while ( i-- ) { + groups[i] = "#" + nid + " " + toSelector( groups[i] ); + } + newSelector = groups.join( "," ); + + // Expand context for sibling selectors + newContext = rsibling.test( selector ) && testContext( context.parentNode ) || + context; + } + + if ( newSelector ) { + try { + push.apply( results, + newContext.querySelectorAll( newSelector ) + ); + return results; + } catch ( qsaError ) { + } finally { + if ( nid === expando ) { + context.removeAttribute( "id" ); + } + } + } + } + } + } + + // All others + return select( selector.replace( rtrim, "$1" ), context, results, seed ); +} + +/** + * Create key-value caches of limited size + * @returns {function(string, object)} Returns the Object data after storing it on itself with + * property name the (space-suffixed) string and (if the cache is larger than Expr.cacheLength) + * deleting the oldest entry + */ +function createCache() { + var keys = []; + + function cache( key, value ) { + // Use (key + " ") to avoid collision with native prototype properties (see Issue #157) + if ( keys.push( key + " " ) > Expr.cacheLength ) { + // Only keep the most recent entries + delete cache[ keys.shift() ]; + } + return (cache[ key + " " ] = value); + } + return cache; +} + +/** + * Mark a function for special use by Sizzle + * @param {Function} fn The function to mark + */ +function markFunction( fn ) { + fn[ expando ] = true; + return fn; +} + +/** + * Support testing using an element + * @param {Function} fn Passed the created element and returns a boolean result + */ +function assert( fn ) { + var el = document.createElement("fieldset"); + + try { + return !!fn( el ); + } catch (e) { + return false; + } finally { + // Remove from its parent by default + if ( el.parentNode ) { + el.parentNode.removeChild( el ); + } + // release memory in IE + el = null; + } +} + +/** + * Adds the same handler for all of the specified attrs + * @param {String} attrs Pipe-separated list of attributes + * @param {Function} handler The method that will be applied + */ +function addHandle( attrs, handler ) { + var arr = attrs.split("|"), + i = arr.length; + + while ( i-- ) { + Expr.attrHandle[ arr[i] ] = handler; + } +} + +/** + * Checks document order of two siblings + * @param {Element} a + * @param {Element} b + * @returns {Number} Returns less than 0 if a precedes b, greater than 0 if a follows b + */ +function siblingCheck( a, b ) { + var cur = b && a, + diff = cur && a.nodeType === 1 && b.nodeType === 1 && + a.sourceIndex - b.sourceIndex; + + // Use IE sourceIndex if available on both nodes + if ( diff ) { + return diff; + } + + // Check if b follows a + if ( cur ) { + while ( (cur = cur.nextSibling) ) { + if ( cur === b ) { + return -1; + } + } + } + + return a ? 1 : -1; +} + +/** + * Returns a function to use in pseudos for input types + * @param {String} type + */ +function createInputPseudo( type ) { + return function( elem ) { + var name = elem.nodeName.toLowerCase(); + return name === "input" && elem.type === type; + }; +} + +/** + * Returns a function to use in pseudos for buttons + * @param {String} type + */ +function createButtonPseudo( type ) { + return function( elem ) { + var name = elem.nodeName.toLowerCase(); + return (name === "input" || name === "button") && elem.type === type; + }; +} + +/** + * Returns a function to use in pseudos for :enabled/:disabled + * @param {Boolean} disabled true for :disabled; false for :enabled + */ +function createDisabledPseudo( disabled ) { + + // Known :disabled false positives: fieldset[disabled] > legend:nth-of-type(n+2) :can-disable + return function( elem ) { + + // Only certain elements can match :enabled or :disabled + // https://html.spec.whatwg.org/multipage/scripting.html#selector-enabled + // https://html.spec.whatwg.org/multipage/scripting.html#selector-disabled + if ( "form" in elem ) { + + // Check for inherited disabledness on relevant non-disabled elements: + // * listed form-associated elements in a disabled fieldset + // https://html.spec.whatwg.org/multipage/forms.html#category-listed + // https://html.spec.whatwg.org/multipage/forms.html#concept-fe-disabled + // * option elements in a disabled optgroup + // https://html.spec.whatwg.org/multipage/forms.html#concept-option-disabled + // All such elements have a "form" property. + if ( elem.parentNode && elem.disabled === false ) { + + // Option elements defer to a parent optgroup if present + if ( "label" in elem ) { + if ( "label" in elem.parentNode ) { + return elem.parentNode.disabled === disabled; + } else { + return elem.disabled === disabled; + } + } + + // Support: IE 6 - 11 + // Use the isDisabled shortcut property to check for disabled fieldset ancestors + return elem.isDisabled === disabled || + + // Where there is no isDisabled, check manually + /* jshint -W018 */ + elem.isDisabled !== !disabled && + disabledAncestor( elem ) === disabled; + } + + return elem.disabled === disabled; + + // Try to winnow out elements that can't be disabled before trusting the disabled property. + // Some victims get caught in our net (label, legend, menu, track), but it shouldn't + // even exist on them, let alone have a boolean value. + } else if ( "label" in elem ) { + return elem.disabled === disabled; + } + + // Remaining elements are neither :enabled nor :disabled + return false; + }; +} + +/** + * Returns a function to use in pseudos for positionals + * @param {Function} fn + */ +function createPositionalPseudo( fn ) { + return markFunction(function( argument ) { + argument = +argument; + return markFunction(function( seed, matches ) { + var j, + matchIndexes = fn( [], seed.length, argument ), + i = matchIndexes.length; + + // Match elements found at the specified indexes + while ( i-- ) { + if ( seed[ (j = matchIndexes[i]) ] ) { + seed[j] = !(matches[j] = seed[j]); + } + } + }); + }); +} + +/** + * Checks a node for validity as a Sizzle context + * @param {Element|Object=} context + * @returns {Element|Object|Boolean} The input node if acceptable, otherwise a falsy value + */ +function testContext( context ) { + return context && typeof context.getElementsByTagName !== "undefined" && context; +} + +// Expose support vars for convenience +support = Sizzle.support = {}; + +/** + * Detects XML nodes + * @param {Element|Object} elem An element or a document + * @returns {Boolean} True iff elem is a non-HTML XML node + */ +isXML = Sizzle.isXML = function( elem ) { + // documentElement is verified for cases where it doesn't yet exist + // (such as loading iframes in IE - #4833) + var documentElement = elem && (elem.ownerDocument || elem).documentElement; + return documentElement ? documentElement.nodeName !== "HTML" : false; +}; + +/** + * Sets document-related variables once based on the current document + * @param {Element|Object} [doc] An element or document object to use to set the document + * @returns {Object} Returns the current document + */ +setDocument = Sizzle.setDocument = function( node ) { + var hasCompare, subWindow, + doc = node ? node.ownerDocument || node : preferredDoc; + + // Return early if doc is invalid or already selected + if ( doc === document || doc.nodeType !== 9 || !doc.documentElement ) { + return document; + } + + // Update global variables + document = doc; + docElem = document.documentElement; + documentIsHTML = !isXML( document ); + + // Support: IE 9-11, Edge + // Accessing iframe documents after unload throws "permission denied" errors (jQuery #13936) + if ( preferredDoc !== document && + (subWindow = document.defaultView) && subWindow.top !== subWindow ) { + + // Support: IE 11, Edge + if ( subWindow.addEventListener ) { + subWindow.addEventListener( "unload", unloadHandler, false ); + + // Support: IE 9 - 10 only + } else if ( subWindow.attachEvent ) { + subWindow.attachEvent( "onunload", unloadHandler ); + } + } + + /* Attributes + ---------------------------------------------------------------------- */ + + // Support: IE<8 + // Verify that getAttribute really returns attributes and not properties + // (excepting IE8 booleans) + support.attributes = assert(function( el ) { + el.className = "i"; + return !el.getAttribute("className"); + }); + + /* getElement(s)By* + ---------------------------------------------------------------------- */ + + // Check if getElementsByTagName("*") returns only elements + support.getElementsByTagName = assert(function( el ) { + el.appendChild( document.createComment("") ); + return !el.getElementsByTagName("*").length; + }); + + // Support: IE<9 + support.getElementsByClassName = rnative.test( document.getElementsByClassName ); + + // Support: IE<10 + // Check if getElementById returns elements by name + // The broken getElementById methods don't pick up programmatically-set names, + // so use a roundabout getElementsByName test + support.getById = assert(function( el ) { + docElem.appendChild( el ).id = expando; + return !document.getElementsByName || !document.getElementsByName( expando ).length; + }); + + // ID filter and find + if ( support.getById ) { + Expr.filter["ID"] = function( id ) { + var attrId = id.replace( runescape, funescape ); + return function( elem ) { + return elem.getAttribute("id") === attrId; + }; + }; + Expr.find["ID"] = function( id, context ) { + if ( typeof context.getElementById !== "undefined" && documentIsHTML ) { + var elem = context.getElementById( id ); + return elem ? [ elem ] : []; + } + }; + } else { + Expr.filter["ID"] = function( id ) { + var attrId = id.replace( runescape, funescape ); + return function( elem ) { + var node = typeof elem.getAttributeNode !== "undefined" && + elem.getAttributeNode("id"); + return node && node.value === attrId; + }; + }; + + // Support: IE 6 - 7 only + // getElementById is not reliable as a find shortcut + Expr.find["ID"] = function( id, context ) { + if ( typeof context.getElementById !== "undefined" && documentIsHTML ) { + var node, i, elems, + elem = context.getElementById( id ); + + if ( elem ) { + + // Verify the id attribute + node = elem.getAttributeNode("id"); + if ( node && node.value === id ) { + return [ elem ]; + } + + // Fall back on getElementsByName + elems = context.getElementsByName( id ); + i = 0; + while ( (elem = elems[i++]) ) { + node = elem.getAttributeNode("id"); + if ( node && node.value === id ) { + return [ elem ]; + } + } + } + + return []; + } + }; + } + + // Tag + Expr.find["TAG"] = support.getElementsByTagName ? + function( tag, context ) { + if ( typeof context.getElementsByTagName !== "undefined" ) { + return context.getElementsByTagName( tag ); + + // DocumentFragment nodes don't have gEBTN + } else if ( support.qsa ) { + return context.querySelectorAll( tag ); + } + } : + + function( tag, context ) { + var elem, + tmp = [], + i = 0, + // By happy coincidence, a (broken) gEBTN appears on DocumentFragment nodes too + results = context.getElementsByTagName( tag ); + + // Filter out possible comments + if ( tag === "*" ) { + while ( (elem = results[i++]) ) { + if ( elem.nodeType === 1 ) { + tmp.push( elem ); + } + } + + return tmp; + } + return results; + }; + + // Class + Expr.find["CLASS"] = support.getElementsByClassName && function( className, context ) { + if ( typeof context.getElementsByClassName !== "undefined" && documentIsHTML ) { + return context.getElementsByClassName( className ); + } + }; + + /* QSA/matchesSelector + ---------------------------------------------------------------------- */ + + // QSA and matchesSelector support + + // matchesSelector(:active) reports false when true (IE9/Opera 11.5) + rbuggyMatches = []; + + // qSa(:focus) reports false when true (Chrome 21) + // We allow this because of a bug in IE8/9 that throws an error + // whenever `document.activeElement` is accessed on an iframe + // So, we allow :focus to pass through QSA all the time to avoid the IE error + // See https://bugs.jquery.com/ticket/13378 + rbuggyQSA = []; + + if ( (support.qsa = rnative.test( document.querySelectorAll )) ) { + // Build QSA regex + // Regex strategy adopted from Diego Perini + assert(function( el ) { + // Select is set to empty string on purpose + // This is to test IE's treatment of not explicitly + // setting a boolean content attribute, + // since its presence should be enough + // https://bugs.jquery.com/ticket/12359 + docElem.appendChild( el ).innerHTML = "" + + ""; + + // Support: IE8, Opera 11-12.16 + // Nothing should be selected when empty strings follow ^= or $= or *= + // The test attribute must be unknown in Opera but "safe" for WinRT + // https://msdn.microsoft.com/en-us/library/ie/hh465388.aspx#attribute_section + if ( el.querySelectorAll("[msallowcapture^='']").length ) { + rbuggyQSA.push( "[*^$]=" + whitespace + "*(?:''|\"\")" ); + } + + // Support: IE8 + // Boolean attributes and "value" are not treated correctly + if ( !el.querySelectorAll("[selected]").length ) { + rbuggyQSA.push( "\\[" + whitespace + "*(?:value|" + booleans + ")" ); + } + + // Support: Chrome<29, Android<4.4, Safari<7.0+, iOS<7.0+, PhantomJS<1.9.8+ + if ( !el.querySelectorAll( "[id~=" + expando + "-]" ).length ) { + rbuggyQSA.push("~="); + } + + // Webkit/Opera - :checked should return selected option elements + // http://www.w3.org/TR/2011/REC-css3-selectors-20110929/#checked + // IE8 throws error here and will not see later tests + if ( !el.querySelectorAll(":checked").length ) { + rbuggyQSA.push(":checked"); + } + + // Support: Safari 8+, iOS 8+ + // https://bugs.webkit.org/show_bug.cgi?id=136851 + // In-page `selector#id sibling-combinator selector` fails + if ( !el.querySelectorAll( "a#" + expando + "+*" ).length ) { + rbuggyQSA.push(".#.+[+~]"); + } + }); + + assert(function( el ) { + el.innerHTML = "" + + ""; + + // Support: Windows 8 Native Apps + // The type and name attributes are restricted during .innerHTML assignment + var input = document.createElement("input"); + input.setAttribute( "type", "hidden" ); + el.appendChild( input ).setAttribute( "name", "D" ); + + // Support: IE8 + // Enforce case-sensitivity of name attribute + if ( el.querySelectorAll("[name=d]").length ) { + rbuggyQSA.push( "name" + whitespace + "*[*^$|!~]?=" ); + } + + // FF 3.5 - :enabled/:disabled and hidden elements (hidden elements are still enabled) + // IE8 throws error here and will not see later tests + if ( el.querySelectorAll(":enabled").length !== 2 ) { + rbuggyQSA.push( ":enabled", ":disabled" ); + } + + // Support: IE9-11+ + // IE's :disabled selector does not pick up the children of disabled fieldsets + docElem.appendChild( el ).disabled = true; + if ( el.querySelectorAll(":disabled").length !== 2 ) { + rbuggyQSA.push( ":enabled", ":disabled" ); + } + + // Opera 10-11 does not throw on post-comma invalid pseudos + el.querySelectorAll("*,:x"); + rbuggyQSA.push(",.*:"); + }); + } + + if ( (support.matchesSelector = rnative.test( (matches = docElem.matches || + docElem.webkitMatchesSelector || + docElem.mozMatchesSelector || + docElem.oMatchesSelector || + docElem.msMatchesSelector) )) ) { + + assert(function( el ) { + // Check to see if it's possible to do matchesSelector + // on a disconnected node (IE 9) + support.disconnectedMatch = matches.call( el, "*" ); + + // This should fail with an exception + // Gecko does not error, returns false instead + matches.call( el, "[s!='']:x" ); + rbuggyMatches.push( "!=", pseudos ); + }); + } + + rbuggyQSA = rbuggyQSA.length && new RegExp( rbuggyQSA.join("|") ); + rbuggyMatches = rbuggyMatches.length && new RegExp( rbuggyMatches.join("|") ); + + /* Contains + ---------------------------------------------------------------------- */ + hasCompare = rnative.test( docElem.compareDocumentPosition ); + + // Element contains another + // Purposefully self-exclusive + // As in, an element does not contain itself + contains = hasCompare || rnative.test( docElem.contains ) ? + function( a, b ) { + var adown = a.nodeType === 9 ? a.documentElement : a, + bup = b && b.parentNode; + return a === bup || !!( bup && bup.nodeType === 1 && ( + adown.contains ? + adown.contains( bup ) : + a.compareDocumentPosition && a.compareDocumentPosition( bup ) & 16 + )); + } : + function( a, b ) { + if ( b ) { + while ( (b = b.parentNode) ) { + if ( b === a ) { + return true; + } + } + } + return false; + }; + + /* Sorting + ---------------------------------------------------------------------- */ + + // Document order sorting + sortOrder = hasCompare ? + function( a, b ) { + + // Flag for duplicate removal + if ( a === b ) { + hasDuplicate = true; + return 0; + } + + // Sort on method existence if only one input has compareDocumentPosition + var compare = !a.compareDocumentPosition - !b.compareDocumentPosition; + if ( compare ) { + return compare; + } + + // Calculate position if both inputs belong to the same document + compare = ( a.ownerDocument || a ) === ( b.ownerDocument || b ) ? + a.compareDocumentPosition( b ) : + + // Otherwise we know they are disconnected + 1; + + // Disconnected nodes + if ( compare & 1 || + (!support.sortDetached && b.compareDocumentPosition( a ) === compare) ) { + + // Choose the first element that is related to our preferred document + if ( a === document || a.ownerDocument === preferredDoc && contains(preferredDoc, a) ) { + return -1; + } + if ( b === document || b.ownerDocument === preferredDoc && contains(preferredDoc, b) ) { + return 1; + } + + // Maintain original order + return sortInput ? + ( indexOf( sortInput, a ) - indexOf( sortInput, b ) ) : + 0; + } + + return compare & 4 ? -1 : 1; + } : + function( a, b ) { + // Exit early if the nodes are identical + if ( a === b ) { + hasDuplicate = true; + return 0; + } + + var cur, + i = 0, + aup = a.parentNode, + bup = b.parentNode, + ap = [ a ], + bp = [ b ]; + + // Parentless nodes are either documents or disconnected + if ( !aup || !bup ) { + return a === document ? -1 : + b === document ? 1 : + aup ? -1 : + bup ? 1 : + sortInput ? + ( indexOf( sortInput, a ) - indexOf( sortInput, b ) ) : + 0; + + // If the nodes are siblings, we can do a quick check + } else if ( aup === bup ) { + return siblingCheck( a, b ); + } + + // Otherwise we need full lists of their ancestors for comparison + cur = a; + while ( (cur = cur.parentNode) ) { + ap.unshift( cur ); + } + cur = b; + while ( (cur = cur.parentNode) ) { + bp.unshift( cur ); + } + + // Walk down the tree looking for a discrepancy + while ( ap[i] === bp[i] ) { + i++; + } + + return i ? + // Do a sibling check if the nodes have a common ancestor + siblingCheck( ap[i], bp[i] ) : + + // Otherwise nodes in our document sort first + ap[i] === preferredDoc ? -1 : + bp[i] === preferredDoc ? 1 : + 0; + }; + + return document; +}; + +Sizzle.matches = function( expr, elements ) { + return Sizzle( expr, null, null, elements ); +}; + +Sizzle.matchesSelector = function( elem, expr ) { + // Set document vars if needed + if ( ( elem.ownerDocument || elem ) !== document ) { + setDocument( elem ); + } + + // Make sure that attribute selectors are quoted + expr = expr.replace( rattributeQuotes, "='$1']" ); + + if ( support.matchesSelector && documentIsHTML && + !compilerCache[ expr + " " ] && + ( !rbuggyMatches || !rbuggyMatches.test( expr ) ) && + ( !rbuggyQSA || !rbuggyQSA.test( expr ) ) ) { + + try { + var ret = matches.call( elem, expr ); + + // IE 9's matchesSelector returns false on disconnected nodes + if ( ret || support.disconnectedMatch || + // As well, disconnected nodes are said to be in a document + // fragment in IE 9 + elem.document && elem.document.nodeType !== 11 ) { + return ret; + } + } catch (e) {} + } + + return Sizzle( expr, document, null, [ elem ] ).length > 0; +}; + +Sizzle.contains = function( context, elem ) { + // Set document vars if needed + if ( ( context.ownerDocument || context ) !== document ) { + setDocument( context ); + } + return contains( context, elem ); +}; + +Sizzle.attr = function( elem, name ) { + // Set document vars if needed + if ( ( elem.ownerDocument || elem ) !== document ) { + setDocument( elem ); + } + + var fn = Expr.attrHandle[ name.toLowerCase() ], + // Don't get fooled by Object.prototype properties (jQuery #13807) + val = fn && hasOwn.call( Expr.attrHandle, name.toLowerCase() ) ? + fn( elem, name, !documentIsHTML ) : + undefined; + + return val !== undefined ? + val : + support.attributes || !documentIsHTML ? + elem.getAttribute( name ) : + (val = elem.getAttributeNode(name)) && val.specified ? + val.value : + null; +}; + +Sizzle.escape = function( sel ) { + return (sel + "").replace( rcssescape, fcssescape ); +}; + +Sizzle.error = function( msg ) { + throw new Error( "Syntax error, unrecognized expression: " + msg ); +}; + +/** + * Document sorting and removing duplicates + * @param {ArrayLike} results + */ +Sizzle.uniqueSort = function( results ) { + var elem, + duplicates = [], + j = 0, + i = 0; + + // Unless we *know* we can detect duplicates, assume their presence + hasDuplicate = !support.detectDuplicates; + sortInput = !support.sortStable && results.slice( 0 ); + results.sort( sortOrder ); + + if ( hasDuplicate ) { + while ( (elem = results[i++]) ) { + if ( elem === results[ i ] ) { + j = duplicates.push( i ); + } + } + while ( j-- ) { + results.splice( duplicates[ j ], 1 ); + } + } + + // Clear input after sorting to release objects + // See https://github.com/jquery/sizzle/pull/225 + sortInput = null; + + return results; +}; + +/** + * Utility function for retrieving the text value of an array of DOM nodes + * @param {Array|Element} elem + */ +getText = Sizzle.getText = function( elem ) { + var node, + ret = "", + i = 0, + nodeType = elem.nodeType; + + if ( !nodeType ) { + // If no nodeType, this is expected to be an array + while ( (node = elem[i++]) ) { + // Do not traverse comment nodes + ret += getText( node ); + } + } else if ( nodeType === 1 || nodeType === 9 || nodeType === 11 ) { + // Use textContent for elements + // innerText usage removed for consistency of new lines (jQuery #11153) + if ( typeof elem.textContent === "string" ) { + return elem.textContent; + } else { + // Traverse its children + for ( elem = elem.firstChild; elem; elem = elem.nextSibling ) { + ret += getText( elem ); + } + } + } else if ( nodeType === 3 || nodeType === 4 ) { + return elem.nodeValue; + } + // Do not include comment or processing instruction nodes + + return ret; +}; + +Expr = Sizzle.selectors = { + + // Can be adjusted by the user + cacheLength: 50, + + createPseudo: markFunction, + + match: matchExpr, + + attrHandle: {}, + + find: {}, + + relative: { + ">": { dir: "parentNode", first: true }, + " ": { dir: "parentNode" }, + "+": { dir: "previousSibling", first: true }, + "~": { dir: "previousSibling" } + }, + + preFilter: { + "ATTR": function( match ) { + match[1] = match[1].replace( runescape, funescape ); + + // Move the given value to match[3] whether quoted or unquoted + match[3] = ( match[3] || match[4] || match[5] || "" ).replace( runescape, funescape ); + + if ( match[2] === "~=" ) { + match[3] = " " + match[3] + " "; + } + + return match.slice( 0, 4 ); + }, + + "CHILD": function( match ) { + /* matches from matchExpr["CHILD"] + 1 type (only|nth|...) + 2 what (child|of-type) + 3 argument (even|odd|\d*|\d*n([+-]\d+)?|...) + 4 xn-component of xn+y argument ([+-]?\d*n|) + 5 sign of xn-component + 6 x of xn-component + 7 sign of y-component + 8 y of y-component + */ + match[1] = match[1].toLowerCase(); + + if ( match[1].slice( 0, 3 ) === "nth" ) { + // nth-* requires argument + if ( !match[3] ) { + Sizzle.error( match[0] ); + } + + // numeric x and y parameters for Expr.filter.CHILD + // remember that false/true cast respectively to 0/1 + match[4] = +( match[4] ? match[5] + (match[6] || 1) : 2 * ( match[3] === "even" || match[3] === "odd" ) ); + match[5] = +( ( match[7] + match[8] ) || match[3] === "odd" ); + + // other types prohibit arguments + } else if ( match[3] ) { + Sizzle.error( match[0] ); + } + + return match; + }, + + "PSEUDO": function( match ) { + var excess, + unquoted = !match[6] && match[2]; + + if ( matchExpr["CHILD"].test( match[0] ) ) { + return null; + } + + // Accept quoted arguments as-is + if ( match[3] ) { + match[2] = match[4] || match[5] || ""; + + // Strip excess characters from unquoted arguments + } else if ( unquoted && rpseudo.test( unquoted ) && + // Get excess from tokenize (recursively) + (excess = tokenize( unquoted, true )) && + // advance to the next closing parenthesis + (excess = unquoted.indexOf( ")", unquoted.length - excess ) - unquoted.length) ) { + + // excess is a negative index + match[0] = match[0].slice( 0, excess ); + match[2] = unquoted.slice( 0, excess ); + } + + // Return only captures needed by the pseudo filter method (type and argument) + return match.slice( 0, 3 ); + } + }, + + filter: { + + "TAG": function( nodeNameSelector ) { + var nodeName = nodeNameSelector.replace( runescape, funescape ).toLowerCase(); + return nodeNameSelector === "*" ? + function() { return true; } : + function( elem ) { + return elem.nodeName && elem.nodeName.toLowerCase() === nodeName; + }; + }, + + "CLASS": function( className ) { + var pattern = classCache[ className + " " ]; + + return pattern || + (pattern = new RegExp( "(^|" + whitespace + ")" + className + "(" + whitespace + "|$)" )) && + classCache( className, function( elem ) { + return pattern.test( typeof elem.className === "string" && elem.className || typeof elem.getAttribute !== "undefined" && elem.getAttribute("class") || "" ); + }); + }, + + "ATTR": function( name, operator, check ) { + return function( elem ) { + var result = Sizzle.attr( elem, name ); + + if ( result == null ) { + return operator === "!="; + } + if ( !operator ) { + return true; + } + + result += ""; + + return operator === "=" ? result === check : + operator === "!=" ? result !== check : + operator === "^=" ? check && result.indexOf( check ) === 0 : + operator === "*=" ? check && result.indexOf( check ) > -1 : + operator === "$=" ? check && result.slice( -check.length ) === check : + operator === "~=" ? ( " " + result.replace( rwhitespace, " " ) + " " ).indexOf( check ) > -1 : + operator === "|=" ? result === check || result.slice( 0, check.length + 1 ) === check + "-" : + false; + }; + }, + + "CHILD": function( type, what, argument, first, last ) { + var simple = type.slice( 0, 3 ) !== "nth", + forward = type.slice( -4 ) !== "last", + ofType = what === "of-type"; + + return first === 1 && last === 0 ? + + // Shortcut for :nth-*(n) + function( elem ) { + return !!elem.parentNode; + } : + + function( elem, context, xml ) { + var cache, uniqueCache, outerCache, node, nodeIndex, start, + dir = simple !== forward ? "nextSibling" : "previousSibling", + parent = elem.parentNode, + name = ofType && elem.nodeName.toLowerCase(), + useCache = !xml && !ofType, + diff = false; + + if ( parent ) { + + // :(first|last|only)-(child|of-type) + if ( simple ) { + while ( dir ) { + node = elem; + while ( (node = node[ dir ]) ) { + if ( ofType ? + node.nodeName.toLowerCase() === name : + node.nodeType === 1 ) { + + return false; + } + } + // Reverse direction for :only-* (if we haven't yet done so) + start = dir = type === "only" && !start && "nextSibling"; + } + return true; + } + + start = [ forward ? parent.firstChild : parent.lastChild ]; + + // non-xml :nth-child(...) stores cache data on `parent` + if ( forward && useCache ) { + + // Seek `elem` from a previously-cached index + + // ...in a gzip-friendly way + node = parent; + outerCache = node[ expando ] || (node[ expando ] = {}); + + // Support: IE <9 only + // Defend against cloned attroperties (jQuery gh-1709) + uniqueCache = outerCache[ node.uniqueID ] || + (outerCache[ node.uniqueID ] = {}); + + cache = uniqueCache[ type ] || []; + nodeIndex = cache[ 0 ] === dirruns && cache[ 1 ]; + diff = nodeIndex && cache[ 2 ]; + node = nodeIndex && parent.childNodes[ nodeIndex ]; + + while ( (node = ++nodeIndex && node && node[ dir ] || + + // Fallback to seeking `elem` from the start + (diff = nodeIndex = 0) || start.pop()) ) { + + // When found, cache indexes on `parent` and break + if ( node.nodeType === 1 && ++diff && node === elem ) { + uniqueCache[ type ] = [ dirruns, nodeIndex, diff ]; + break; + } + } + + } else { + // Use previously-cached element index if available + if ( useCache ) { + // ...in a gzip-friendly way + node = elem; + outerCache = node[ expando ] || (node[ expando ] = {}); + + // Support: IE <9 only + // Defend against cloned attroperties (jQuery gh-1709) + uniqueCache = outerCache[ node.uniqueID ] || + (outerCache[ node.uniqueID ] = {}); + + cache = uniqueCache[ type ] || []; + nodeIndex = cache[ 0 ] === dirruns && cache[ 1 ]; + diff = nodeIndex; + } + + // xml :nth-child(...) + // or :nth-last-child(...) or :nth(-last)?-of-type(...) + if ( diff === false ) { + // Use the same loop as above to seek `elem` from the start + while ( (node = ++nodeIndex && node && node[ dir ] || + (diff = nodeIndex = 0) || start.pop()) ) { + + if ( ( ofType ? + node.nodeName.toLowerCase() === name : + node.nodeType === 1 ) && + ++diff ) { + + // Cache the index of each encountered element + if ( useCache ) { + outerCache = node[ expando ] || (node[ expando ] = {}); + + // Support: IE <9 only + // Defend against cloned attroperties (jQuery gh-1709) + uniqueCache = outerCache[ node.uniqueID ] || + (outerCache[ node.uniqueID ] = {}); + + uniqueCache[ type ] = [ dirruns, diff ]; + } + + if ( node === elem ) { + break; + } + } + } + } + } + + // Incorporate the offset, then check against cycle size + diff -= last; + return diff === first || ( diff % first === 0 && diff / first >= 0 ); + } + }; + }, + + "PSEUDO": function( pseudo, argument ) { + // pseudo-class names are case-insensitive + // http://www.w3.org/TR/selectors/#pseudo-classes + // Prioritize by case sensitivity in case custom pseudos are added with uppercase letters + // Remember that setFilters inherits from pseudos + var args, + fn = Expr.pseudos[ pseudo ] || Expr.setFilters[ pseudo.toLowerCase() ] || + Sizzle.error( "unsupported pseudo: " + pseudo ); + + // The user may use createPseudo to indicate that + // arguments are needed to create the filter function + // just as Sizzle does + if ( fn[ expando ] ) { + return fn( argument ); + } + + // But maintain support for old signatures + if ( fn.length > 1 ) { + args = [ pseudo, pseudo, "", argument ]; + return Expr.setFilters.hasOwnProperty( pseudo.toLowerCase() ) ? + markFunction(function( seed, matches ) { + var idx, + matched = fn( seed, argument ), + i = matched.length; + while ( i-- ) { + idx = indexOf( seed, matched[i] ); + seed[ idx ] = !( matches[ idx ] = matched[i] ); + } + }) : + function( elem ) { + return fn( elem, 0, args ); + }; + } + + return fn; + } + }, + + pseudos: { + // Potentially complex pseudos + "not": markFunction(function( selector ) { + // Trim the selector passed to compile + // to avoid treating leading and trailing + // spaces as combinators + var input = [], + results = [], + matcher = compile( selector.replace( rtrim, "$1" ) ); + + return matcher[ expando ] ? + markFunction(function( seed, matches, context, xml ) { + var elem, + unmatched = matcher( seed, null, xml, [] ), + i = seed.length; + + // Match elements unmatched by `matcher` + while ( i-- ) { + if ( (elem = unmatched[i]) ) { + seed[i] = !(matches[i] = elem); + } + } + }) : + function( elem, context, xml ) { + input[0] = elem; + matcher( input, null, xml, results ); + // Don't keep the element (issue #299) + input[0] = null; + return !results.pop(); + }; + }), + + "has": markFunction(function( selector ) { + return function( elem ) { + return Sizzle( selector, elem ).length > 0; + }; + }), + + "contains": markFunction(function( text ) { + text = text.replace( runescape, funescape ); + return function( elem ) { + return ( elem.textContent || elem.innerText || getText( elem ) ).indexOf( text ) > -1; + }; + }), + + // "Whether an element is represented by a :lang() selector + // is based solely on the element's language value + // being equal to the identifier C, + // or beginning with the identifier C immediately followed by "-". + // The matching of C against the element's language value is performed case-insensitively. + // The identifier C does not have to be a valid language name." + // http://www.w3.org/TR/selectors/#lang-pseudo + "lang": markFunction( function( lang ) { + // lang value must be a valid identifier + if ( !ridentifier.test(lang || "") ) { + Sizzle.error( "unsupported lang: " + lang ); + } + lang = lang.replace( runescape, funescape ).toLowerCase(); + return function( elem ) { + var elemLang; + do { + if ( (elemLang = documentIsHTML ? + elem.lang : + elem.getAttribute("xml:lang") || elem.getAttribute("lang")) ) { + + elemLang = elemLang.toLowerCase(); + return elemLang === lang || elemLang.indexOf( lang + "-" ) === 0; + } + } while ( (elem = elem.parentNode) && elem.nodeType === 1 ); + return false; + }; + }), + + // Miscellaneous + "target": function( elem ) { + var hash = window.location && window.location.hash; + return hash && hash.slice( 1 ) === elem.id; + }, + + "root": function( elem ) { + return elem === docElem; + }, + + "focus": function( elem ) { + return elem === document.activeElement && (!document.hasFocus || document.hasFocus()) && !!(elem.type || elem.href || ~elem.tabIndex); + }, + + // Boolean properties + "enabled": createDisabledPseudo( false ), + "disabled": createDisabledPseudo( true ), + + "checked": function( elem ) { + // In CSS3, :checked should return both checked and selected elements + // http://www.w3.org/TR/2011/REC-css3-selectors-20110929/#checked + var nodeName = elem.nodeName.toLowerCase(); + return (nodeName === "input" && !!elem.checked) || (nodeName === "option" && !!elem.selected); + }, + + "selected": function( elem ) { + // Accessing this property makes selected-by-default + // options in Safari work properly + if ( elem.parentNode ) { + elem.parentNode.selectedIndex; + } + + return elem.selected === true; + }, + + // Contents + "empty": function( elem ) { + // http://www.w3.org/TR/selectors/#empty-pseudo + // :empty is negated by element (1) or content nodes (text: 3; cdata: 4; entity ref: 5), + // but not by others (comment: 8; processing instruction: 7; etc.) + // nodeType < 6 works because attributes (2) do not appear as children + for ( elem = elem.firstChild; elem; elem = elem.nextSibling ) { + if ( elem.nodeType < 6 ) { + return false; + } + } + return true; + }, + + "parent": function( elem ) { + return !Expr.pseudos["empty"]( elem ); + }, + + // Element/input types + "header": function( elem ) { + return rheader.test( elem.nodeName ); + }, + + "input": function( elem ) { + return rinputs.test( elem.nodeName ); + }, + + "button": function( elem ) { + var name = elem.nodeName.toLowerCase(); + return name === "input" && elem.type === "button" || name === "button"; + }, + + "text": function( elem ) { + var attr; + return elem.nodeName.toLowerCase() === "input" && + elem.type === "text" && + + // Support: IE<8 + // New HTML5 attribute values (e.g., "search") appear with elem.type === "text" + ( (attr = elem.getAttribute("type")) == null || attr.toLowerCase() === "text" ); + }, + + // Position-in-collection + "first": createPositionalPseudo(function() { + return [ 0 ]; + }), + + "last": createPositionalPseudo(function( matchIndexes, length ) { + return [ length - 1 ]; + }), + + "eq": createPositionalPseudo(function( matchIndexes, length, argument ) { + return [ argument < 0 ? argument + length : argument ]; + }), + + "even": createPositionalPseudo(function( matchIndexes, length ) { + var i = 0; + for ( ; i < length; i += 2 ) { + matchIndexes.push( i ); + } + return matchIndexes; + }), + + "odd": createPositionalPseudo(function( matchIndexes, length ) { + var i = 1; + for ( ; i < length; i += 2 ) { + matchIndexes.push( i ); + } + return matchIndexes; + }), + + "lt": createPositionalPseudo(function( matchIndexes, length, argument ) { + var i = argument < 0 ? argument + length : argument; + for ( ; --i >= 0; ) { + matchIndexes.push( i ); + } + return matchIndexes; + }), + + "gt": createPositionalPseudo(function( matchIndexes, length, argument ) { + var i = argument < 0 ? argument + length : argument; + for ( ; ++i < length; ) { + matchIndexes.push( i ); + } + return matchIndexes; + }) + } +}; + +Expr.pseudos["nth"] = Expr.pseudos["eq"]; + +// Add button/input type pseudos +for ( i in { radio: true, checkbox: true, file: true, password: true, image: true } ) { + Expr.pseudos[ i ] = createInputPseudo( i ); +} +for ( i in { submit: true, reset: true } ) { + Expr.pseudos[ i ] = createButtonPseudo( i ); +} + +// Easy API for creating new setFilters +function setFilters() {} +setFilters.prototype = Expr.filters = Expr.pseudos; +Expr.setFilters = new setFilters(); + +tokenize = Sizzle.tokenize = function( selector, parseOnly ) { + var matched, match, tokens, type, + soFar, groups, preFilters, + cached = tokenCache[ selector + " " ]; + + if ( cached ) { + return parseOnly ? 0 : cached.slice( 0 ); + } + + soFar = selector; + groups = []; + preFilters = Expr.preFilter; + + while ( soFar ) { + + // Comma and first run + if ( !matched || (match = rcomma.exec( soFar )) ) { + if ( match ) { + // Don't consume trailing commas as valid + soFar = soFar.slice( match[0].length ) || soFar; + } + groups.push( (tokens = []) ); + } + + matched = false; + + // Combinators + if ( (match = rcombinators.exec( soFar )) ) { + matched = match.shift(); + tokens.push({ + value: matched, + // Cast descendant combinators to space + type: match[0].replace( rtrim, " " ) + }); + soFar = soFar.slice( matched.length ); + } + + // Filters + for ( type in Expr.filter ) { + if ( (match = matchExpr[ type ].exec( soFar )) && (!preFilters[ type ] || + (match = preFilters[ type ]( match ))) ) { + matched = match.shift(); + tokens.push({ + value: matched, + type: type, + matches: match + }); + soFar = soFar.slice( matched.length ); + } + } + + if ( !matched ) { + break; + } + } + + // Return the length of the invalid excess + // if we're just parsing + // Otherwise, throw an error or return tokens + return parseOnly ? + soFar.length : + soFar ? + Sizzle.error( selector ) : + // Cache the tokens + tokenCache( selector, groups ).slice( 0 ); +}; + +function toSelector( tokens ) { + var i = 0, + len = tokens.length, + selector = ""; + for ( ; i < len; i++ ) { + selector += tokens[i].value; + } + return selector; +} + +function addCombinator( matcher, combinator, base ) { + var dir = combinator.dir, + skip = combinator.next, + key = skip || dir, + checkNonElements = base && key === "parentNode", + doneName = done++; + + return combinator.first ? + // Check against closest ancestor/preceding element + function( elem, context, xml ) { + while ( (elem = elem[ dir ]) ) { + if ( elem.nodeType === 1 || checkNonElements ) { + return matcher( elem, context, xml ); + } + } + return false; + } : + + // Check against all ancestor/preceding elements + function( elem, context, xml ) { + var oldCache, uniqueCache, outerCache, + newCache = [ dirruns, doneName ]; + + // We can't set arbitrary data on XML nodes, so they don't benefit from combinator caching + if ( xml ) { + while ( (elem = elem[ dir ]) ) { + if ( elem.nodeType === 1 || checkNonElements ) { + if ( matcher( elem, context, xml ) ) { + return true; + } + } + } + } else { + while ( (elem = elem[ dir ]) ) { + if ( elem.nodeType === 1 || checkNonElements ) { + outerCache = elem[ expando ] || (elem[ expando ] = {}); + + // Support: IE <9 only + // Defend against cloned attroperties (jQuery gh-1709) + uniqueCache = outerCache[ elem.uniqueID ] || (outerCache[ elem.uniqueID ] = {}); + + if ( skip && skip === elem.nodeName.toLowerCase() ) { + elem = elem[ dir ] || elem; + } else if ( (oldCache = uniqueCache[ key ]) && + oldCache[ 0 ] === dirruns && oldCache[ 1 ] === doneName ) { + + // Assign to newCache so results back-propagate to previous elements + return (newCache[ 2 ] = oldCache[ 2 ]); + } else { + // Reuse newcache so results back-propagate to previous elements + uniqueCache[ key ] = newCache; + + // A match means we're done; a fail means we have to keep checking + if ( (newCache[ 2 ] = matcher( elem, context, xml )) ) { + return true; + } + } + } + } + } + return false; + }; +} + +function elementMatcher( matchers ) { + return matchers.length > 1 ? + function( elem, context, xml ) { + var i = matchers.length; + while ( i-- ) { + if ( !matchers[i]( elem, context, xml ) ) { + return false; + } + } + return true; + } : + matchers[0]; +} + +function multipleContexts( selector, contexts, results ) { + var i = 0, + len = contexts.length; + for ( ; i < len; i++ ) { + Sizzle( selector, contexts[i], results ); + } + return results; +} + +function condense( unmatched, map, filter, context, xml ) { + var elem, + newUnmatched = [], + i = 0, + len = unmatched.length, + mapped = map != null; + + for ( ; i < len; i++ ) { + if ( (elem = unmatched[i]) ) { + if ( !filter || filter( elem, context, xml ) ) { + newUnmatched.push( elem ); + if ( mapped ) { + map.push( i ); + } + } + } + } + + return newUnmatched; +} + +function setMatcher( preFilter, selector, matcher, postFilter, postFinder, postSelector ) { + if ( postFilter && !postFilter[ expando ] ) { + postFilter = setMatcher( postFilter ); + } + if ( postFinder && !postFinder[ expando ] ) { + postFinder = setMatcher( postFinder, postSelector ); + } + return markFunction(function( seed, results, context, xml ) { + var temp, i, elem, + preMap = [], + postMap = [], + preexisting = results.length, + + // Get initial elements from seed or context + elems = seed || multipleContexts( selector || "*", context.nodeType ? [ context ] : context, [] ), + + // Prefilter to get matcher input, preserving a map for seed-results synchronization + matcherIn = preFilter && ( seed || !selector ) ? + condense( elems, preMap, preFilter, context, xml ) : + elems, + + matcherOut = matcher ? + // If we have a postFinder, or filtered seed, or non-seed postFilter or preexisting results, + postFinder || ( seed ? preFilter : preexisting || postFilter ) ? + + // ...intermediate processing is necessary + [] : + + // ...otherwise use results directly + results : + matcherIn; + + // Find primary matches + if ( matcher ) { + matcher( matcherIn, matcherOut, context, xml ); + } + + // Apply postFilter + if ( postFilter ) { + temp = condense( matcherOut, postMap ); + postFilter( temp, [], context, xml ); + + // Un-match failing elements by moving them back to matcherIn + i = temp.length; + while ( i-- ) { + if ( (elem = temp[i]) ) { + matcherOut[ postMap[i] ] = !(matcherIn[ postMap[i] ] = elem); + } + } + } + + if ( seed ) { + if ( postFinder || preFilter ) { + if ( postFinder ) { + // Get the final matcherOut by condensing this intermediate into postFinder contexts + temp = []; + i = matcherOut.length; + while ( i-- ) { + if ( (elem = matcherOut[i]) ) { + // Restore matcherIn since elem is not yet a final match + temp.push( (matcherIn[i] = elem) ); + } + } + postFinder( null, (matcherOut = []), temp, xml ); + } + + // Move matched elements from seed to results to keep them synchronized + i = matcherOut.length; + while ( i-- ) { + if ( (elem = matcherOut[i]) && + (temp = postFinder ? indexOf( seed, elem ) : preMap[i]) > -1 ) { + + seed[temp] = !(results[temp] = elem); + } + } + } + + // Add elements to results, through postFinder if defined + } else { + matcherOut = condense( + matcherOut === results ? + matcherOut.splice( preexisting, matcherOut.length ) : + matcherOut + ); + if ( postFinder ) { + postFinder( null, results, matcherOut, xml ); + } else { + push.apply( results, matcherOut ); + } + } + }); +} + +function matcherFromTokens( tokens ) { + var checkContext, matcher, j, + len = tokens.length, + leadingRelative = Expr.relative[ tokens[0].type ], + implicitRelative = leadingRelative || Expr.relative[" "], + i = leadingRelative ? 1 : 0, + + // The foundational matcher ensures that elements are reachable from top-level context(s) + matchContext = addCombinator( function( elem ) { + return elem === checkContext; + }, implicitRelative, true ), + matchAnyContext = addCombinator( function( elem ) { + return indexOf( checkContext, elem ) > -1; + }, implicitRelative, true ), + matchers = [ function( elem, context, xml ) { + var ret = ( !leadingRelative && ( xml || context !== outermostContext ) ) || ( + (checkContext = context).nodeType ? + matchContext( elem, context, xml ) : + matchAnyContext( elem, context, xml ) ); + // Avoid hanging onto element (issue #299) + checkContext = null; + return ret; + } ]; + + for ( ; i < len; i++ ) { + if ( (matcher = Expr.relative[ tokens[i].type ]) ) { + matchers = [ addCombinator(elementMatcher( matchers ), matcher) ]; + } else { + matcher = Expr.filter[ tokens[i].type ].apply( null, tokens[i].matches ); + + // Return special upon seeing a positional matcher + if ( matcher[ expando ] ) { + // Find the next relative operator (if any) for proper handling + j = ++i; + for ( ; j < len; j++ ) { + if ( Expr.relative[ tokens[j].type ] ) { + break; + } + } + return setMatcher( + i > 1 && elementMatcher( matchers ), + i > 1 && toSelector( + // If the preceding token was a descendant combinator, insert an implicit any-element `*` + tokens.slice( 0, i - 1 ).concat({ value: tokens[ i - 2 ].type === " " ? "*" : "" }) + ).replace( rtrim, "$1" ), + matcher, + i < j && matcherFromTokens( tokens.slice( i, j ) ), + j < len && matcherFromTokens( (tokens = tokens.slice( j )) ), + j < len && toSelector( tokens ) + ); + } + matchers.push( matcher ); + } + } + + return elementMatcher( matchers ); +} + +function matcherFromGroupMatchers( elementMatchers, setMatchers ) { + var bySet = setMatchers.length > 0, + byElement = elementMatchers.length > 0, + superMatcher = function( seed, context, xml, results, outermost ) { + var elem, j, matcher, + matchedCount = 0, + i = "0", + unmatched = seed && [], + setMatched = [], + contextBackup = outermostContext, + // We must always have either seed elements or outermost context + elems = seed || byElement && Expr.find["TAG"]( "*", outermost ), + // Use integer dirruns iff this is the outermost matcher + dirrunsUnique = (dirruns += contextBackup == null ? 1 : Math.random() || 0.1), + len = elems.length; + + if ( outermost ) { + outermostContext = context === document || context || outermost; + } + + // Add elements passing elementMatchers directly to results + // Support: IE<9, Safari + // Tolerate NodeList properties (IE: "length"; Safari: ) matching elements by id + for ( ; i !== len && (elem = elems[i]) != null; i++ ) { + if ( byElement && elem ) { + j = 0; + if ( !context && elem.ownerDocument !== document ) { + setDocument( elem ); + xml = !documentIsHTML; + } + while ( (matcher = elementMatchers[j++]) ) { + if ( matcher( elem, context || document, xml) ) { + results.push( elem ); + break; + } + } + if ( outermost ) { + dirruns = dirrunsUnique; + } + } + + // Track unmatched elements for set filters + if ( bySet ) { + // They will have gone through all possible matchers + if ( (elem = !matcher && elem) ) { + matchedCount--; + } + + // Lengthen the array for every element, matched or not + if ( seed ) { + unmatched.push( elem ); + } + } + } + + // `i` is now the count of elements visited above, and adding it to `matchedCount` + // makes the latter nonnegative. + matchedCount += i; + + // Apply set filters to unmatched elements + // NOTE: This can be skipped if there are no unmatched elements (i.e., `matchedCount` + // equals `i`), unless we didn't visit _any_ elements in the above loop because we have + // no element matchers and no seed. + // Incrementing an initially-string "0" `i` allows `i` to remain a string only in that + // case, which will result in a "00" `matchedCount` that differs from `i` but is also + // numerically zero. + if ( bySet && i !== matchedCount ) { + j = 0; + while ( (matcher = setMatchers[j++]) ) { + matcher( unmatched, setMatched, context, xml ); + } + + if ( seed ) { + // Reintegrate element matches to eliminate the need for sorting + if ( matchedCount > 0 ) { + while ( i-- ) { + if ( !(unmatched[i] || setMatched[i]) ) { + setMatched[i] = pop.call( results ); + } + } + } + + // Discard index placeholder values to get only actual matches + setMatched = condense( setMatched ); + } + + // Add matches to results + push.apply( results, setMatched ); + + // Seedless set matches succeeding multiple successful matchers stipulate sorting + if ( outermost && !seed && setMatched.length > 0 && + ( matchedCount + setMatchers.length ) > 1 ) { + + Sizzle.uniqueSort( results ); + } + } + + // Override manipulation of globals by nested matchers + if ( outermost ) { + dirruns = dirrunsUnique; + outermostContext = contextBackup; + } + + return unmatched; + }; + + return bySet ? + markFunction( superMatcher ) : + superMatcher; +} + +compile = Sizzle.compile = function( selector, match /* Internal Use Only */ ) { + var i, + setMatchers = [], + elementMatchers = [], + cached = compilerCache[ selector + " " ]; + + if ( !cached ) { + // Generate a function of recursive functions that can be used to check each element + if ( !match ) { + match = tokenize( selector ); + } + i = match.length; + while ( i-- ) { + cached = matcherFromTokens( match[i] ); + if ( cached[ expando ] ) { + setMatchers.push( cached ); + } else { + elementMatchers.push( cached ); + } + } + + // Cache the compiled function + cached = compilerCache( selector, matcherFromGroupMatchers( elementMatchers, setMatchers ) ); + + // Save selector and tokenization + cached.selector = selector; + } + return cached; +}; + +/** + * A low-level selection function that works with Sizzle's compiled + * selector functions + * @param {String|Function} selector A selector or a pre-compiled + * selector function built with Sizzle.compile + * @param {Element} context + * @param {Array} [results] + * @param {Array} [seed] A set of elements to match against + */ +select = Sizzle.select = function( selector, context, results, seed ) { + var i, tokens, token, type, find, + compiled = typeof selector === "function" && selector, + match = !seed && tokenize( (selector = compiled.selector || selector) ); + + results = results || []; + + // Try to minimize operations if there is only one selector in the list and no seed + // (the latter of which guarantees us context) + if ( match.length === 1 ) { + + // Reduce context if the leading compound selector is an ID + tokens = match[0] = match[0].slice( 0 ); + if ( tokens.length > 2 && (token = tokens[0]).type === "ID" && + context.nodeType === 9 && documentIsHTML && Expr.relative[ tokens[1].type ] ) { + + context = ( Expr.find["ID"]( token.matches[0].replace(runescape, funescape), context ) || [] )[0]; + if ( !context ) { + return results; + + // Precompiled matchers will still verify ancestry, so step up a level + } else if ( compiled ) { + context = context.parentNode; + } + + selector = selector.slice( tokens.shift().value.length ); + } + + // Fetch a seed set for right-to-left matching + i = matchExpr["needsContext"].test( selector ) ? 0 : tokens.length; + while ( i-- ) { + token = tokens[i]; + + // Abort if we hit a combinator + if ( Expr.relative[ (type = token.type) ] ) { + break; + } + if ( (find = Expr.find[ type ]) ) { + // Search, expanding context for leading sibling combinators + if ( (seed = find( + token.matches[0].replace( runescape, funescape ), + rsibling.test( tokens[0].type ) && testContext( context.parentNode ) || context + )) ) { + + // If seed is empty or no tokens remain, we can return early + tokens.splice( i, 1 ); + selector = seed.length && toSelector( tokens ); + if ( !selector ) { + push.apply( results, seed ); + return results; + } + + break; + } + } + } + } + + // Compile and execute a filtering function if one is not provided + // Provide `match` to avoid retokenization if we modified the selector above + ( compiled || compile( selector, match ) )( + seed, + context, + !documentIsHTML, + results, + !context || rsibling.test( selector ) && testContext( context.parentNode ) || context + ); + return results; +}; + +// One-time assignments + +// Sort stability +support.sortStable = expando.split("").sort( sortOrder ).join("") === expando; + +// Support: Chrome 14-35+ +// Always assume duplicates if they aren't passed to the comparison function +support.detectDuplicates = !!hasDuplicate; + +// Initialize against the default document +setDocument(); + +// Support: Webkit<537.32 - Safari 6.0.3/Chrome 25 (fixed in Chrome 27) +// Detached nodes confoundingly follow *each other* +support.sortDetached = assert(function( el ) { + // Should return 1, but returns 4 (following) + return el.compareDocumentPosition( document.createElement("fieldset") ) & 1; +}); + +// Support: IE<8 +// Prevent attribute/property "interpolation" +// https://msdn.microsoft.com/en-us/library/ms536429%28VS.85%29.aspx +if ( !assert(function( el ) { + el.innerHTML = ""; + return el.firstChild.getAttribute("href") === "#" ; +}) ) { + addHandle( "type|href|height|width", function( elem, name, isXML ) { + if ( !isXML ) { + return elem.getAttribute( name, name.toLowerCase() === "type" ? 1 : 2 ); + } + }); +} + +// Support: IE<9 +// Use defaultValue in place of getAttribute("value") +if ( !support.attributes || !assert(function( el ) { + el.innerHTML = ""; + el.firstChild.setAttribute( "value", "" ); + return el.firstChild.getAttribute( "value" ) === ""; +}) ) { + addHandle( "value", function( elem, name, isXML ) { + if ( !isXML && elem.nodeName.toLowerCase() === "input" ) { + return elem.defaultValue; + } + }); +} + +// Support: IE<9 +// Use getAttributeNode to fetch booleans when getAttribute lies +if ( !assert(function( el ) { + return el.getAttribute("disabled") == null; +}) ) { + addHandle( booleans, function( elem, name, isXML ) { + var val; + if ( !isXML ) { + return elem[ name ] === true ? name.toLowerCase() : + (val = elem.getAttributeNode( name )) && val.specified ? + val.value : + null; + } + }); +} + +return Sizzle; + +})( window ); + + + +jQuery.find = Sizzle; +jQuery.expr = Sizzle.selectors; + +// Deprecated +jQuery.expr[ ":" ] = jQuery.expr.pseudos; +jQuery.uniqueSort = jQuery.unique = Sizzle.uniqueSort; +jQuery.text = Sizzle.getText; +jQuery.isXMLDoc = Sizzle.isXML; +jQuery.contains = Sizzle.contains; +jQuery.escapeSelector = Sizzle.escape; + + + + +var dir = function( elem, dir, until ) { + var matched = [], + truncate = until !== undefined; + + while ( ( elem = elem[ dir ] ) && elem.nodeType !== 9 ) { + if ( elem.nodeType === 1 ) { + if ( truncate && jQuery( elem ).is( until ) ) { + break; + } + matched.push( elem ); + } + } + return matched; +}; + + +var siblings = function( n, elem ) { + var matched = []; + + for ( ; n; n = n.nextSibling ) { + if ( n.nodeType === 1 && n !== elem ) { + matched.push( n ); + } + } + + return matched; +}; + + +var rneedsContext = jQuery.expr.match.needsContext; + + + +function nodeName( elem, name ) { + + return elem.nodeName && elem.nodeName.toLowerCase() === name.toLowerCase(); + +}; +var rsingleTag = ( /^<([a-z][^\/\0>:\x20\t\r\n\f]*)[\x20\t\r\n\f]*\/?>(?:<\/\1>|)$/i ); + + + +var risSimple = /^.[^:#\[\.,]*$/; + +// Implement the identical functionality for filter and not +function winnow( elements, qualifier, not ) { + if ( jQuery.isFunction( qualifier ) ) { + return jQuery.grep( elements, function( elem, i ) { + return !!qualifier.call( elem, i, elem ) !== not; + } ); + } + + // Single element + if ( qualifier.nodeType ) { + return jQuery.grep( elements, function( elem ) { + return ( elem === qualifier ) !== not; + } ); + } + + // Arraylike of elements (jQuery, arguments, Array) + if ( typeof qualifier !== "string" ) { + return jQuery.grep( elements, function( elem ) { + return ( indexOf.call( qualifier, elem ) > -1 ) !== not; + } ); + } + + // Simple selector that can be filtered directly, removing non-Elements + if ( risSimple.test( qualifier ) ) { + return jQuery.filter( qualifier, elements, not ); + } + + // Complex selector, compare the two sets, removing non-Elements + qualifier = jQuery.filter( qualifier, elements ); + return jQuery.grep( elements, function( elem ) { + return ( indexOf.call( qualifier, elem ) > -1 ) !== not && elem.nodeType === 1; + } ); +} + +jQuery.filter = function( expr, elems, not ) { + var elem = elems[ 0 ]; + + if ( not ) { + expr = ":not(" + expr + ")"; + } + + if ( elems.length === 1 && elem.nodeType === 1 ) { + return jQuery.find.matchesSelector( elem, expr ) ? [ elem ] : []; + } + + return jQuery.find.matches( expr, jQuery.grep( elems, function( elem ) { + return elem.nodeType === 1; + } ) ); +}; + +jQuery.fn.extend( { + find: function( selector ) { + var i, ret, + len = this.length, + self = this; + + if ( typeof selector !== "string" ) { + return this.pushStack( jQuery( selector ).filter( function() { + for ( i = 0; i < len; i++ ) { + if ( jQuery.contains( self[ i ], this ) ) { + return true; + } + } + } ) ); + } + + ret = this.pushStack( [] ); + + for ( i = 0; i < len; i++ ) { + jQuery.find( selector, self[ i ], ret ); + } + + return len > 1 ? jQuery.uniqueSort( ret ) : ret; + }, + filter: function( selector ) { + return this.pushStack( winnow( this, selector || [], false ) ); + }, + not: function( selector ) { + return this.pushStack( winnow( this, selector || [], true ) ); + }, + is: function( selector ) { + return !!winnow( + this, + + // If this is a positional/relative selector, check membership in the returned set + // so $("p:first").is("p:last") won't return true for a doc with two "p". + typeof selector === "string" && rneedsContext.test( selector ) ? + jQuery( selector ) : + selector || [], + false + ).length; + } +} ); + + +// Initialize a jQuery object + + +// A central reference to the root jQuery(document) +var rootjQuery, + + // A simple way to check for HTML strings + // Prioritize #id over to avoid XSS via location.hash (#9521) + // Strict HTML recognition (#11290: must start with <) + // Shortcut simple #id case for speed + rquickExpr = /^(?:\s*(<[\w\W]+>)[^>]*|#([\w-]+))$/, + + init = jQuery.fn.init = function( selector, context, root ) { + var match, elem; + + // HANDLE: $(""), $(null), $(undefined), $(false) + if ( !selector ) { + return this; + } + + // Method init() accepts an alternate rootjQuery + // so migrate can support jQuery.sub (gh-2101) + root = root || rootjQuery; + + // Handle HTML strings + if ( typeof selector === "string" ) { + if ( selector[ 0 ] === "<" && + selector[ selector.length - 1 ] === ">" && + selector.length >= 3 ) { + + // Assume that strings that start and end with <> are HTML and skip the regex check + match = [ null, selector, null ]; + + } else { + match = rquickExpr.exec( selector ); + } + + // Match html or make sure no context is specified for #id + if ( match && ( match[ 1 ] || !context ) ) { + + // HANDLE: $(html) -> $(array) + if ( match[ 1 ] ) { + context = context instanceof jQuery ? context[ 0 ] : context; + + // Option to run scripts is true for back-compat + // Intentionally let the error be thrown if parseHTML is not present + jQuery.merge( this, jQuery.parseHTML( + match[ 1 ], + context && context.nodeType ? context.ownerDocument || context : document, + true + ) ); + + // HANDLE: $(html, props) + if ( rsingleTag.test( match[ 1 ] ) && jQuery.isPlainObject( context ) ) { + for ( match in context ) { + + // Properties of context are called as methods if possible + if ( jQuery.isFunction( this[ match ] ) ) { + this[ match ]( context[ match ] ); + + // ...and otherwise set as attributes + } else { + this.attr( match, context[ match ] ); + } + } + } + + return this; + + // HANDLE: $(#id) + } else { + elem = document.getElementById( match[ 2 ] ); + + if ( elem ) { + + // Inject the element directly into the jQuery object + this[ 0 ] = elem; + this.length = 1; + } + return this; + } + + // HANDLE: $(expr, $(...)) + } else if ( !context || context.jquery ) { + return ( context || root ).find( selector ); + + // HANDLE: $(expr, context) + // (which is just equivalent to: $(context).find(expr) + } else { + return this.constructor( context ).find( selector ); + } + + // HANDLE: $(DOMElement) + } else if ( selector.nodeType ) { + this[ 0 ] = selector; + this.length = 1; + return this; + + // HANDLE: $(function) + // Shortcut for document ready + } else if ( jQuery.isFunction( selector ) ) { + return root.ready !== undefined ? + root.ready( selector ) : + + // Execute immediately if ready is not present + selector( jQuery ); + } + + return jQuery.makeArray( selector, this ); + }; + +// Give the init function the jQuery prototype for later instantiation +init.prototype = jQuery.fn; + +// Initialize central reference +rootjQuery = jQuery( document ); + + +var rparentsprev = /^(?:parents|prev(?:Until|All))/, + + // Methods guaranteed to produce a unique set when starting from a unique set + guaranteedUnique = { + children: true, + contents: true, + next: true, + prev: true + }; + +jQuery.fn.extend( { + has: function( target ) { + var targets = jQuery( target, this ), + l = targets.length; + + return this.filter( function() { + var i = 0; + for ( ; i < l; i++ ) { + if ( jQuery.contains( this, targets[ i ] ) ) { + return true; + } + } + } ); + }, + + closest: function( selectors, context ) { + var cur, + i = 0, + l = this.length, + matched = [], + targets = typeof selectors !== "string" && jQuery( selectors ); + + // Positional selectors never match, since there's no _selection_ context + if ( !rneedsContext.test( selectors ) ) { + for ( ; i < l; i++ ) { + for ( cur = this[ i ]; cur && cur !== context; cur = cur.parentNode ) { + + // Always skip document fragments + if ( cur.nodeType < 11 && ( targets ? + targets.index( cur ) > -1 : + + // Don't pass non-elements to Sizzle + cur.nodeType === 1 && + jQuery.find.matchesSelector( cur, selectors ) ) ) { + + matched.push( cur ); + break; + } + } + } + } + + return this.pushStack( matched.length > 1 ? jQuery.uniqueSort( matched ) : matched ); + }, + + // Determine the position of an element within the set + index: function( elem ) { + + // No argument, return index in parent + if ( !elem ) { + return ( this[ 0 ] && this[ 0 ].parentNode ) ? this.first().prevAll().length : -1; + } + + // Index in selector + if ( typeof elem === "string" ) { + return indexOf.call( jQuery( elem ), this[ 0 ] ); + } + + // Locate the position of the desired element + return indexOf.call( this, + + // If it receives a jQuery object, the first element is used + elem.jquery ? elem[ 0 ] : elem + ); + }, + + add: function( selector, context ) { + return this.pushStack( + jQuery.uniqueSort( + jQuery.merge( this.get(), jQuery( selector, context ) ) + ) + ); + }, + + addBack: function( selector ) { + return this.add( selector == null ? + this.prevObject : this.prevObject.filter( selector ) + ); + } +} ); + +function sibling( cur, dir ) { + while ( ( cur = cur[ dir ] ) && cur.nodeType !== 1 ) {} + return cur; +} + +jQuery.each( { + parent: function( elem ) { + var parent = elem.parentNode; + return parent && parent.nodeType !== 11 ? parent : null; + }, + parents: function( elem ) { + return dir( elem, "parentNode" ); + }, + parentsUntil: function( elem, i, until ) { + return dir( elem, "parentNode", until ); + }, + next: function( elem ) { + return sibling( elem, "nextSibling" ); + }, + prev: function( elem ) { + return sibling( elem, "previousSibling" ); + }, + nextAll: function( elem ) { + return dir( elem, "nextSibling" ); + }, + prevAll: function( elem ) { + return dir( elem, "previousSibling" ); + }, + nextUntil: function( elem, i, until ) { + return dir( elem, "nextSibling", until ); + }, + prevUntil: function( elem, i, until ) { + return dir( elem, "previousSibling", until ); + }, + siblings: function( elem ) { + return siblings( ( elem.parentNode || {} ).firstChild, elem ); + }, + children: function( elem ) { + return siblings( elem.firstChild ); + }, + contents: function( elem ) { + if ( nodeName( elem, "iframe" ) ) { + return elem.contentDocument; + } + + // Support: IE 9 - 11 only, iOS 7 only, Android Browser <=4.3 only + // Treat the template element as a regular one in browsers that + // don't support it. + if ( nodeName( elem, "template" ) ) { + elem = elem.content || elem; + } + + return jQuery.merge( [], elem.childNodes ); + } +}, function( name, fn ) { + jQuery.fn[ name ] = function( until, selector ) { + var matched = jQuery.map( this, fn, until ); + + if ( name.slice( -5 ) !== "Until" ) { + selector = until; + } + + if ( selector && typeof selector === "string" ) { + matched = jQuery.filter( selector, matched ); + } + + if ( this.length > 1 ) { + + // Remove duplicates + if ( !guaranteedUnique[ name ] ) { + jQuery.uniqueSort( matched ); + } + + // Reverse order for parents* and prev-derivatives + if ( rparentsprev.test( name ) ) { + matched.reverse(); + } + } + + return this.pushStack( matched ); + }; +} ); +var rnothtmlwhite = ( /[^\x20\t\r\n\f]+/g ); + + + +// Convert String-formatted options into Object-formatted ones +function createOptions( options ) { + var object = {}; + jQuery.each( options.match( rnothtmlwhite ) || [], function( _, flag ) { + object[ flag ] = true; + } ); + return object; +} + +/* + * Create a callback list using the following parameters: + * + * options: an optional list of space-separated options that will change how + * the callback list behaves or a more traditional option object + * + * By default a callback list will act like an event callback list and can be + * "fired" multiple times. + * + * Possible options: + * + * once: will ensure the callback list can only be fired once (like a Deferred) + * + * memory: will keep track of previous values and will call any callback added + * after the list has been fired right away with the latest "memorized" + * values (like a Deferred) + * + * unique: will ensure a callback can only be added once (no duplicate in the list) + * + * stopOnFalse: interrupt callings when a callback returns false + * + */ +jQuery.Callbacks = function( options ) { + + // Convert options from String-formatted to Object-formatted if needed + // (we check in cache first) + options = typeof options === "string" ? + createOptions( options ) : + jQuery.extend( {}, options ); + + var // Flag to know if list is currently firing + firing, + + // Last fire value for non-forgettable lists + memory, + + // Flag to know if list was already fired + fired, + + // Flag to prevent firing + locked, + + // Actual callback list + list = [], + + // Queue of execution data for repeatable lists + queue = [], + + // Index of currently firing callback (modified by add/remove as needed) + firingIndex = -1, + + // Fire callbacks + fire = function() { + + // Enforce single-firing + locked = locked || options.once; + + // Execute callbacks for all pending executions, + // respecting firingIndex overrides and runtime changes + fired = firing = true; + for ( ; queue.length; firingIndex = -1 ) { + memory = queue.shift(); + while ( ++firingIndex < list.length ) { + + // Run callback and check for early termination + if ( list[ firingIndex ].apply( memory[ 0 ], memory[ 1 ] ) === false && + options.stopOnFalse ) { + + // Jump to end and forget the data so .add doesn't re-fire + firingIndex = list.length; + memory = false; + } + } + } + + // Forget the data if we're done with it + if ( !options.memory ) { + memory = false; + } + + firing = false; + + // Clean up if we're done firing for good + if ( locked ) { + + // Keep an empty list if we have data for future add calls + if ( memory ) { + list = []; + + // Otherwise, this object is spent + } else { + list = ""; + } + } + }, + + // Actual Callbacks object + self = { + + // Add a callback or a collection of callbacks to the list + add: function() { + if ( list ) { + + // If we have memory from a past run, we should fire after adding + if ( memory && !firing ) { + firingIndex = list.length - 1; + queue.push( memory ); + } + + ( function add( args ) { + jQuery.each( args, function( _, arg ) { + if ( jQuery.isFunction( arg ) ) { + if ( !options.unique || !self.has( arg ) ) { + list.push( arg ); + } + } else if ( arg && arg.length && jQuery.type( arg ) !== "string" ) { + + // Inspect recursively + add( arg ); + } + } ); + } )( arguments ); + + if ( memory && !firing ) { + fire(); + } + } + return this; + }, + + // Remove a callback from the list + remove: function() { + jQuery.each( arguments, function( _, arg ) { + var index; + while ( ( index = jQuery.inArray( arg, list, index ) ) > -1 ) { + list.splice( index, 1 ); + + // Handle firing indexes + if ( index <= firingIndex ) { + firingIndex--; + } + } + } ); + return this; + }, + + // Check if a given callback is in the list. + // If no argument is given, return whether or not list has callbacks attached. + has: function( fn ) { + return fn ? + jQuery.inArray( fn, list ) > -1 : + list.length > 0; + }, + + // Remove all callbacks from the list + empty: function() { + if ( list ) { + list = []; + } + return this; + }, + + // Disable .fire and .add + // Abort any current/pending executions + // Clear all callbacks and values + disable: function() { + locked = queue = []; + list = memory = ""; + return this; + }, + disabled: function() { + return !list; + }, + + // Disable .fire + // Also disable .add unless we have memory (since it would have no effect) + // Abort any pending executions + lock: function() { + locked = queue = []; + if ( !memory && !firing ) { + list = memory = ""; + } + return this; + }, + locked: function() { + return !!locked; + }, + + // Call all callbacks with the given context and arguments + fireWith: function( context, args ) { + if ( !locked ) { + args = args || []; + args = [ context, args.slice ? args.slice() : args ]; + queue.push( args ); + if ( !firing ) { + fire(); + } + } + return this; + }, + + // Call all the callbacks with the given arguments + fire: function() { + self.fireWith( this, arguments ); + return this; + }, + + // To know if the callbacks have already been called at least once + fired: function() { + return !!fired; + } + }; + + return self; +}; + + +function Identity( v ) { + return v; +} +function Thrower( ex ) { + throw ex; +} + +function adoptValue( value, resolve, reject, noValue ) { + var method; + + try { + + // Check for promise aspect first to privilege synchronous behavior + if ( value && jQuery.isFunction( ( method = value.promise ) ) ) { + method.call( value ).done( resolve ).fail( reject ); + + // Other thenables + } else if ( value && jQuery.isFunction( ( method = value.then ) ) ) { + method.call( value, resolve, reject ); + + // Other non-thenables + } else { + + // Control `resolve` arguments by letting Array#slice cast boolean `noValue` to integer: + // * false: [ value ].slice( 0 ) => resolve( value ) + // * true: [ value ].slice( 1 ) => resolve() + resolve.apply( undefined, [ value ].slice( noValue ) ); + } + + // For Promises/A+, convert exceptions into rejections + // Since jQuery.when doesn't unwrap thenables, we can skip the extra checks appearing in + // Deferred#then to conditionally suppress rejection. + } catch ( value ) { + + // Support: Android 4.0 only + // Strict mode functions invoked without .call/.apply get global-object context + reject.apply( undefined, [ value ] ); + } +} + +jQuery.extend( { + + Deferred: function( func ) { + var tuples = [ + + // action, add listener, callbacks, + // ... .then handlers, argument index, [final state] + [ "notify", "progress", jQuery.Callbacks( "memory" ), + jQuery.Callbacks( "memory" ), 2 ], + [ "resolve", "done", jQuery.Callbacks( "once memory" ), + jQuery.Callbacks( "once memory" ), 0, "resolved" ], + [ "reject", "fail", jQuery.Callbacks( "once memory" ), + jQuery.Callbacks( "once memory" ), 1, "rejected" ] + ], + state = "pending", + promise = { + state: function() { + return state; + }, + always: function() { + deferred.done( arguments ).fail( arguments ); + return this; + }, + "catch": function( fn ) { + return promise.then( null, fn ); + }, + + // Keep pipe for back-compat + pipe: function( /* fnDone, fnFail, fnProgress */ ) { + var fns = arguments; + + return jQuery.Deferred( function( newDefer ) { + jQuery.each( tuples, function( i, tuple ) { + + // Map tuples (progress, done, fail) to arguments (done, fail, progress) + var fn = jQuery.isFunction( fns[ tuple[ 4 ] ] ) && fns[ tuple[ 4 ] ]; + + // deferred.progress(function() { bind to newDefer or newDefer.notify }) + // deferred.done(function() { bind to newDefer or newDefer.resolve }) + // deferred.fail(function() { bind to newDefer or newDefer.reject }) + deferred[ tuple[ 1 ] ]( function() { + var returned = fn && fn.apply( this, arguments ); + if ( returned && jQuery.isFunction( returned.promise ) ) { + returned.promise() + .progress( newDefer.notify ) + .done( newDefer.resolve ) + .fail( newDefer.reject ); + } else { + newDefer[ tuple[ 0 ] + "With" ]( + this, + fn ? [ returned ] : arguments + ); + } + } ); + } ); + fns = null; + } ).promise(); + }, + then: function( onFulfilled, onRejected, onProgress ) { + var maxDepth = 0; + function resolve( depth, deferred, handler, special ) { + return function() { + var that = this, + args = arguments, + mightThrow = function() { + var returned, then; + + // Support: Promises/A+ section 2.3.3.3.3 + // https://promisesaplus.com/#point-59 + // Ignore double-resolution attempts + if ( depth < maxDepth ) { + return; + } + + returned = handler.apply( that, args ); + + // Support: Promises/A+ section 2.3.1 + // https://promisesaplus.com/#point-48 + if ( returned === deferred.promise() ) { + throw new TypeError( "Thenable self-resolution" ); + } + + // Support: Promises/A+ sections 2.3.3.1, 3.5 + // https://promisesaplus.com/#point-54 + // https://promisesaplus.com/#point-75 + // Retrieve `then` only once + then = returned && + + // Support: Promises/A+ section 2.3.4 + // https://promisesaplus.com/#point-64 + // Only check objects and functions for thenability + ( typeof returned === "object" || + typeof returned === "function" ) && + returned.then; + + // Handle a returned thenable + if ( jQuery.isFunction( then ) ) { + + // Special processors (notify) just wait for resolution + if ( special ) { + then.call( + returned, + resolve( maxDepth, deferred, Identity, special ), + resolve( maxDepth, deferred, Thrower, special ) + ); + + // Normal processors (resolve) also hook into progress + } else { + + // ...and disregard older resolution values + maxDepth++; + + then.call( + returned, + resolve( maxDepth, deferred, Identity, special ), + resolve( maxDepth, deferred, Thrower, special ), + resolve( maxDepth, deferred, Identity, + deferred.notifyWith ) + ); + } + + // Handle all other returned values + } else { + + // Only substitute handlers pass on context + // and multiple values (non-spec behavior) + if ( handler !== Identity ) { + that = undefined; + args = [ returned ]; + } + + // Process the value(s) + // Default process is resolve + ( special || deferred.resolveWith )( that, args ); + } + }, + + // Only normal processors (resolve) catch and reject exceptions + process = special ? + mightThrow : + function() { + try { + mightThrow(); + } catch ( e ) { + + if ( jQuery.Deferred.exceptionHook ) { + jQuery.Deferred.exceptionHook( e, + process.stackTrace ); + } + + // Support: Promises/A+ section 2.3.3.3.4.1 + // https://promisesaplus.com/#point-61 + // Ignore post-resolution exceptions + if ( depth + 1 >= maxDepth ) { + + // Only substitute handlers pass on context + // and multiple values (non-spec behavior) + if ( handler !== Thrower ) { + that = undefined; + args = [ e ]; + } + + deferred.rejectWith( that, args ); + } + } + }; + + // Support: Promises/A+ section 2.3.3.3.1 + // https://promisesaplus.com/#point-57 + // Re-resolve promises immediately to dodge false rejection from + // subsequent errors + if ( depth ) { + process(); + } else { + + // Call an optional hook to record the stack, in case of exception + // since it's otherwise lost when execution goes async + if ( jQuery.Deferred.getStackHook ) { + process.stackTrace = jQuery.Deferred.getStackHook(); + } + window.setTimeout( process ); + } + }; + } + + return jQuery.Deferred( function( newDefer ) { + + // progress_handlers.add( ... ) + tuples[ 0 ][ 3 ].add( + resolve( + 0, + newDefer, + jQuery.isFunction( onProgress ) ? + onProgress : + Identity, + newDefer.notifyWith + ) + ); + + // fulfilled_handlers.add( ... ) + tuples[ 1 ][ 3 ].add( + resolve( + 0, + newDefer, + jQuery.isFunction( onFulfilled ) ? + onFulfilled : + Identity + ) + ); + + // rejected_handlers.add( ... ) + tuples[ 2 ][ 3 ].add( + resolve( + 0, + newDefer, + jQuery.isFunction( onRejected ) ? + onRejected : + Thrower + ) + ); + } ).promise(); + }, + + // Get a promise for this deferred + // If obj is provided, the promise aspect is added to the object + promise: function( obj ) { + return obj != null ? jQuery.extend( obj, promise ) : promise; + } + }, + deferred = {}; + + // Add list-specific methods + jQuery.each( tuples, function( i, tuple ) { + var list = tuple[ 2 ], + stateString = tuple[ 5 ]; + + // promise.progress = list.add + // promise.done = list.add + // promise.fail = list.add + promise[ tuple[ 1 ] ] = list.add; + + // Handle state + if ( stateString ) { + list.add( + function() { + + // state = "resolved" (i.e., fulfilled) + // state = "rejected" + state = stateString; + }, + + // rejected_callbacks.disable + // fulfilled_callbacks.disable + tuples[ 3 - i ][ 2 ].disable, + + // progress_callbacks.lock + tuples[ 0 ][ 2 ].lock + ); + } + + // progress_handlers.fire + // fulfilled_handlers.fire + // rejected_handlers.fire + list.add( tuple[ 3 ].fire ); + + // deferred.notify = function() { deferred.notifyWith(...) } + // deferred.resolve = function() { deferred.resolveWith(...) } + // deferred.reject = function() { deferred.rejectWith(...) } + deferred[ tuple[ 0 ] ] = function() { + deferred[ tuple[ 0 ] + "With" ]( this === deferred ? undefined : this, arguments ); + return this; + }; + + // deferred.notifyWith = list.fireWith + // deferred.resolveWith = list.fireWith + // deferred.rejectWith = list.fireWith + deferred[ tuple[ 0 ] + "With" ] = list.fireWith; + } ); + + // Make the deferred a promise + promise.promise( deferred ); + + // Call given func if any + if ( func ) { + func.call( deferred, deferred ); + } + + // All done! + return deferred; + }, + + // Deferred helper + when: function( singleValue ) { + var + + // count of uncompleted subordinates + remaining = arguments.length, + + // count of unprocessed arguments + i = remaining, + + // subordinate fulfillment data + resolveContexts = Array( i ), + resolveValues = slice.call( arguments ), + + // the master Deferred + master = jQuery.Deferred(), + + // subordinate callback factory + updateFunc = function( i ) { + return function( value ) { + resolveContexts[ i ] = this; + resolveValues[ i ] = arguments.length > 1 ? slice.call( arguments ) : value; + if ( !( --remaining ) ) { + master.resolveWith( resolveContexts, resolveValues ); + } + }; + }; + + // Single- and empty arguments are adopted like Promise.resolve + if ( remaining <= 1 ) { + adoptValue( singleValue, master.done( updateFunc( i ) ).resolve, master.reject, + !remaining ); + + // Use .then() to unwrap secondary thenables (cf. gh-3000) + if ( master.state() === "pending" || + jQuery.isFunction( resolveValues[ i ] && resolveValues[ i ].then ) ) { + + return master.then(); + } + } + + // Multiple arguments are aggregated like Promise.all array elements + while ( i-- ) { + adoptValue( resolveValues[ i ], updateFunc( i ), master.reject ); + } + + return master.promise(); + } +} ); + + +// These usually indicate a programmer mistake during development, +// warn about them ASAP rather than swallowing them by default. +var rerrorNames = /^(Eval|Internal|Range|Reference|Syntax|Type|URI)Error$/; + +jQuery.Deferred.exceptionHook = function( error, stack ) { + + // Support: IE 8 - 9 only + // Console exists when dev tools are open, which can happen at any time + if ( window.console && window.console.warn && error && rerrorNames.test( error.name ) ) { + window.console.warn( "jQuery.Deferred exception: " + error.message, error.stack, stack ); + } +}; + + + + +jQuery.readyException = function( error ) { + window.setTimeout( function() { + throw error; + } ); +}; + + + + +// The deferred used on DOM ready +var readyList = jQuery.Deferred(); + +jQuery.fn.ready = function( fn ) { + + readyList + .then( fn ) + + // Wrap jQuery.readyException in a function so that the lookup + // happens at the time of error handling instead of callback + // registration. + .catch( function( error ) { + jQuery.readyException( error ); + } ); + + return this; +}; + +jQuery.extend( { + + // Is the DOM ready to be used? Set to true once it occurs. + isReady: false, + + // A counter to track how many items to wait for before + // the ready event fires. See #6781 + readyWait: 1, + + // Handle when the DOM is ready + ready: function( wait ) { + + // Abort if there are pending holds or we're already ready + if ( wait === true ? --jQuery.readyWait : jQuery.isReady ) { + return; + } + + // Remember that the DOM is ready + jQuery.isReady = true; + + // If a normal DOM Ready event fired, decrement, and wait if need be + if ( wait !== true && --jQuery.readyWait > 0 ) { + return; + } + + // If there are functions bound, to execute + readyList.resolveWith( document, [ jQuery ] ); + } +} ); + +jQuery.ready.then = readyList.then; + +// The ready event handler and self cleanup method +function completed() { + document.removeEventListener( "DOMContentLoaded", completed ); + window.removeEventListener( "load", completed ); + jQuery.ready(); +} + +// Catch cases where $(document).ready() is called +// after the browser event has already occurred. +// Support: IE <=9 - 10 only +// Older IE sometimes signals "interactive" too soon +if ( document.readyState === "complete" || + ( document.readyState !== "loading" && !document.documentElement.doScroll ) ) { + + // Handle it asynchronously to allow scripts the opportunity to delay ready + window.setTimeout( jQuery.ready ); + +} else { + + // Use the handy event callback + document.addEventListener( "DOMContentLoaded", completed ); + + // A fallback to window.onload, that will always work + window.addEventListener( "load", completed ); +} + + + + +// Multifunctional method to get and set values of a collection +// The value/s can optionally be executed if it's a function +var access = function( elems, fn, key, value, chainable, emptyGet, raw ) { + var i = 0, + len = elems.length, + bulk = key == null; + + // Sets many values + if ( jQuery.type( key ) === "object" ) { + chainable = true; + for ( i in key ) { + access( elems, fn, i, key[ i ], true, emptyGet, raw ); + } + + // Sets one value + } else if ( value !== undefined ) { + chainable = true; + + if ( !jQuery.isFunction( value ) ) { + raw = true; + } + + if ( bulk ) { + + // Bulk operations run against the entire set + if ( raw ) { + fn.call( elems, value ); + fn = null; + + // ...except when executing function values + } else { + bulk = fn; + fn = function( elem, key, value ) { + return bulk.call( jQuery( elem ), value ); + }; + } + } + + if ( fn ) { + for ( ; i < len; i++ ) { + fn( + elems[ i ], key, raw ? + value : + value.call( elems[ i ], i, fn( elems[ i ], key ) ) + ); + } + } + } + + if ( chainable ) { + return elems; + } + + // Gets + if ( bulk ) { + return fn.call( elems ); + } + + return len ? fn( elems[ 0 ], key ) : emptyGet; +}; +var acceptData = function( owner ) { + + // Accepts only: + // - Node + // - Node.ELEMENT_NODE + // - Node.DOCUMENT_NODE + // - Object + // - Any + return owner.nodeType === 1 || owner.nodeType === 9 || !( +owner.nodeType ); +}; + + + + +function Data() { + this.expando = jQuery.expando + Data.uid++; +} + +Data.uid = 1; + +Data.prototype = { + + cache: function( owner ) { + + // Check if the owner object already has a cache + var value = owner[ this.expando ]; + + // If not, create one + if ( !value ) { + value = {}; + + // We can accept data for non-element nodes in modern browsers, + // but we should not, see #8335. + // Always return an empty object. + if ( acceptData( owner ) ) { + + // If it is a node unlikely to be stringify-ed or looped over + // use plain assignment + if ( owner.nodeType ) { + owner[ this.expando ] = value; + + // Otherwise secure it in a non-enumerable property + // configurable must be true to allow the property to be + // deleted when data is removed + } else { + Object.defineProperty( owner, this.expando, { + value: value, + configurable: true + } ); + } + } + } + + return value; + }, + set: function( owner, data, value ) { + var prop, + cache = this.cache( owner ); + + // Handle: [ owner, key, value ] args + // Always use camelCase key (gh-2257) + if ( typeof data === "string" ) { + cache[ jQuery.camelCase( data ) ] = value; + + // Handle: [ owner, { properties } ] args + } else { + + // Copy the properties one-by-one to the cache object + for ( prop in data ) { + cache[ jQuery.camelCase( prop ) ] = data[ prop ]; + } + } + return cache; + }, + get: function( owner, key ) { + return key === undefined ? + this.cache( owner ) : + + // Always use camelCase key (gh-2257) + owner[ this.expando ] && owner[ this.expando ][ jQuery.camelCase( key ) ]; + }, + access: function( owner, key, value ) { + + // In cases where either: + // + // 1. No key was specified + // 2. A string key was specified, but no value provided + // + // Take the "read" path and allow the get method to determine + // which value to return, respectively either: + // + // 1. The entire cache object + // 2. The data stored at the key + // + if ( key === undefined || + ( ( key && typeof key === "string" ) && value === undefined ) ) { + + return this.get( owner, key ); + } + + // When the key is not a string, or both a key and value + // are specified, set or extend (existing objects) with either: + // + // 1. An object of properties + // 2. A key and value + // + this.set( owner, key, value ); + + // Since the "set" path can have two possible entry points + // return the expected data based on which path was taken[*] + return value !== undefined ? value : key; + }, + remove: function( owner, key ) { + var i, + cache = owner[ this.expando ]; + + if ( cache === undefined ) { + return; + } + + if ( key !== undefined ) { + + // Support array or space separated string of keys + if ( Array.isArray( key ) ) { + + // If key is an array of keys... + // We always set camelCase keys, so remove that. + key = key.map( jQuery.camelCase ); + } else { + key = jQuery.camelCase( key ); + + // If a key with the spaces exists, use it. + // Otherwise, create an array by matching non-whitespace + key = key in cache ? + [ key ] : + ( key.match( rnothtmlwhite ) || [] ); + } + + i = key.length; + + while ( i-- ) { + delete cache[ key[ i ] ]; + } + } + + // Remove the expando if there's no more data + if ( key === undefined || jQuery.isEmptyObject( cache ) ) { + + // Support: Chrome <=35 - 45 + // Webkit & Blink performance suffers when deleting properties + // from DOM nodes, so set to undefined instead + // https://bugs.chromium.org/p/chromium/issues/detail?id=378607 (bug restricted) + if ( owner.nodeType ) { + owner[ this.expando ] = undefined; + } else { + delete owner[ this.expando ]; + } + } + }, + hasData: function( owner ) { + var cache = owner[ this.expando ]; + return cache !== undefined && !jQuery.isEmptyObject( cache ); + } +}; +var dataPriv = new Data(); + +var dataUser = new Data(); + + + +// Implementation Summary +// +// 1. Enforce API surface and semantic compatibility with 1.9.x branch +// 2. Improve the module's maintainability by reducing the storage +// paths to a single mechanism. +// 3. Use the same single mechanism to support "private" and "user" data. +// 4. _Never_ expose "private" data to user code (TODO: Drop _data, _removeData) +// 5. Avoid exposing implementation details on user objects (eg. expando properties) +// 6. Provide a clear path for implementation upgrade to WeakMap in 2014 + +var rbrace = /^(?:\{[\w\W]*\}|\[[\w\W]*\])$/, + rmultiDash = /[A-Z]/g; + +function getData( data ) { + if ( data === "true" ) { + return true; + } + + if ( data === "false" ) { + return false; + } + + if ( data === "null" ) { + return null; + } + + // Only convert to a number if it doesn't change the string + if ( data === +data + "" ) { + return +data; + } + + if ( rbrace.test( data ) ) { + return JSON.parse( data ); + } + + return data; +} + +function dataAttr( elem, key, data ) { + var name; + + // If nothing was found internally, try to fetch any + // data from the HTML5 data-* attribute + if ( data === undefined && elem.nodeType === 1 ) { + name = "data-" + key.replace( rmultiDash, "-$&" ).toLowerCase(); + data = elem.getAttribute( name ); + + if ( typeof data === "string" ) { + try { + data = getData( data ); + } catch ( e ) {} + + // Make sure we set the data so it isn't changed later + dataUser.set( elem, key, data ); + } else { + data = undefined; + } + } + return data; +} + +jQuery.extend( { + hasData: function( elem ) { + return dataUser.hasData( elem ) || dataPriv.hasData( elem ); + }, + + data: function( elem, name, data ) { + return dataUser.access( elem, name, data ); + }, + + removeData: function( elem, name ) { + dataUser.remove( elem, name ); + }, + + // TODO: Now that all calls to _data and _removeData have been replaced + // with direct calls to dataPriv methods, these can be deprecated. + _data: function( elem, name, data ) { + return dataPriv.access( elem, name, data ); + }, + + _removeData: function( elem, name ) { + dataPriv.remove( elem, name ); + } +} ); + +jQuery.fn.extend( { + data: function( key, value ) { + var i, name, data, + elem = this[ 0 ], + attrs = elem && elem.attributes; + + // Gets all values + if ( key === undefined ) { + if ( this.length ) { + data = dataUser.get( elem ); + + if ( elem.nodeType === 1 && !dataPriv.get( elem, "hasDataAttrs" ) ) { + i = attrs.length; + while ( i-- ) { + + // Support: IE 11 only + // The attrs elements can be null (#14894) + if ( attrs[ i ] ) { + name = attrs[ i ].name; + if ( name.indexOf( "data-" ) === 0 ) { + name = jQuery.camelCase( name.slice( 5 ) ); + dataAttr( elem, name, data[ name ] ); + } + } + } + dataPriv.set( elem, "hasDataAttrs", true ); + } + } + + return data; + } + + // Sets multiple values + if ( typeof key === "object" ) { + return this.each( function() { + dataUser.set( this, key ); + } ); + } + + return access( this, function( value ) { + var data; + + // The calling jQuery object (element matches) is not empty + // (and therefore has an element appears at this[ 0 ]) and the + // `value` parameter was not undefined. An empty jQuery object + // will result in `undefined` for elem = this[ 0 ] which will + // throw an exception if an attempt to read a data cache is made. + if ( elem && value === undefined ) { + + // Attempt to get data from the cache + // The key will always be camelCased in Data + data = dataUser.get( elem, key ); + if ( data !== undefined ) { + return data; + } + + // Attempt to "discover" the data in + // HTML5 custom data-* attrs + data = dataAttr( elem, key ); + if ( data !== undefined ) { + return data; + } + + // We tried really hard, but the data doesn't exist. + return; + } + + // Set the data... + this.each( function() { + + // We always store the camelCased key + dataUser.set( this, key, value ); + } ); + }, null, value, arguments.length > 1, null, true ); + }, + + removeData: function( key ) { + return this.each( function() { + dataUser.remove( this, key ); + } ); + } +} ); + + +jQuery.extend( { + queue: function( elem, type, data ) { + var queue; + + if ( elem ) { + type = ( type || "fx" ) + "queue"; + queue = dataPriv.get( elem, type ); + + // Speed up dequeue by getting out quickly if this is just a lookup + if ( data ) { + if ( !queue || Array.isArray( data ) ) { + queue = dataPriv.access( elem, type, jQuery.makeArray( data ) ); + } else { + queue.push( data ); + } + } + return queue || []; + } + }, + + dequeue: function( elem, type ) { + type = type || "fx"; + + var queue = jQuery.queue( elem, type ), + startLength = queue.length, + fn = queue.shift(), + hooks = jQuery._queueHooks( elem, type ), + next = function() { + jQuery.dequeue( elem, type ); + }; + + // If the fx queue is dequeued, always remove the progress sentinel + if ( fn === "inprogress" ) { + fn = queue.shift(); + startLength--; + } + + if ( fn ) { + + // Add a progress sentinel to prevent the fx queue from being + // automatically dequeued + if ( type === "fx" ) { + queue.unshift( "inprogress" ); + } + + // Clear up the last queue stop function + delete hooks.stop; + fn.call( elem, next, hooks ); + } + + if ( !startLength && hooks ) { + hooks.empty.fire(); + } + }, + + // Not public - generate a queueHooks object, or return the current one + _queueHooks: function( elem, type ) { + var key = type + "queueHooks"; + return dataPriv.get( elem, key ) || dataPriv.access( elem, key, { + empty: jQuery.Callbacks( "once memory" ).add( function() { + dataPriv.remove( elem, [ type + "queue", key ] ); + } ) + } ); + } +} ); + +jQuery.fn.extend( { + queue: function( type, data ) { + var setter = 2; + + if ( typeof type !== "string" ) { + data = type; + type = "fx"; + setter--; + } + + if ( arguments.length < setter ) { + return jQuery.queue( this[ 0 ], type ); + } + + return data === undefined ? + this : + this.each( function() { + var queue = jQuery.queue( this, type, data ); + + // Ensure a hooks for this queue + jQuery._queueHooks( this, type ); + + if ( type === "fx" && queue[ 0 ] !== "inprogress" ) { + jQuery.dequeue( this, type ); + } + } ); + }, + dequeue: function( type ) { + return this.each( function() { + jQuery.dequeue( this, type ); + } ); + }, + clearQueue: function( type ) { + return this.queue( type || "fx", [] ); + }, + + // Get a promise resolved when queues of a certain type + // are emptied (fx is the type by default) + promise: function( type, obj ) { + var tmp, + count = 1, + defer = jQuery.Deferred(), + elements = this, + i = this.length, + resolve = function() { + if ( !( --count ) ) { + defer.resolveWith( elements, [ elements ] ); + } + }; + + if ( typeof type !== "string" ) { + obj = type; + type = undefined; + } + type = type || "fx"; + + while ( i-- ) { + tmp = dataPriv.get( elements[ i ], type + "queueHooks" ); + if ( tmp && tmp.empty ) { + count++; + tmp.empty.add( resolve ); + } + } + resolve(); + return defer.promise( obj ); + } +} ); +var pnum = ( /[+-]?(?:\d*\.|)\d+(?:[eE][+-]?\d+|)/ ).source; + +var rcssNum = new RegExp( "^(?:([+-])=|)(" + pnum + ")([a-z%]*)$", "i" ); + + +var cssExpand = [ "Top", "Right", "Bottom", "Left" ]; + +var isHiddenWithinTree = function( elem, el ) { + + // isHiddenWithinTree might be called from jQuery#filter function; + // in that case, element will be second argument + elem = el || elem; + + // Inline style trumps all + return elem.style.display === "none" || + elem.style.display === "" && + + // Otherwise, check computed style + // Support: Firefox <=43 - 45 + // Disconnected elements can have computed display: none, so first confirm that elem is + // in the document. + jQuery.contains( elem.ownerDocument, elem ) && + + jQuery.css( elem, "display" ) === "none"; + }; + +var swap = function( elem, options, callback, args ) { + var ret, name, + old = {}; + + // Remember the old values, and insert the new ones + for ( name in options ) { + old[ name ] = elem.style[ name ]; + elem.style[ name ] = options[ name ]; + } + + ret = callback.apply( elem, args || [] ); + + // Revert the old values + for ( name in options ) { + elem.style[ name ] = old[ name ]; + } + + return ret; +}; + + + + +function adjustCSS( elem, prop, valueParts, tween ) { + var adjusted, + scale = 1, + maxIterations = 20, + currentValue = tween ? + function() { + return tween.cur(); + } : + function() { + return jQuery.css( elem, prop, "" ); + }, + initial = currentValue(), + unit = valueParts && valueParts[ 3 ] || ( jQuery.cssNumber[ prop ] ? "" : "px" ), + + // Starting value computation is required for potential unit mismatches + initialInUnit = ( jQuery.cssNumber[ prop ] || unit !== "px" && +initial ) && + rcssNum.exec( jQuery.css( elem, prop ) ); + + if ( initialInUnit && initialInUnit[ 3 ] !== unit ) { + + // Trust units reported by jQuery.css + unit = unit || initialInUnit[ 3 ]; + + // Make sure we update the tween properties later on + valueParts = valueParts || []; + + // Iteratively approximate from a nonzero starting point + initialInUnit = +initial || 1; + + do { + + // If previous iteration zeroed out, double until we get *something*. + // Use string for doubling so we don't accidentally see scale as unchanged below + scale = scale || ".5"; + + // Adjust and apply + initialInUnit = initialInUnit / scale; + jQuery.style( elem, prop, initialInUnit + unit ); + + // Update scale, tolerating zero or NaN from tween.cur() + // Break the loop if scale is unchanged or perfect, or if we've just had enough. + } while ( + scale !== ( scale = currentValue() / initial ) && scale !== 1 && --maxIterations + ); + } + + if ( valueParts ) { + initialInUnit = +initialInUnit || +initial || 0; + + // Apply relative offset (+=/-=) if specified + adjusted = valueParts[ 1 ] ? + initialInUnit + ( valueParts[ 1 ] + 1 ) * valueParts[ 2 ] : + +valueParts[ 2 ]; + if ( tween ) { + tween.unit = unit; + tween.start = initialInUnit; + tween.end = adjusted; + } + } + return adjusted; +} + + +var defaultDisplayMap = {}; + +function getDefaultDisplay( elem ) { + var temp, + doc = elem.ownerDocument, + nodeName = elem.nodeName, + display = defaultDisplayMap[ nodeName ]; + + if ( display ) { + return display; + } + + temp = doc.body.appendChild( doc.createElement( nodeName ) ); + display = jQuery.css( temp, "display" ); + + temp.parentNode.removeChild( temp ); + + if ( display === "none" ) { + display = "block"; + } + defaultDisplayMap[ nodeName ] = display; + + return display; +} + +function showHide( elements, show ) { + var display, elem, + values = [], + index = 0, + length = elements.length; + + // Determine new display value for elements that need to change + for ( ; index < length; index++ ) { + elem = elements[ index ]; + if ( !elem.style ) { + continue; + } + + display = elem.style.display; + if ( show ) { + + // Since we force visibility upon cascade-hidden elements, an immediate (and slow) + // check is required in this first loop unless we have a nonempty display value (either + // inline or about-to-be-restored) + if ( display === "none" ) { + values[ index ] = dataPriv.get( elem, "display" ) || null; + if ( !values[ index ] ) { + elem.style.display = ""; + } + } + if ( elem.style.display === "" && isHiddenWithinTree( elem ) ) { + values[ index ] = getDefaultDisplay( elem ); + } + } else { + if ( display !== "none" ) { + values[ index ] = "none"; + + // Remember what we're overwriting + dataPriv.set( elem, "display", display ); + } + } + } + + // Set the display of the elements in a second loop to avoid constant reflow + for ( index = 0; index < length; index++ ) { + if ( values[ index ] != null ) { + elements[ index ].style.display = values[ index ]; + } + } + + return elements; +} + +jQuery.fn.extend( { + show: function() { + return showHide( this, true ); + }, + hide: function() { + return showHide( this ); + }, + toggle: function( state ) { + if ( typeof state === "boolean" ) { + return state ? this.show() : this.hide(); + } + + return this.each( function() { + if ( isHiddenWithinTree( this ) ) { + jQuery( this ).show(); + } else { + jQuery( this ).hide(); + } + } ); + } +} ); +var rcheckableType = ( /^(?:checkbox|radio)$/i ); + +var rtagName = ( /<([a-z][^\/\0>\x20\t\r\n\f]+)/i ); + +var rscriptType = ( /^$|\/(?:java|ecma)script/i ); + + + +// We have to close these tags to support XHTML (#13200) +var wrapMap = { + + // Support: IE <=9 only + option: [ 1, "" ], + + // XHTML parsers do not magically insert elements in the + // same way that tag soup parsers do. So we cannot shorten + // this by omitting or other required elements. + thead: [ 1, "", "
" ], + col: [ 2, "", "
" ], + tr: [ 2, "", "
" ], + td: [ 3, "", "
" ], + + _default: [ 0, "", "" ] +}; + +// Support: IE <=9 only +wrapMap.optgroup = wrapMap.option; + +wrapMap.tbody = wrapMap.tfoot = wrapMap.colgroup = wrapMap.caption = wrapMap.thead; +wrapMap.th = wrapMap.td; + + +function getAll( context, tag ) { + + // Support: IE <=9 - 11 only + // Use typeof to avoid zero-argument method invocation on host objects (#15151) + var ret; + + if ( typeof context.getElementsByTagName !== "undefined" ) { + ret = context.getElementsByTagName( tag || "*" ); + + } else if ( typeof context.querySelectorAll !== "undefined" ) { + ret = context.querySelectorAll( tag || "*" ); + + } else { + ret = []; + } + + if ( tag === undefined || tag && nodeName( context, tag ) ) { + return jQuery.merge( [ context ], ret ); + } + + return ret; +} + + +// Mark scripts as having already been evaluated +function setGlobalEval( elems, refElements ) { + var i = 0, + l = elems.length; + + for ( ; i < l; i++ ) { + dataPriv.set( + elems[ i ], + "globalEval", + !refElements || dataPriv.get( refElements[ i ], "globalEval" ) + ); + } +} + + +var rhtml = /<|&#?\w+;/; + +function buildFragment( elems, context, scripts, selection, ignored ) { + var elem, tmp, tag, wrap, contains, j, + fragment = context.createDocumentFragment(), + nodes = [], + i = 0, + l = elems.length; + + for ( ; i < l; i++ ) { + elem = elems[ i ]; + + if ( elem || elem === 0 ) { + + // Add nodes directly + if ( jQuery.type( elem ) === "object" ) { + + // Support: Android <=4.0 only, PhantomJS 1 only + // push.apply(_, arraylike) throws on ancient WebKit + jQuery.merge( nodes, elem.nodeType ? [ elem ] : elem ); + + // Convert non-html into a text node + } else if ( !rhtml.test( elem ) ) { + nodes.push( context.createTextNode( elem ) ); + + // Convert html into DOM nodes + } else { + tmp = tmp || fragment.appendChild( context.createElement( "div" ) ); + + // Deserialize a standard representation + tag = ( rtagName.exec( elem ) || [ "", "" ] )[ 1 ].toLowerCase(); + wrap = wrapMap[ tag ] || wrapMap._default; + tmp.innerHTML = wrap[ 1 ] + jQuery.htmlPrefilter( elem ) + wrap[ 2 ]; + + // Descend through wrappers to the right content + j = wrap[ 0 ]; + while ( j-- ) { + tmp = tmp.lastChild; + } + + // Support: Android <=4.0 only, PhantomJS 1 only + // push.apply(_, arraylike) throws on ancient WebKit + jQuery.merge( nodes, tmp.childNodes ); + + // Remember the top-level container + tmp = fragment.firstChild; + + // Ensure the created nodes are orphaned (#12392) + tmp.textContent = ""; + } + } + } + + // Remove wrapper from fragment + fragment.textContent = ""; + + i = 0; + while ( ( elem = nodes[ i++ ] ) ) { + + // Skip elements already in the context collection (trac-4087) + if ( selection && jQuery.inArray( elem, selection ) > -1 ) { + if ( ignored ) { + ignored.push( elem ); + } + continue; + } + + contains = jQuery.contains( elem.ownerDocument, elem ); + + // Append to fragment + tmp = getAll( fragment.appendChild( elem ), "script" ); + + // Preserve script evaluation history + if ( contains ) { + setGlobalEval( tmp ); + } + + // Capture executables + if ( scripts ) { + j = 0; + while ( ( elem = tmp[ j++ ] ) ) { + if ( rscriptType.test( elem.type || "" ) ) { + scripts.push( elem ); + } + } + } + } + + return fragment; +} + + +( function() { + var fragment = document.createDocumentFragment(), + div = fragment.appendChild( document.createElement( "div" ) ), + input = document.createElement( "input" ); + + // Support: Android 4.0 - 4.3 only + // Check state lost if the name is set (#11217) + // Support: Windows Web Apps (WWA) + // `name` and `type` must use .setAttribute for WWA (#14901) + input.setAttribute( "type", "radio" ); + input.setAttribute( "checked", "checked" ); + input.setAttribute( "name", "t" ); + + div.appendChild( input ); + + // Support: Android <=4.1 only + // Older WebKit doesn't clone checked state correctly in fragments + support.checkClone = div.cloneNode( true ).cloneNode( true ).lastChild.checked; + + // Support: IE <=11 only + // Make sure textarea (and checkbox) defaultValue is properly cloned + div.innerHTML = ""; + support.noCloneChecked = !!div.cloneNode( true ).lastChild.defaultValue; +} )(); +var documentElement = document.documentElement; + + + +var + rkeyEvent = /^key/, + rmouseEvent = /^(?:mouse|pointer|contextmenu|drag|drop)|click/, + rtypenamespace = /^([^.]*)(?:\.(.+)|)/; + +function returnTrue() { + return true; +} + +function returnFalse() { + return false; +} + +// Support: IE <=9 only +// See #13393 for more info +function safeActiveElement() { + try { + return document.activeElement; + } catch ( err ) { } +} + +function on( elem, types, selector, data, fn, one ) { + var origFn, type; + + // Types can be a map of types/handlers + if ( typeof types === "object" ) { + + // ( types-Object, selector, data ) + if ( typeof selector !== "string" ) { + + // ( types-Object, data ) + data = data || selector; + selector = undefined; + } + for ( type in types ) { + on( elem, type, selector, data, types[ type ], one ); + } + return elem; + } + + if ( data == null && fn == null ) { + + // ( types, fn ) + fn = selector; + data = selector = undefined; + } else if ( fn == null ) { + if ( typeof selector === "string" ) { + + // ( types, selector, fn ) + fn = data; + data = undefined; + } else { + + // ( types, data, fn ) + fn = data; + data = selector; + selector = undefined; + } + } + if ( fn === false ) { + fn = returnFalse; + } else if ( !fn ) { + return elem; + } + + if ( one === 1 ) { + origFn = fn; + fn = function( event ) { + + // Can use an empty set, since event contains the info + jQuery().off( event ); + return origFn.apply( this, arguments ); + }; + + // Use same guid so caller can remove using origFn + fn.guid = origFn.guid || ( origFn.guid = jQuery.guid++ ); + } + return elem.each( function() { + jQuery.event.add( this, types, fn, data, selector ); + } ); +} + +/* + * Helper functions for managing events -- not part of the public interface. + * Props to Dean Edwards' addEvent library for many of the ideas. + */ +jQuery.event = { + + global: {}, + + add: function( elem, types, handler, data, selector ) { + + var handleObjIn, eventHandle, tmp, + events, t, handleObj, + special, handlers, type, namespaces, origType, + elemData = dataPriv.get( elem ); + + // Don't attach events to noData or text/comment nodes (but allow plain objects) + if ( !elemData ) { + return; + } + + // Caller can pass in an object of custom data in lieu of the handler + if ( handler.handler ) { + handleObjIn = handler; + handler = handleObjIn.handler; + selector = handleObjIn.selector; + } + + // Ensure that invalid selectors throw exceptions at attach time + // Evaluate against documentElement in case elem is a non-element node (e.g., document) + if ( selector ) { + jQuery.find.matchesSelector( documentElement, selector ); + } + + // Make sure that the handler has a unique ID, used to find/remove it later + if ( !handler.guid ) { + handler.guid = jQuery.guid++; + } + + // Init the element's event structure and main handler, if this is the first + if ( !( events = elemData.events ) ) { + events = elemData.events = {}; + } + if ( !( eventHandle = elemData.handle ) ) { + eventHandle = elemData.handle = function( e ) { + + // Discard the second event of a jQuery.event.trigger() and + // when an event is called after a page has unloaded + return typeof jQuery !== "undefined" && jQuery.event.triggered !== e.type ? + jQuery.event.dispatch.apply( elem, arguments ) : undefined; + }; + } + + // Handle multiple events separated by a space + types = ( types || "" ).match( rnothtmlwhite ) || [ "" ]; + t = types.length; + while ( t-- ) { + tmp = rtypenamespace.exec( types[ t ] ) || []; + type = origType = tmp[ 1 ]; + namespaces = ( tmp[ 2 ] || "" ).split( "." ).sort(); + + // There *must* be a type, no attaching namespace-only handlers + if ( !type ) { + continue; + } + + // If event changes its type, use the special event handlers for the changed type + special = jQuery.event.special[ type ] || {}; + + // If selector defined, determine special event api type, otherwise given type + type = ( selector ? special.delegateType : special.bindType ) || type; + + // Update special based on newly reset type + special = jQuery.event.special[ type ] || {}; + + // handleObj is passed to all event handlers + handleObj = jQuery.extend( { + type: type, + origType: origType, + data: data, + handler: handler, + guid: handler.guid, + selector: selector, + needsContext: selector && jQuery.expr.match.needsContext.test( selector ), + namespace: namespaces.join( "." ) + }, handleObjIn ); + + // Init the event handler queue if we're the first + if ( !( handlers = events[ type ] ) ) { + handlers = events[ type ] = []; + handlers.delegateCount = 0; + + // Only use addEventListener if the special events handler returns false + if ( !special.setup || + special.setup.call( elem, data, namespaces, eventHandle ) === false ) { + + if ( elem.addEventListener ) { + elem.addEventListener( type, eventHandle ); + } + } + } + + if ( special.add ) { + special.add.call( elem, handleObj ); + + if ( !handleObj.handler.guid ) { + handleObj.handler.guid = handler.guid; + } + } + + // Add to the element's handler list, delegates in front + if ( selector ) { + handlers.splice( handlers.delegateCount++, 0, handleObj ); + } else { + handlers.push( handleObj ); + } + + // Keep track of which events have ever been used, for event optimization + jQuery.event.global[ type ] = true; + } + + }, + + // Detach an event or set of events from an element + remove: function( elem, types, handler, selector, mappedTypes ) { + + var j, origCount, tmp, + events, t, handleObj, + special, handlers, type, namespaces, origType, + elemData = dataPriv.hasData( elem ) && dataPriv.get( elem ); + + if ( !elemData || !( events = elemData.events ) ) { + return; + } + + // Once for each type.namespace in types; type may be omitted + types = ( types || "" ).match( rnothtmlwhite ) || [ "" ]; + t = types.length; + while ( t-- ) { + tmp = rtypenamespace.exec( types[ t ] ) || []; + type = origType = tmp[ 1 ]; + namespaces = ( tmp[ 2 ] || "" ).split( "." ).sort(); + + // Unbind all events (on this namespace, if provided) for the element + if ( !type ) { + for ( type in events ) { + jQuery.event.remove( elem, type + types[ t ], handler, selector, true ); + } + continue; + } + + special = jQuery.event.special[ type ] || {}; + type = ( selector ? special.delegateType : special.bindType ) || type; + handlers = events[ type ] || []; + tmp = tmp[ 2 ] && + new RegExp( "(^|\\.)" + namespaces.join( "\\.(?:.*\\.|)" ) + "(\\.|$)" ); + + // Remove matching events + origCount = j = handlers.length; + while ( j-- ) { + handleObj = handlers[ j ]; + + if ( ( mappedTypes || origType === handleObj.origType ) && + ( !handler || handler.guid === handleObj.guid ) && + ( !tmp || tmp.test( handleObj.namespace ) ) && + ( !selector || selector === handleObj.selector || + selector === "**" && handleObj.selector ) ) { + handlers.splice( j, 1 ); + + if ( handleObj.selector ) { + handlers.delegateCount--; + } + if ( special.remove ) { + special.remove.call( elem, handleObj ); + } + } + } + + // Remove generic event handler if we removed something and no more handlers exist + // (avoids potential for endless recursion during removal of special event handlers) + if ( origCount && !handlers.length ) { + if ( !special.teardown || + special.teardown.call( elem, namespaces, elemData.handle ) === false ) { + + jQuery.removeEvent( elem, type, elemData.handle ); + } + + delete events[ type ]; + } + } + + // Remove data and the expando if it's no longer used + if ( jQuery.isEmptyObject( events ) ) { + dataPriv.remove( elem, "handle events" ); + } + }, + + dispatch: function( nativeEvent ) { + + // Make a writable jQuery.Event from the native event object + var event = jQuery.event.fix( nativeEvent ); + + var i, j, ret, matched, handleObj, handlerQueue, + args = new Array( arguments.length ), + handlers = ( dataPriv.get( this, "events" ) || {} )[ event.type ] || [], + special = jQuery.event.special[ event.type ] || {}; + + // Use the fix-ed jQuery.Event rather than the (read-only) native event + args[ 0 ] = event; + + for ( i = 1; i < arguments.length; i++ ) { + args[ i ] = arguments[ i ]; + } + + event.delegateTarget = this; + + // Call the preDispatch hook for the mapped type, and let it bail if desired + if ( special.preDispatch && special.preDispatch.call( this, event ) === false ) { + return; + } + + // Determine handlers + handlerQueue = jQuery.event.handlers.call( this, event, handlers ); + + // Run delegates first; they may want to stop propagation beneath us + i = 0; + while ( ( matched = handlerQueue[ i++ ] ) && !event.isPropagationStopped() ) { + event.currentTarget = matched.elem; + + j = 0; + while ( ( handleObj = matched.handlers[ j++ ] ) && + !event.isImmediatePropagationStopped() ) { + + // Triggered event must either 1) have no namespace, or 2) have namespace(s) + // a subset or equal to those in the bound event (both can have no namespace). + if ( !event.rnamespace || event.rnamespace.test( handleObj.namespace ) ) { + + event.handleObj = handleObj; + event.data = handleObj.data; + + ret = ( ( jQuery.event.special[ handleObj.origType ] || {} ).handle || + handleObj.handler ).apply( matched.elem, args ); + + if ( ret !== undefined ) { + if ( ( event.result = ret ) === false ) { + event.preventDefault(); + event.stopPropagation(); + } + } + } + } + } + + // Call the postDispatch hook for the mapped type + if ( special.postDispatch ) { + special.postDispatch.call( this, event ); + } + + return event.result; + }, + + handlers: function( event, handlers ) { + var i, handleObj, sel, matchedHandlers, matchedSelectors, + handlerQueue = [], + delegateCount = handlers.delegateCount, + cur = event.target; + + // Find delegate handlers + if ( delegateCount && + + // Support: IE <=9 + // Black-hole SVG instance trees (trac-13180) + cur.nodeType && + + // Support: Firefox <=42 + // Suppress spec-violating clicks indicating a non-primary pointer button (trac-3861) + // https://www.w3.org/TR/DOM-Level-3-Events/#event-type-click + // Support: IE 11 only + // ...but not arrow key "clicks" of radio inputs, which can have `button` -1 (gh-2343) + !( event.type === "click" && event.button >= 1 ) ) { + + for ( ; cur !== this; cur = cur.parentNode || this ) { + + // Don't check non-elements (#13208) + // Don't process clicks on disabled elements (#6911, #8165, #11382, #11764) + if ( cur.nodeType === 1 && !( event.type === "click" && cur.disabled === true ) ) { + matchedHandlers = []; + matchedSelectors = {}; + for ( i = 0; i < delegateCount; i++ ) { + handleObj = handlers[ i ]; + + // Don't conflict with Object.prototype properties (#13203) + sel = handleObj.selector + " "; + + if ( matchedSelectors[ sel ] === undefined ) { + matchedSelectors[ sel ] = handleObj.needsContext ? + jQuery( sel, this ).index( cur ) > -1 : + jQuery.find( sel, this, null, [ cur ] ).length; + } + if ( matchedSelectors[ sel ] ) { + matchedHandlers.push( handleObj ); + } + } + if ( matchedHandlers.length ) { + handlerQueue.push( { elem: cur, handlers: matchedHandlers } ); + } + } + } + } + + // Add the remaining (directly-bound) handlers + cur = this; + if ( delegateCount < handlers.length ) { + handlerQueue.push( { elem: cur, handlers: handlers.slice( delegateCount ) } ); + } + + return handlerQueue; + }, + + addProp: function( name, hook ) { + Object.defineProperty( jQuery.Event.prototype, name, { + enumerable: true, + configurable: true, + + get: jQuery.isFunction( hook ) ? + function() { + if ( this.originalEvent ) { + return hook( this.originalEvent ); + } + } : + function() { + if ( this.originalEvent ) { + return this.originalEvent[ name ]; + } + }, + + set: function( value ) { + Object.defineProperty( this, name, { + enumerable: true, + configurable: true, + writable: true, + value: value + } ); + } + } ); + }, + + fix: function( originalEvent ) { + return originalEvent[ jQuery.expando ] ? + originalEvent : + new jQuery.Event( originalEvent ); + }, + + special: { + load: { + + // Prevent triggered image.load events from bubbling to window.load + noBubble: true + }, + focus: { + + // Fire native event if possible so blur/focus sequence is correct + trigger: function() { + if ( this !== safeActiveElement() && this.focus ) { + this.focus(); + return false; + } + }, + delegateType: "focusin" + }, + blur: { + trigger: function() { + if ( this === safeActiveElement() && this.blur ) { + this.blur(); + return false; + } + }, + delegateType: "focusout" + }, + click: { + + // For checkbox, fire native event so checked state will be right + trigger: function() { + if ( this.type === "checkbox" && this.click && nodeName( this, "input" ) ) { + this.click(); + return false; + } + }, + + // For cross-browser consistency, don't fire native .click() on links + _default: function( event ) { + return nodeName( event.target, "a" ); + } + }, + + beforeunload: { + postDispatch: function( event ) { + + // Support: Firefox 20+ + // Firefox doesn't alert if the returnValue field is not set. + if ( event.result !== undefined && event.originalEvent ) { + event.originalEvent.returnValue = event.result; + } + } + } + } +}; + +jQuery.removeEvent = function( elem, type, handle ) { + + // This "if" is needed for plain objects + if ( elem.removeEventListener ) { + elem.removeEventListener( type, handle ); + } +}; + +jQuery.Event = function( src, props ) { + + // Allow instantiation without the 'new' keyword + if ( !( this instanceof jQuery.Event ) ) { + return new jQuery.Event( src, props ); + } + + // Event object + if ( src && src.type ) { + this.originalEvent = src; + this.type = src.type; + + // Events bubbling up the document may have been marked as prevented + // by a handler lower down the tree; reflect the correct value. + this.isDefaultPrevented = src.defaultPrevented || + src.defaultPrevented === undefined && + + // Support: Android <=2.3 only + src.returnValue === false ? + returnTrue : + returnFalse; + + // Create target properties + // Support: Safari <=6 - 7 only + // Target should not be a text node (#504, #13143) + this.target = ( src.target && src.target.nodeType === 3 ) ? + src.target.parentNode : + src.target; + + this.currentTarget = src.currentTarget; + this.relatedTarget = src.relatedTarget; + + // Event type + } else { + this.type = src; + } + + // Put explicitly provided properties onto the event object + if ( props ) { + jQuery.extend( this, props ); + } + + // Create a timestamp if incoming event doesn't have one + this.timeStamp = src && src.timeStamp || jQuery.now(); + + // Mark it as fixed + this[ jQuery.expando ] = true; +}; + +// jQuery.Event is based on DOM3 Events as specified by the ECMAScript Language Binding +// https://www.w3.org/TR/2003/WD-DOM-Level-3-Events-20030331/ecma-script-binding.html +jQuery.Event.prototype = { + constructor: jQuery.Event, + isDefaultPrevented: returnFalse, + isPropagationStopped: returnFalse, + isImmediatePropagationStopped: returnFalse, + isSimulated: false, + + preventDefault: function() { + var e = this.originalEvent; + + this.isDefaultPrevented = returnTrue; + + if ( e && !this.isSimulated ) { + e.preventDefault(); + } + }, + stopPropagation: function() { + var e = this.originalEvent; + + this.isPropagationStopped = returnTrue; + + if ( e && !this.isSimulated ) { + e.stopPropagation(); + } + }, + stopImmediatePropagation: function() { + var e = this.originalEvent; + + this.isImmediatePropagationStopped = returnTrue; + + if ( e && !this.isSimulated ) { + e.stopImmediatePropagation(); + } + + this.stopPropagation(); + } +}; + +// Includes all common event props including KeyEvent and MouseEvent specific props +jQuery.each( { + altKey: true, + bubbles: true, + cancelable: true, + changedTouches: true, + ctrlKey: true, + detail: true, + eventPhase: true, + metaKey: true, + pageX: true, + pageY: true, + shiftKey: true, + view: true, + "char": true, + charCode: true, + key: true, + keyCode: true, + button: true, + buttons: true, + clientX: true, + clientY: true, + offsetX: true, + offsetY: true, + pointerId: true, + pointerType: true, + screenX: true, + screenY: true, + targetTouches: true, + toElement: true, + touches: true, + + which: function( event ) { + var button = event.button; + + // Add which for key events + if ( event.which == null && rkeyEvent.test( event.type ) ) { + return event.charCode != null ? event.charCode : event.keyCode; + } + + // Add which for click: 1 === left; 2 === middle; 3 === right + if ( !event.which && button !== undefined && rmouseEvent.test( event.type ) ) { + if ( button & 1 ) { + return 1; + } + + if ( button & 2 ) { + return 3; + } + + if ( button & 4 ) { + return 2; + } + + return 0; + } + + return event.which; + } +}, jQuery.event.addProp ); + +// Create mouseenter/leave events using mouseover/out and event-time checks +// so that event delegation works in jQuery. +// Do the same for pointerenter/pointerleave and pointerover/pointerout +// +// Support: Safari 7 only +// Safari sends mouseenter too often; see: +// https://bugs.chromium.org/p/chromium/issues/detail?id=470258 +// for the description of the bug (it existed in older Chrome versions as well). +jQuery.each( { + mouseenter: "mouseover", + mouseleave: "mouseout", + pointerenter: "pointerover", + pointerleave: "pointerout" +}, function( orig, fix ) { + jQuery.event.special[ orig ] = { + delegateType: fix, + bindType: fix, + + handle: function( event ) { + var ret, + target = this, + related = event.relatedTarget, + handleObj = event.handleObj; + + // For mouseenter/leave call the handler if related is outside the target. + // NB: No relatedTarget if the mouse left/entered the browser window + if ( !related || ( related !== target && !jQuery.contains( target, related ) ) ) { + event.type = handleObj.origType; + ret = handleObj.handler.apply( this, arguments ); + event.type = fix; + } + return ret; + } + }; +} ); + +jQuery.fn.extend( { + + on: function( types, selector, data, fn ) { + return on( this, types, selector, data, fn ); + }, + one: function( types, selector, data, fn ) { + return on( this, types, selector, data, fn, 1 ); + }, + off: function( types, selector, fn ) { + var handleObj, type; + if ( types && types.preventDefault && types.handleObj ) { + + // ( event ) dispatched jQuery.Event + handleObj = types.handleObj; + jQuery( types.delegateTarget ).off( + handleObj.namespace ? + handleObj.origType + "." + handleObj.namespace : + handleObj.origType, + handleObj.selector, + handleObj.handler + ); + return this; + } + if ( typeof types === "object" ) { + + // ( types-object [, selector] ) + for ( type in types ) { + this.off( type, selector, types[ type ] ); + } + return this; + } + if ( selector === false || typeof selector === "function" ) { + + // ( types [, fn] ) + fn = selector; + selector = undefined; + } + if ( fn === false ) { + fn = returnFalse; + } + return this.each( function() { + jQuery.event.remove( this, types, fn, selector ); + } ); + } +} ); + + +var + + /* eslint-disable max-len */ + + // See https://github.com/eslint/eslint/issues/3229 + rxhtmlTag = /<(?!area|br|col|embed|hr|img|input|link|meta|param)(([a-z][^\/\0>\x20\t\r\n\f]*)[^>]*)\/>/gi, + + /* eslint-enable */ + + // Support: IE <=10 - 11, Edge 12 - 13 + // In IE/Edge using regex groups here causes severe slowdowns. + // See https://connect.microsoft.com/IE/feedback/details/1736512/ + rnoInnerhtml = /\s*$/g; + +// Prefer a tbody over its parent table for containing new rows +function manipulationTarget( elem, content ) { + if ( nodeName( elem, "table" ) && + nodeName( content.nodeType !== 11 ? content : content.firstChild, "tr" ) ) { + + return jQuery( ">tbody", elem )[ 0 ] || elem; + } + + return elem; +} + +// Replace/restore the type attribute of script elements for safe DOM manipulation +function disableScript( elem ) { + elem.type = ( elem.getAttribute( "type" ) !== null ) + "/" + elem.type; + return elem; +} +function restoreScript( elem ) { + var match = rscriptTypeMasked.exec( elem.type ); + + if ( match ) { + elem.type = match[ 1 ]; + } else { + elem.removeAttribute( "type" ); + } + + return elem; +} + +function cloneCopyEvent( src, dest ) { + var i, l, type, pdataOld, pdataCur, udataOld, udataCur, events; + + if ( dest.nodeType !== 1 ) { + return; + } + + // 1. Copy private data: events, handlers, etc. + if ( dataPriv.hasData( src ) ) { + pdataOld = dataPriv.access( src ); + pdataCur = dataPriv.set( dest, pdataOld ); + events = pdataOld.events; + + if ( events ) { + delete pdataCur.handle; + pdataCur.events = {}; + + for ( type in events ) { + for ( i = 0, l = events[ type ].length; i < l; i++ ) { + jQuery.event.add( dest, type, events[ type ][ i ] ); + } + } + } + } + + // 2. Copy user data + if ( dataUser.hasData( src ) ) { + udataOld = dataUser.access( src ); + udataCur = jQuery.extend( {}, udataOld ); + + dataUser.set( dest, udataCur ); + } +} + +// Fix IE bugs, see support tests +function fixInput( src, dest ) { + var nodeName = dest.nodeName.toLowerCase(); + + // Fails to persist the checked state of a cloned checkbox or radio button. + if ( nodeName === "input" && rcheckableType.test( src.type ) ) { + dest.checked = src.checked; + + // Fails to return the selected option to the default selected state when cloning options + } else if ( nodeName === "input" || nodeName === "textarea" ) { + dest.defaultValue = src.defaultValue; + } +} + +function domManip( collection, args, callback, ignored ) { + + // Flatten any nested arrays + args = concat.apply( [], args ); + + var fragment, first, scripts, hasScripts, node, doc, + i = 0, + l = collection.length, + iNoClone = l - 1, + value = args[ 0 ], + isFunction = jQuery.isFunction( value ); + + // We can't cloneNode fragments that contain checked, in WebKit + if ( isFunction || + ( l > 1 && typeof value === "string" && + !support.checkClone && rchecked.test( value ) ) ) { + return collection.each( function( index ) { + var self = collection.eq( index ); + if ( isFunction ) { + args[ 0 ] = value.call( this, index, self.html() ); + } + domManip( self, args, callback, ignored ); + } ); + } + + if ( l ) { + fragment = buildFragment( args, collection[ 0 ].ownerDocument, false, collection, ignored ); + first = fragment.firstChild; + + if ( fragment.childNodes.length === 1 ) { + fragment = first; + } + + // Require either new content or an interest in ignored elements to invoke the callback + if ( first || ignored ) { + scripts = jQuery.map( getAll( fragment, "script" ), disableScript ); + hasScripts = scripts.length; + + // Use the original fragment for the last item + // instead of the first because it can end up + // being emptied incorrectly in certain situations (#8070). + for ( ; i < l; i++ ) { + node = fragment; + + if ( i !== iNoClone ) { + node = jQuery.clone( node, true, true ); + + // Keep references to cloned scripts for later restoration + if ( hasScripts ) { + + // Support: Android <=4.0 only, PhantomJS 1 only + // push.apply(_, arraylike) throws on ancient WebKit + jQuery.merge( scripts, getAll( node, "script" ) ); + } + } + + callback.call( collection[ i ], node, i ); + } + + if ( hasScripts ) { + doc = scripts[ scripts.length - 1 ].ownerDocument; + + // Reenable scripts + jQuery.map( scripts, restoreScript ); + + // Evaluate executable scripts on first document insertion + for ( i = 0; i < hasScripts; i++ ) { + node = scripts[ i ]; + if ( rscriptType.test( node.type || "" ) && + !dataPriv.access( node, "globalEval" ) && + jQuery.contains( doc, node ) ) { + + if ( node.src ) { + + // Optional AJAX dependency, but won't run scripts if not present + if ( jQuery._evalUrl ) { + jQuery._evalUrl( node.src ); + } + } else { + DOMEval( node.textContent.replace( rcleanScript, "" ), doc ); + } + } + } + } + } + } + + return collection; +} + +function remove( elem, selector, keepData ) { + var node, + nodes = selector ? jQuery.filter( selector, elem ) : elem, + i = 0; + + for ( ; ( node = nodes[ i ] ) != null; i++ ) { + if ( !keepData && node.nodeType === 1 ) { + jQuery.cleanData( getAll( node ) ); + } + + if ( node.parentNode ) { + if ( keepData && jQuery.contains( node.ownerDocument, node ) ) { + setGlobalEval( getAll( node, "script" ) ); + } + node.parentNode.removeChild( node ); + } + } + + return elem; +} + +jQuery.extend( { + htmlPrefilter: function( html ) { + return html.replace( rxhtmlTag, "<$1>" ); + }, + + clone: function( elem, dataAndEvents, deepDataAndEvents ) { + var i, l, srcElements, destElements, + clone = elem.cloneNode( true ), + inPage = jQuery.contains( elem.ownerDocument, elem ); + + // Fix IE cloning issues + if ( !support.noCloneChecked && ( elem.nodeType === 1 || elem.nodeType === 11 ) && + !jQuery.isXMLDoc( elem ) ) { + + // We eschew Sizzle here for performance reasons: https://jsperf.com/getall-vs-sizzle/2 + destElements = getAll( clone ); + srcElements = getAll( elem ); + + for ( i = 0, l = srcElements.length; i < l; i++ ) { + fixInput( srcElements[ i ], destElements[ i ] ); + } + } + + // Copy the events from the original to the clone + if ( dataAndEvents ) { + if ( deepDataAndEvents ) { + srcElements = srcElements || getAll( elem ); + destElements = destElements || getAll( clone ); + + for ( i = 0, l = srcElements.length; i < l; i++ ) { + cloneCopyEvent( srcElements[ i ], destElements[ i ] ); + } + } else { + cloneCopyEvent( elem, clone ); + } + } + + // Preserve script evaluation history + destElements = getAll( clone, "script" ); + if ( destElements.length > 0 ) { + setGlobalEval( destElements, !inPage && getAll( elem, "script" ) ); + } + + // Return the cloned set + return clone; + }, + + cleanData: function( elems ) { + var data, elem, type, + special = jQuery.event.special, + i = 0; + + for ( ; ( elem = elems[ i ] ) !== undefined; i++ ) { + if ( acceptData( elem ) ) { + if ( ( data = elem[ dataPriv.expando ] ) ) { + if ( data.events ) { + for ( type in data.events ) { + if ( special[ type ] ) { + jQuery.event.remove( elem, type ); + + // This is a shortcut to avoid jQuery.event.remove's overhead + } else { + jQuery.removeEvent( elem, type, data.handle ); + } + } + } + + // Support: Chrome <=35 - 45+ + // Assign undefined instead of using delete, see Data#remove + elem[ dataPriv.expando ] = undefined; + } + if ( elem[ dataUser.expando ] ) { + + // Support: Chrome <=35 - 45+ + // Assign undefined instead of using delete, see Data#remove + elem[ dataUser.expando ] = undefined; + } + } + } + } +} ); + +jQuery.fn.extend( { + detach: function( selector ) { + return remove( this, selector, true ); + }, + + remove: function( selector ) { + return remove( this, selector ); + }, + + text: function( value ) { + return access( this, function( value ) { + return value === undefined ? + jQuery.text( this ) : + this.empty().each( function() { + if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) { + this.textContent = value; + } + } ); + }, null, value, arguments.length ); + }, + + append: function() { + return domManip( this, arguments, function( elem ) { + if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) { + var target = manipulationTarget( this, elem ); + target.appendChild( elem ); + } + } ); + }, + + prepend: function() { + return domManip( this, arguments, function( elem ) { + if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) { + var target = manipulationTarget( this, elem ); + target.insertBefore( elem, target.firstChild ); + } + } ); + }, + + before: function() { + return domManip( this, arguments, function( elem ) { + if ( this.parentNode ) { + this.parentNode.insertBefore( elem, this ); + } + } ); + }, + + after: function() { + return domManip( this, arguments, function( elem ) { + if ( this.parentNode ) { + this.parentNode.insertBefore( elem, this.nextSibling ); + } + } ); + }, + + empty: function() { + var elem, + i = 0; + + for ( ; ( elem = this[ i ] ) != null; i++ ) { + if ( elem.nodeType === 1 ) { + + // Prevent memory leaks + jQuery.cleanData( getAll( elem, false ) ); + + // Remove any remaining nodes + elem.textContent = ""; + } + } + + return this; + }, + + clone: function( dataAndEvents, deepDataAndEvents ) { + dataAndEvents = dataAndEvents == null ? false : dataAndEvents; + deepDataAndEvents = deepDataAndEvents == null ? dataAndEvents : deepDataAndEvents; + + return this.map( function() { + return jQuery.clone( this, dataAndEvents, deepDataAndEvents ); + } ); + }, + + html: function( value ) { + return access( this, function( value ) { + var elem = this[ 0 ] || {}, + i = 0, + l = this.length; + + if ( value === undefined && elem.nodeType === 1 ) { + return elem.innerHTML; + } + + // See if we can take a shortcut and just use innerHTML + if ( typeof value === "string" && !rnoInnerhtml.test( value ) && + !wrapMap[ ( rtagName.exec( value ) || [ "", "" ] )[ 1 ].toLowerCase() ] ) { + + value = jQuery.htmlPrefilter( value ); + + try { + for ( ; i < l; i++ ) { + elem = this[ i ] || {}; + + // Remove element nodes and prevent memory leaks + if ( elem.nodeType === 1 ) { + jQuery.cleanData( getAll( elem, false ) ); + elem.innerHTML = value; + } + } + + elem = 0; + + // If using innerHTML throws an exception, use the fallback method + } catch ( e ) {} + } + + if ( elem ) { + this.empty().append( value ); + } + }, null, value, arguments.length ); + }, + + replaceWith: function() { + var ignored = []; + + // Make the changes, replacing each non-ignored context element with the new content + return domManip( this, arguments, function( elem ) { + var parent = this.parentNode; + + if ( jQuery.inArray( this, ignored ) < 0 ) { + jQuery.cleanData( getAll( this ) ); + if ( parent ) { + parent.replaceChild( elem, this ); + } + } + + // Force callback invocation + }, ignored ); + } +} ); + +jQuery.each( { + appendTo: "append", + prependTo: "prepend", + insertBefore: "before", + insertAfter: "after", + replaceAll: "replaceWith" +}, function( name, original ) { + jQuery.fn[ name ] = function( selector ) { + var elems, + ret = [], + insert = jQuery( selector ), + last = insert.length - 1, + i = 0; + + for ( ; i <= last; i++ ) { + elems = i === last ? this : this.clone( true ); + jQuery( insert[ i ] )[ original ]( elems ); + + // Support: Android <=4.0 only, PhantomJS 1 only + // .get() because push.apply(_, arraylike) throws on ancient WebKit + push.apply( ret, elems.get() ); + } + + return this.pushStack( ret ); + }; +} ); +var rmargin = ( /^margin/ ); + +var rnumnonpx = new RegExp( "^(" + pnum + ")(?!px)[a-z%]+$", "i" ); + +var getStyles = function( elem ) { + + // Support: IE <=11 only, Firefox <=30 (#15098, #14150) + // IE throws on elements created in popups + // FF meanwhile throws on frame elements through "defaultView.getComputedStyle" + var view = elem.ownerDocument.defaultView; + + if ( !view || !view.opener ) { + view = window; + } + + return view.getComputedStyle( elem ); + }; + + + +( function() { + + // Executing both pixelPosition & boxSizingReliable tests require only one layout + // so they're executed at the same time to save the second computation. + function computeStyleTests() { + + // This is a singleton, we need to execute it only once + if ( !div ) { + return; + } + + div.style.cssText = + "box-sizing:border-box;" + + "position:relative;display:block;" + + "margin:auto;border:1px;padding:1px;" + + "top:1%;width:50%"; + div.innerHTML = ""; + documentElement.appendChild( container ); + + var divStyle = window.getComputedStyle( div ); + pixelPositionVal = divStyle.top !== "1%"; + + // Support: Android 4.0 - 4.3 only, Firefox <=3 - 44 + reliableMarginLeftVal = divStyle.marginLeft === "2px"; + boxSizingReliableVal = divStyle.width === "4px"; + + // Support: Android 4.0 - 4.3 only + // Some styles come back with percentage values, even though they shouldn't + div.style.marginRight = "50%"; + pixelMarginRightVal = divStyle.marginRight === "4px"; + + documentElement.removeChild( container ); + + // Nullify the div so it wouldn't be stored in the memory and + // it will also be a sign that checks already performed + div = null; + } + + var pixelPositionVal, boxSizingReliableVal, pixelMarginRightVal, reliableMarginLeftVal, + container = document.createElement( "div" ), + div = document.createElement( "div" ); + + // Finish early in limited (non-browser) environments + if ( !div.style ) { + return; + } + + // Support: IE <=9 - 11 only + // Style of cloned element affects source element cloned (#8908) + div.style.backgroundClip = "content-box"; + div.cloneNode( true ).style.backgroundClip = ""; + support.clearCloneStyle = div.style.backgroundClip === "content-box"; + + container.style.cssText = "border:0;width:8px;height:0;top:0;left:-9999px;" + + "padding:0;margin-top:1px;position:absolute"; + container.appendChild( div ); + + jQuery.extend( support, { + pixelPosition: function() { + computeStyleTests(); + return pixelPositionVal; + }, + boxSizingReliable: function() { + computeStyleTests(); + return boxSizingReliableVal; + }, + pixelMarginRight: function() { + computeStyleTests(); + return pixelMarginRightVal; + }, + reliableMarginLeft: function() { + computeStyleTests(); + return reliableMarginLeftVal; + } + } ); +} )(); + + +function curCSS( elem, name, computed ) { + var width, minWidth, maxWidth, ret, + + // Support: Firefox 51+ + // Retrieving style before computed somehow + // fixes an issue with getting wrong values + // on detached elements + style = elem.style; + + computed = computed || getStyles( elem ); + + // getPropertyValue is needed for: + // .css('filter') (IE 9 only, #12537) + // .css('--customProperty) (#3144) + if ( computed ) { + ret = computed.getPropertyValue( name ) || computed[ name ]; + + if ( ret === "" && !jQuery.contains( elem.ownerDocument, elem ) ) { + ret = jQuery.style( elem, name ); + } + + // A tribute to the "awesome hack by Dean Edwards" + // Android Browser returns percentage for some values, + // but width seems to be reliably pixels. + // This is against the CSSOM draft spec: + // https://drafts.csswg.org/cssom/#resolved-values + if ( !support.pixelMarginRight() && rnumnonpx.test( ret ) && rmargin.test( name ) ) { + + // Remember the original values + width = style.width; + minWidth = style.minWidth; + maxWidth = style.maxWidth; + + // Put in the new values to get a computed value out + style.minWidth = style.maxWidth = style.width = ret; + ret = computed.width; + + // Revert the changed values + style.width = width; + style.minWidth = minWidth; + style.maxWidth = maxWidth; + } + } + + return ret !== undefined ? + + // Support: IE <=9 - 11 only + // IE returns zIndex value as an integer. + ret + "" : + ret; +} + + +function addGetHookIf( conditionFn, hookFn ) { + + // Define the hook, we'll check on the first run if it's really needed. + return { + get: function() { + if ( conditionFn() ) { + + // Hook not needed (or it's not possible to use it due + // to missing dependency), remove it. + delete this.get; + return; + } + + // Hook needed; redefine it so that the support test is not executed again. + return ( this.get = hookFn ).apply( this, arguments ); + } + }; +} + + +var + + // Swappable if display is none or starts with table + // except "table", "table-cell", or "table-caption" + // See here for display values: https://developer.mozilla.org/en-US/docs/CSS/display + rdisplayswap = /^(none|table(?!-c[ea]).+)/, + rcustomProp = /^--/, + cssShow = { position: "absolute", visibility: "hidden", display: "block" }, + cssNormalTransform = { + letterSpacing: "0", + fontWeight: "400" + }, + + cssPrefixes = [ "Webkit", "Moz", "ms" ], + emptyStyle = document.createElement( "div" ).style; + +// Return a css property mapped to a potentially vendor prefixed property +function vendorPropName( name ) { + + // Shortcut for names that are not vendor prefixed + if ( name in emptyStyle ) { + return name; + } + + // Check for vendor prefixed names + var capName = name[ 0 ].toUpperCase() + name.slice( 1 ), + i = cssPrefixes.length; + + while ( i-- ) { + name = cssPrefixes[ i ] + capName; + if ( name in emptyStyle ) { + return name; + } + } +} + +// Return a property mapped along what jQuery.cssProps suggests or to +// a vendor prefixed property. +function finalPropName( name ) { + var ret = jQuery.cssProps[ name ]; + if ( !ret ) { + ret = jQuery.cssProps[ name ] = vendorPropName( name ) || name; + } + return ret; +} + +function setPositiveNumber( elem, value, subtract ) { + + // Any relative (+/-) values have already been + // normalized at this point + var matches = rcssNum.exec( value ); + return matches ? + + // Guard against undefined "subtract", e.g., when used as in cssHooks + Math.max( 0, matches[ 2 ] - ( subtract || 0 ) ) + ( matches[ 3 ] || "px" ) : + value; +} + +function augmentWidthOrHeight( elem, name, extra, isBorderBox, styles ) { + var i, + val = 0; + + // If we already have the right measurement, avoid augmentation + if ( extra === ( isBorderBox ? "border" : "content" ) ) { + i = 4; + + // Otherwise initialize for horizontal or vertical properties + } else { + i = name === "width" ? 1 : 0; + } + + for ( ; i < 4; i += 2 ) { + + // Both box models exclude margin, so add it if we want it + if ( extra === "margin" ) { + val += jQuery.css( elem, extra + cssExpand[ i ], true, styles ); + } + + if ( isBorderBox ) { + + // border-box includes padding, so remove it if we want content + if ( extra === "content" ) { + val -= jQuery.css( elem, "padding" + cssExpand[ i ], true, styles ); + } + + // At this point, extra isn't border nor margin, so remove border + if ( extra !== "margin" ) { + val -= jQuery.css( elem, "border" + cssExpand[ i ] + "Width", true, styles ); + } + } else { + + // At this point, extra isn't content, so add padding + val += jQuery.css( elem, "padding" + cssExpand[ i ], true, styles ); + + // At this point, extra isn't content nor padding, so add border + if ( extra !== "padding" ) { + val += jQuery.css( elem, "border" + cssExpand[ i ] + "Width", true, styles ); + } + } + } + + return val; +} + +function getWidthOrHeight( elem, name, extra ) { + + // Start with computed style + var valueIsBorderBox, + styles = getStyles( elem ), + val = curCSS( elem, name, styles ), + isBorderBox = jQuery.css( elem, "boxSizing", false, styles ) === "border-box"; + + // Computed unit is not pixels. Stop here and return. + if ( rnumnonpx.test( val ) ) { + return val; + } + + // Check for style in case a browser which returns unreliable values + // for getComputedStyle silently falls back to the reliable elem.style + valueIsBorderBox = isBorderBox && + ( support.boxSizingReliable() || val === elem.style[ name ] ); + + // Fall back to offsetWidth/Height when value is "auto" + // This happens for inline elements with no explicit setting (gh-3571) + if ( val === "auto" ) { + val = elem[ "offset" + name[ 0 ].toUpperCase() + name.slice( 1 ) ]; + } + + // Normalize "", auto, and prepare for extra + val = parseFloat( val ) || 0; + + // Use the active box-sizing model to add/subtract irrelevant styles + return ( val + + augmentWidthOrHeight( + elem, + name, + extra || ( isBorderBox ? "border" : "content" ), + valueIsBorderBox, + styles + ) + ) + "px"; +} + +jQuery.extend( { + + // Add in style property hooks for overriding the default + // behavior of getting and setting a style property + cssHooks: { + opacity: { + get: function( elem, computed ) { + if ( computed ) { + + // We should always get a number back from opacity + var ret = curCSS( elem, "opacity" ); + return ret === "" ? "1" : ret; + } + } + } + }, + + // Don't automatically add "px" to these possibly-unitless properties + cssNumber: { + "animationIterationCount": true, + "columnCount": true, + "fillOpacity": true, + "flexGrow": true, + "flexShrink": true, + "fontWeight": true, + "lineHeight": true, + "opacity": true, + "order": true, + "orphans": true, + "widows": true, + "zIndex": true, + "zoom": true + }, + + // Add in properties whose names you wish to fix before + // setting or getting the value + cssProps: { + "float": "cssFloat" + }, + + // Get and set the style property on a DOM Node + style: function( elem, name, value, extra ) { + + // Don't set styles on text and comment nodes + if ( !elem || elem.nodeType === 3 || elem.nodeType === 8 || !elem.style ) { + return; + } + + // Make sure that we're working with the right name + var ret, type, hooks, + origName = jQuery.camelCase( name ), + isCustomProp = rcustomProp.test( name ), + style = elem.style; + + // Make sure that we're working with the right name. We don't + // want to query the value if it is a CSS custom property + // since they are user-defined. + if ( !isCustomProp ) { + name = finalPropName( origName ); + } + + // Gets hook for the prefixed version, then unprefixed version + hooks = jQuery.cssHooks[ name ] || jQuery.cssHooks[ origName ]; + + // Check if we're setting a value + if ( value !== undefined ) { + type = typeof value; + + // Convert "+=" or "-=" to relative numbers (#7345) + if ( type === "string" && ( ret = rcssNum.exec( value ) ) && ret[ 1 ] ) { + value = adjustCSS( elem, name, ret ); + + // Fixes bug #9237 + type = "number"; + } + + // Make sure that null and NaN values aren't set (#7116) + if ( value == null || value !== value ) { + return; + } + + // If a number was passed in, add the unit (except for certain CSS properties) + if ( type === "number" ) { + value += ret && ret[ 3 ] || ( jQuery.cssNumber[ origName ] ? "" : "px" ); + } + + // background-* props affect original clone's values + if ( !support.clearCloneStyle && value === "" && name.indexOf( "background" ) === 0 ) { + style[ name ] = "inherit"; + } + + // If a hook was provided, use that value, otherwise just set the specified value + if ( !hooks || !( "set" in hooks ) || + ( value = hooks.set( elem, value, extra ) ) !== undefined ) { + + if ( isCustomProp ) { + style.setProperty( name, value ); + } else { + style[ name ] = value; + } + } + + } else { + + // If a hook was provided get the non-computed value from there + if ( hooks && "get" in hooks && + ( ret = hooks.get( elem, false, extra ) ) !== undefined ) { + + return ret; + } + + // Otherwise just get the value from the style object + return style[ name ]; + } + }, + + css: function( elem, name, extra, styles ) { + var val, num, hooks, + origName = jQuery.camelCase( name ), + isCustomProp = rcustomProp.test( name ); + + // Make sure that we're working with the right name. We don't + // want to modify the value if it is a CSS custom property + // since they are user-defined. + if ( !isCustomProp ) { + name = finalPropName( origName ); + } + + // Try prefixed name followed by the unprefixed name + hooks = jQuery.cssHooks[ name ] || jQuery.cssHooks[ origName ]; + + // If a hook was provided get the computed value from there + if ( hooks && "get" in hooks ) { + val = hooks.get( elem, true, extra ); + } + + // Otherwise, if a way to get the computed value exists, use that + if ( val === undefined ) { + val = curCSS( elem, name, styles ); + } + + // Convert "normal" to computed value + if ( val === "normal" && name in cssNormalTransform ) { + val = cssNormalTransform[ name ]; + } + + // Make numeric if forced or a qualifier was provided and val looks numeric + if ( extra === "" || extra ) { + num = parseFloat( val ); + return extra === true || isFinite( num ) ? num || 0 : val; + } + + return val; + } +} ); + +jQuery.each( [ "height", "width" ], function( i, name ) { + jQuery.cssHooks[ name ] = { + get: function( elem, computed, extra ) { + if ( computed ) { + + // Certain elements can have dimension info if we invisibly show them + // but it must have a current display style that would benefit + return rdisplayswap.test( jQuery.css( elem, "display" ) ) && + + // Support: Safari 8+ + // Table columns in Safari have non-zero offsetWidth & zero + // getBoundingClientRect().width unless display is changed. + // Support: IE <=11 only + // Running getBoundingClientRect on a disconnected node + // in IE throws an error. + ( !elem.getClientRects().length || !elem.getBoundingClientRect().width ) ? + swap( elem, cssShow, function() { + return getWidthOrHeight( elem, name, extra ); + } ) : + getWidthOrHeight( elem, name, extra ); + } + }, + + set: function( elem, value, extra ) { + var matches, + styles = extra && getStyles( elem ), + subtract = extra && augmentWidthOrHeight( + elem, + name, + extra, + jQuery.css( elem, "boxSizing", false, styles ) === "border-box", + styles + ); + + // Convert to pixels if value adjustment is needed + if ( subtract && ( matches = rcssNum.exec( value ) ) && + ( matches[ 3 ] || "px" ) !== "px" ) { + + elem.style[ name ] = value; + value = jQuery.css( elem, name ); + } + + return setPositiveNumber( elem, value, subtract ); + } + }; +} ); + +jQuery.cssHooks.marginLeft = addGetHookIf( support.reliableMarginLeft, + function( elem, computed ) { + if ( computed ) { + return ( parseFloat( curCSS( elem, "marginLeft" ) ) || + elem.getBoundingClientRect().left - + swap( elem, { marginLeft: 0 }, function() { + return elem.getBoundingClientRect().left; + } ) + ) + "px"; + } + } +); + +// These hooks are used by animate to expand properties +jQuery.each( { + margin: "", + padding: "", + border: "Width" +}, function( prefix, suffix ) { + jQuery.cssHooks[ prefix + suffix ] = { + expand: function( value ) { + var i = 0, + expanded = {}, + + // Assumes a single number if not a string + parts = typeof value === "string" ? value.split( " " ) : [ value ]; + + for ( ; i < 4; i++ ) { + expanded[ prefix + cssExpand[ i ] + suffix ] = + parts[ i ] || parts[ i - 2 ] || parts[ 0 ]; + } + + return expanded; + } + }; + + if ( !rmargin.test( prefix ) ) { + jQuery.cssHooks[ prefix + suffix ].set = setPositiveNumber; + } +} ); + +jQuery.fn.extend( { + css: function( name, value ) { + return access( this, function( elem, name, value ) { + var styles, len, + map = {}, + i = 0; + + if ( Array.isArray( name ) ) { + styles = getStyles( elem ); + len = name.length; + + for ( ; i < len; i++ ) { + map[ name[ i ] ] = jQuery.css( elem, name[ i ], false, styles ); + } + + return map; + } + + return value !== undefined ? + jQuery.style( elem, name, value ) : + jQuery.css( elem, name ); + }, name, value, arguments.length > 1 ); + } +} ); + + +function Tween( elem, options, prop, end, easing ) { + return new Tween.prototype.init( elem, options, prop, end, easing ); +} +jQuery.Tween = Tween; + +Tween.prototype = { + constructor: Tween, + init: function( elem, options, prop, end, easing, unit ) { + this.elem = elem; + this.prop = prop; + this.easing = easing || jQuery.easing._default; + this.options = options; + this.start = this.now = this.cur(); + this.end = end; + this.unit = unit || ( jQuery.cssNumber[ prop ] ? "" : "px" ); + }, + cur: function() { + var hooks = Tween.propHooks[ this.prop ]; + + return hooks && hooks.get ? + hooks.get( this ) : + Tween.propHooks._default.get( this ); + }, + run: function( percent ) { + var eased, + hooks = Tween.propHooks[ this.prop ]; + + if ( this.options.duration ) { + this.pos = eased = jQuery.easing[ this.easing ]( + percent, this.options.duration * percent, 0, 1, this.options.duration + ); + } else { + this.pos = eased = percent; + } + this.now = ( this.end - this.start ) * eased + this.start; + + if ( this.options.step ) { + this.options.step.call( this.elem, this.now, this ); + } + + if ( hooks && hooks.set ) { + hooks.set( this ); + } else { + Tween.propHooks._default.set( this ); + } + return this; + } +}; + +Tween.prototype.init.prototype = Tween.prototype; + +Tween.propHooks = { + _default: { + get: function( tween ) { + var result; + + // Use a property on the element directly when it is not a DOM element, + // or when there is no matching style property that exists. + if ( tween.elem.nodeType !== 1 || + tween.elem[ tween.prop ] != null && tween.elem.style[ tween.prop ] == null ) { + return tween.elem[ tween.prop ]; + } + + // Passing an empty string as a 3rd parameter to .css will automatically + // attempt a parseFloat and fallback to a string if the parse fails. + // Simple values such as "10px" are parsed to Float; + // complex values such as "rotate(1rad)" are returned as-is. + result = jQuery.css( tween.elem, tween.prop, "" ); + + // Empty strings, null, undefined and "auto" are converted to 0. + return !result || result === "auto" ? 0 : result; + }, + set: function( tween ) { + + // Use step hook for back compat. + // Use cssHook if its there. + // Use .style if available and use plain properties where available. + if ( jQuery.fx.step[ tween.prop ] ) { + jQuery.fx.step[ tween.prop ]( tween ); + } else if ( tween.elem.nodeType === 1 && + ( tween.elem.style[ jQuery.cssProps[ tween.prop ] ] != null || + jQuery.cssHooks[ tween.prop ] ) ) { + jQuery.style( tween.elem, tween.prop, tween.now + tween.unit ); + } else { + tween.elem[ tween.prop ] = tween.now; + } + } + } +}; + +// Support: IE <=9 only +// Panic based approach to setting things on disconnected nodes +Tween.propHooks.scrollTop = Tween.propHooks.scrollLeft = { + set: function( tween ) { + if ( tween.elem.nodeType && tween.elem.parentNode ) { + tween.elem[ tween.prop ] = tween.now; + } + } +}; + +jQuery.easing = { + linear: function( p ) { + return p; + }, + swing: function( p ) { + return 0.5 - Math.cos( p * Math.PI ) / 2; + }, + _default: "swing" +}; + +jQuery.fx = Tween.prototype.init; + +// Back compat <1.8 extension point +jQuery.fx.step = {}; + + + + +var + fxNow, inProgress, + rfxtypes = /^(?:toggle|show|hide)$/, + rrun = /queueHooks$/; + +function schedule() { + if ( inProgress ) { + if ( document.hidden === false && window.requestAnimationFrame ) { + window.requestAnimationFrame( schedule ); + } else { + window.setTimeout( schedule, jQuery.fx.interval ); + } + + jQuery.fx.tick(); + } +} + +// Animations created synchronously will run synchronously +function createFxNow() { + window.setTimeout( function() { + fxNow = undefined; + } ); + return ( fxNow = jQuery.now() ); +} + +// Generate parameters to create a standard animation +function genFx( type, includeWidth ) { + var which, + i = 0, + attrs = { height: type }; + + // If we include width, step value is 1 to do all cssExpand values, + // otherwise step value is 2 to skip over Left and Right + includeWidth = includeWidth ? 1 : 0; + for ( ; i < 4; i += 2 - includeWidth ) { + which = cssExpand[ i ]; + attrs[ "margin" + which ] = attrs[ "padding" + which ] = type; + } + + if ( includeWidth ) { + attrs.opacity = attrs.width = type; + } + + return attrs; +} + +function createTween( value, prop, animation ) { + var tween, + collection = ( Animation.tweeners[ prop ] || [] ).concat( Animation.tweeners[ "*" ] ), + index = 0, + length = collection.length; + for ( ; index < length; index++ ) { + if ( ( tween = collection[ index ].call( animation, prop, value ) ) ) { + + // We're done with this property + return tween; + } + } +} + +function defaultPrefilter( elem, props, opts ) { + var prop, value, toggle, hooks, oldfire, propTween, restoreDisplay, display, + isBox = "width" in props || "height" in props, + anim = this, + orig = {}, + style = elem.style, + hidden = elem.nodeType && isHiddenWithinTree( elem ), + dataShow = dataPriv.get( elem, "fxshow" ); + + // Queue-skipping animations hijack the fx hooks + if ( !opts.queue ) { + hooks = jQuery._queueHooks( elem, "fx" ); + if ( hooks.unqueued == null ) { + hooks.unqueued = 0; + oldfire = hooks.empty.fire; + hooks.empty.fire = function() { + if ( !hooks.unqueued ) { + oldfire(); + } + }; + } + hooks.unqueued++; + + anim.always( function() { + + // Ensure the complete handler is called before this completes + anim.always( function() { + hooks.unqueued--; + if ( !jQuery.queue( elem, "fx" ).length ) { + hooks.empty.fire(); + } + } ); + } ); + } + + // Detect show/hide animations + for ( prop in props ) { + value = props[ prop ]; + if ( rfxtypes.test( value ) ) { + delete props[ prop ]; + toggle = toggle || value === "toggle"; + if ( value === ( hidden ? "hide" : "show" ) ) { + + // Pretend to be hidden if this is a "show" and + // there is still data from a stopped show/hide + if ( value === "show" && dataShow && dataShow[ prop ] !== undefined ) { + hidden = true; + + // Ignore all other no-op show/hide data + } else { + continue; + } + } + orig[ prop ] = dataShow && dataShow[ prop ] || jQuery.style( elem, prop ); + } + } + + // Bail out if this is a no-op like .hide().hide() + propTween = !jQuery.isEmptyObject( props ); + if ( !propTween && jQuery.isEmptyObject( orig ) ) { + return; + } + + // Restrict "overflow" and "display" styles during box animations + if ( isBox && elem.nodeType === 1 ) { + + // Support: IE <=9 - 11, Edge 12 - 13 + // Record all 3 overflow attributes because IE does not infer the shorthand + // from identically-valued overflowX and overflowY + opts.overflow = [ style.overflow, style.overflowX, style.overflowY ]; + + // Identify a display type, preferring old show/hide data over the CSS cascade + restoreDisplay = dataShow && dataShow.display; + if ( restoreDisplay == null ) { + restoreDisplay = dataPriv.get( elem, "display" ); + } + display = jQuery.css( elem, "display" ); + if ( display === "none" ) { + if ( restoreDisplay ) { + display = restoreDisplay; + } else { + + // Get nonempty value(s) by temporarily forcing visibility + showHide( [ elem ], true ); + restoreDisplay = elem.style.display || restoreDisplay; + display = jQuery.css( elem, "display" ); + showHide( [ elem ] ); + } + } + + // Animate inline elements as inline-block + if ( display === "inline" || display === "inline-block" && restoreDisplay != null ) { + if ( jQuery.css( elem, "float" ) === "none" ) { + + // Restore the original display value at the end of pure show/hide animations + if ( !propTween ) { + anim.done( function() { + style.display = restoreDisplay; + } ); + if ( restoreDisplay == null ) { + display = style.display; + restoreDisplay = display === "none" ? "" : display; + } + } + style.display = "inline-block"; + } + } + } + + if ( opts.overflow ) { + style.overflow = "hidden"; + anim.always( function() { + style.overflow = opts.overflow[ 0 ]; + style.overflowX = opts.overflow[ 1 ]; + style.overflowY = opts.overflow[ 2 ]; + } ); + } + + // Implement show/hide animations + propTween = false; + for ( prop in orig ) { + + // General show/hide setup for this element animation + if ( !propTween ) { + if ( dataShow ) { + if ( "hidden" in dataShow ) { + hidden = dataShow.hidden; + } + } else { + dataShow = dataPriv.access( elem, "fxshow", { display: restoreDisplay } ); + } + + // Store hidden/visible for toggle so `.stop().toggle()` "reverses" + if ( toggle ) { + dataShow.hidden = !hidden; + } + + // Show elements before animating them + if ( hidden ) { + showHide( [ elem ], true ); + } + + /* eslint-disable no-loop-func */ + + anim.done( function() { + + /* eslint-enable no-loop-func */ + + // The final step of a "hide" animation is actually hiding the element + if ( !hidden ) { + showHide( [ elem ] ); + } + dataPriv.remove( elem, "fxshow" ); + for ( prop in orig ) { + jQuery.style( elem, prop, orig[ prop ] ); + } + } ); + } + + // Per-property setup + propTween = createTween( hidden ? dataShow[ prop ] : 0, prop, anim ); + if ( !( prop in dataShow ) ) { + dataShow[ prop ] = propTween.start; + if ( hidden ) { + propTween.end = propTween.start; + propTween.start = 0; + } + } + } +} + +function propFilter( props, specialEasing ) { + var index, name, easing, value, hooks; + + // camelCase, specialEasing and expand cssHook pass + for ( index in props ) { + name = jQuery.camelCase( index ); + easing = specialEasing[ name ]; + value = props[ index ]; + if ( Array.isArray( value ) ) { + easing = value[ 1 ]; + value = props[ index ] = value[ 0 ]; + } + + if ( index !== name ) { + props[ name ] = value; + delete props[ index ]; + } + + hooks = jQuery.cssHooks[ name ]; + if ( hooks && "expand" in hooks ) { + value = hooks.expand( value ); + delete props[ name ]; + + // Not quite $.extend, this won't overwrite existing keys. + // Reusing 'index' because we have the correct "name" + for ( index in value ) { + if ( !( index in props ) ) { + props[ index ] = value[ index ]; + specialEasing[ index ] = easing; + } + } + } else { + specialEasing[ name ] = easing; + } + } +} + +function Animation( elem, properties, options ) { + var result, + stopped, + index = 0, + length = Animation.prefilters.length, + deferred = jQuery.Deferred().always( function() { + + // Don't match elem in the :animated selector + delete tick.elem; + } ), + tick = function() { + if ( stopped ) { + return false; + } + var currentTime = fxNow || createFxNow(), + remaining = Math.max( 0, animation.startTime + animation.duration - currentTime ), + + // Support: Android 2.3 only + // Archaic crash bug won't allow us to use `1 - ( 0.5 || 0 )` (#12497) + temp = remaining / animation.duration || 0, + percent = 1 - temp, + index = 0, + length = animation.tweens.length; + + for ( ; index < length; index++ ) { + animation.tweens[ index ].run( percent ); + } + + deferred.notifyWith( elem, [ animation, percent, remaining ] ); + + // If there's more to do, yield + if ( percent < 1 && length ) { + return remaining; + } + + // If this was an empty animation, synthesize a final progress notification + if ( !length ) { + deferred.notifyWith( elem, [ animation, 1, 0 ] ); + } + + // Resolve the animation and report its conclusion + deferred.resolveWith( elem, [ animation ] ); + return false; + }, + animation = deferred.promise( { + elem: elem, + props: jQuery.extend( {}, properties ), + opts: jQuery.extend( true, { + specialEasing: {}, + easing: jQuery.easing._default + }, options ), + originalProperties: properties, + originalOptions: options, + startTime: fxNow || createFxNow(), + duration: options.duration, + tweens: [], + createTween: function( prop, end ) { + var tween = jQuery.Tween( elem, animation.opts, prop, end, + animation.opts.specialEasing[ prop ] || animation.opts.easing ); + animation.tweens.push( tween ); + return tween; + }, + stop: function( gotoEnd ) { + var index = 0, + + // If we are going to the end, we want to run all the tweens + // otherwise we skip this part + length = gotoEnd ? animation.tweens.length : 0; + if ( stopped ) { + return this; + } + stopped = true; + for ( ; index < length; index++ ) { + animation.tweens[ index ].run( 1 ); + } + + // Resolve when we played the last frame; otherwise, reject + if ( gotoEnd ) { + deferred.notifyWith( elem, [ animation, 1, 0 ] ); + deferred.resolveWith( elem, [ animation, gotoEnd ] ); + } else { + deferred.rejectWith( elem, [ animation, gotoEnd ] ); + } + return this; + } + } ), + props = animation.props; + + propFilter( props, animation.opts.specialEasing ); + + for ( ; index < length; index++ ) { + result = Animation.prefilters[ index ].call( animation, elem, props, animation.opts ); + if ( result ) { + if ( jQuery.isFunction( result.stop ) ) { + jQuery._queueHooks( animation.elem, animation.opts.queue ).stop = + jQuery.proxy( result.stop, result ); + } + return result; + } + } + + jQuery.map( props, createTween, animation ); + + if ( jQuery.isFunction( animation.opts.start ) ) { + animation.opts.start.call( elem, animation ); + } + + // Attach callbacks from options + animation + .progress( animation.opts.progress ) + .done( animation.opts.done, animation.opts.complete ) + .fail( animation.opts.fail ) + .always( animation.opts.always ); + + jQuery.fx.timer( + jQuery.extend( tick, { + elem: elem, + anim: animation, + queue: animation.opts.queue + } ) + ); + + return animation; +} + +jQuery.Animation = jQuery.extend( Animation, { + + tweeners: { + "*": [ function( prop, value ) { + var tween = this.createTween( prop, value ); + adjustCSS( tween.elem, prop, rcssNum.exec( value ), tween ); + return tween; + } ] + }, + + tweener: function( props, callback ) { + if ( jQuery.isFunction( props ) ) { + callback = props; + props = [ "*" ]; + } else { + props = props.match( rnothtmlwhite ); + } + + var prop, + index = 0, + length = props.length; + + for ( ; index < length; index++ ) { + prop = props[ index ]; + Animation.tweeners[ prop ] = Animation.tweeners[ prop ] || []; + Animation.tweeners[ prop ].unshift( callback ); + } + }, + + prefilters: [ defaultPrefilter ], + + prefilter: function( callback, prepend ) { + if ( prepend ) { + Animation.prefilters.unshift( callback ); + } else { + Animation.prefilters.push( callback ); + } + } +} ); + +jQuery.speed = function( speed, easing, fn ) { + var opt = speed && typeof speed === "object" ? jQuery.extend( {}, speed ) : { + complete: fn || !fn && easing || + jQuery.isFunction( speed ) && speed, + duration: speed, + easing: fn && easing || easing && !jQuery.isFunction( easing ) && easing + }; + + // Go to the end state if fx are off + if ( jQuery.fx.off ) { + opt.duration = 0; + + } else { + if ( typeof opt.duration !== "number" ) { + if ( opt.duration in jQuery.fx.speeds ) { + opt.duration = jQuery.fx.speeds[ opt.duration ]; + + } else { + opt.duration = jQuery.fx.speeds._default; + } + } + } + + // Normalize opt.queue - true/undefined/null -> "fx" + if ( opt.queue == null || opt.queue === true ) { + opt.queue = "fx"; + } + + // Queueing + opt.old = opt.complete; + + opt.complete = function() { + if ( jQuery.isFunction( opt.old ) ) { + opt.old.call( this ); + } + + if ( opt.queue ) { + jQuery.dequeue( this, opt.queue ); + } + }; + + return opt; +}; + +jQuery.fn.extend( { + fadeTo: function( speed, to, easing, callback ) { + + // Show any hidden elements after setting opacity to 0 + return this.filter( isHiddenWithinTree ).css( "opacity", 0 ).show() + + // Animate to the value specified + .end().animate( { opacity: to }, speed, easing, callback ); + }, + animate: function( prop, speed, easing, callback ) { + var empty = jQuery.isEmptyObject( prop ), + optall = jQuery.speed( speed, easing, callback ), + doAnimation = function() { + + // Operate on a copy of prop so per-property easing won't be lost + var anim = Animation( this, jQuery.extend( {}, prop ), optall ); + + // Empty animations, or finishing resolves immediately + if ( empty || dataPriv.get( this, "finish" ) ) { + anim.stop( true ); + } + }; + doAnimation.finish = doAnimation; + + return empty || optall.queue === false ? + this.each( doAnimation ) : + this.queue( optall.queue, doAnimation ); + }, + stop: function( type, clearQueue, gotoEnd ) { + var stopQueue = function( hooks ) { + var stop = hooks.stop; + delete hooks.stop; + stop( gotoEnd ); + }; + + if ( typeof type !== "string" ) { + gotoEnd = clearQueue; + clearQueue = type; + type = undefined; + } + if ( clearQueue && type !== false ) { + this.queue( type || "fx", [] ); + } + + return this.each( function() { + var dequeue = true, + index = type != null && type + "queueHooks", + timers = jQuery.timers, + data = dataPriv.get( this ); + + if ( index ) { + if ( data[ index ] && data[ index ].stop ) { + stopQueue( data[ index ] ); + } + } else { + for ( index in data ) { + if ( data[ index ] && data[ index ].stop && rrun.test( index ) ) { + stopQueue( data[ index ] ); + } + } + } + + for ( index = timers.length; index--; ) { + if ( timers[ index ].elem === this && + ( type == null || timers[ index ].queue === type ) ) { + + timers[ index ].anim.stop( gotoEnd ); + dequeue = false; + timers.splice( index, 1 ); + } + } + + // Start the next in the queue if the last step wasn't forced. + // Timers currently will call their complete callbacks, which + // will dequeue but only if they were gotoEnd. + if ( dequeue || !gotoEnd ) { + jQuery.dequeue( this, type ); + } + } ); + }, + finish: function( type ) { + if ( type !== false ) { + type = type || "fx"; + } + return this.each( function() { + var index, + data = dataPriv.get( this ), + queue = data[ type + "queue" ], + hooks = data[ type + "queueHooks" ], + timers = jQuery.timers, + length = queue ? queue.length : 0; + + // Enable finishing flag on private data + data.finish = true; + + // Empty the queue first + jQuery.queue( this, type, [] ); + + if ( hooks && hooks.stop ) { + hooks.stop.call( this, true ); + } + + // Look for any active animations, and finish them + for ( index = timers.length; index--; ) { + if ( timers[ index ].elem === this && timers[ index ].queue === type ) { + timers[ index ].anim.stop( true ); + timers.splice( index, 1 ); + } + } + + // Look for any animations in the old queue and finish them + for ( index = 0; index < length; index++ ) { + if ( queue[ index ] && queue[ index ].finish ) { + queue[ index ].finish.call( this ); + } + } + + // Turn off finishing flag + delete data.finish; + } ); + } +} ); + +jQuery.each( [ "toggle", "show", "hide" ], function( i, name ) { + var cssFn = jQuery.fn[ name ]; + jQuery.fn[ name ] = function( speed, easing, callback ) { + return speed == null || typeof speed === "boolean" ? + cssFn.apply( this, arguments ) : + this.animate( genFx( name, true ), speed, easing, callback ); + }; +} ); + +// Generate shortcuts for custom animations +jQuery.each( { + slideDown: genFx( "show" ), + slideUp: genFx( "hide" ), + slideToggle: genFx( "toggle" ), + fadeIn: { opacity: "show" }, + fadeOut: { opacity: "hide" }, + fadeToggle: { opacity: "toggle" } +}, function( name, props ) { + jQuery.fn[ name ] = function( speed, easing, callback ) { + return this.animate( props, speed, easing, callback ); + }; +} ); + +jQuery.timers = []; +jQuery.fx.tick = function() { + var timer, + i = 0, + timers = jQuery.timers; + + fxNow = jQuery.now(); + + for ( ; i < timers.length; i++ ) { + timer = timers[ i ]; + + // Run the timer and safely remove it when done (allowing for external removal) + if ( !timer() && timers[ i ] === timer ) { + timers.splice( i--, 1 ); + } + } + + if ( !timers.length ) { + jQuery.fx.stop(); + } + fxNow = undefined; +}; + +jQuery.fx.timer = function( timer ) { + jQuery.timers.push( timer ); + jQuery.fx.start(); +}; + +jQuery.fx.interval = 13; +jQuery.fx.start = function() { + if ( inProgress ) { + return; + } + + inProgress = true; + schedule(); +}; + +jQuery.fx.stop = function() { + inProgress = null; +}; + +jQuery.fx.speeds = { + slow: 600, + fast: 200, + + // Default speed + _default: 400 +}; + + +// Based off of the plugin by Clint Helfers, with permission. +// https://web.archive.org/web/20100324014747/http://blindsignals.com/index.php/2009/07/jquery-delay/ +jQuery.fn.delay = function( time, type ) { + time = jQuery.fx ? jQuery.fx.speeds[ time ] || time : time; + type = type || "fx"; + + return this.queue( type, function( next, hooks ) { + var timeout = window.setTimeout( next, time ); + hooks.stop = function() { + window.clearTimeout( timeout ); + }; + } ); +}; + + +( function() { + var input = document.createElement( "input" ), + select = document.createElement( "select" ), + opt = select.appendChild( document.createElement( "option" ) ); + + input.type = "checkbox"; + + // Support: Android <=4.3 only + // Default value for a checkbox should be "on" + support.checkOn = input.value !== ""; + + // Support: IE <=11 only + // Must access selectedIndex to make default options select + support.optSelected = opt.selected; + + // Support: IE <=11 only + // An input loses its value after becoming a radio + input = document.createElement( "input" ); + input.value = "t"; + input.type = "radio"; + support.radioValue = input.value === "t"; +} )(); + + +var boolHook, + attrHandle = jQuery.expr.attrHandle; + +jQuery.fn.extend( { + attr: function( name, value ) { + return access( this, jQuery.attr, name, value, arguments.length > 1 ); + }, + + removeAttr: function( name ) { + return this.each( function() { + jQuery.removeAttr( this, name ); + } ); + } +} ); + +jQuery.extend( { + attr: function( elem, name, value ) { + var ret, hooks, + nType = elem.nodeType; + + // Don't get/set attributes on text, comment and attribute nodes + if ( nType === 3 || nType === 8 || nType === 2 ) { + return; + } + + // Fallback to prop when attributes are not supported + if ( typeof elem.getAttribute === "undefined" ) { + return jQuery.prop( elem, name, value ); + } + + // Attribute hooks are determined by the lowercase version + // Grab necessary hook if one is defined + if ( nType !== 1 || !jQuery.isXMLDoc( elem ) ) { + hooks = jQuery.attrHooks[ name.toLowerCase() ] || + ( jQuery.expr.match.bool.test( name ) ? boolHook : undefined ); + } + + if ( value !== undefined ) { + if ( value === null ) { + jQuery.removeAttr( elem, name ); + return; + } + + if ( hooks && "set" in hooks && + ( ret = hooks.set( elem, value, name ) ) !== undefined ) { + return ret; + } + + elem.setAttribute( name, value + "" ); + return value; + } + + if ( hooks && "get" in hooks && ( ret = hooks.get( elem, name ) ) !== null ) { + return ret; + } + + ret = jQuery.find.attr( elem, name ); + + // Non-existent attributes return null, we normalize to undefined + return ret == null ? undefined : ret; + }, + + attrHooks: { + type: { + set: function( elem, value ) { + if ( !support.radioValue && value === "radio" && + nodeName( elem, "input" ) ) { + var val = elem.value; + elem.setAttribute( "type", value ); + if ( val ) { + elem.value = val; + } + return value; + } + } + } + }, + + removeAttr: function( elem, value ) { + var name, + i = 0, + + // Attribute names can contain non-HTML whitespace characters + // https://html.spec.whatwg.org/multipage/syntax.html#attributes-2 + attrNames = value && value.match( rnothtmlwhite ); + + if ( attrNames && elem.nodeType === 1 ) { + while ( ( name = attrNames[ i++ ] ) ) { + elem.removeAttribute( name ); + } + } + } +} ); + +// Hooks for boolean attributes +boolHook = { + set: function( elem, value, name ) { + if ( value === false ) { + + // Remove boolean attributes when set to false + jQuery.removeAttr( elem, name ); + } else { + elem.setAttribute( name, name ); + } + return name; + } +}; + +jQuery.each( jQuery.expr.match.bool.source.match( /\w+/g ), function( i, name ) { + var getter = attrHandle[ name ] || jQuery.find.attr; + + attrHandle[ name ] = function( elem, name, isXML ) { + var ret, handle, + lowercaseName = name.toLowerCase(); + + if ( !isXML ) { + + // Avoid an infinite loop by temporarily removing this function from the getter + handle = attrHandle[ lowercaseName ]; + attrHandle[ lowercaseName ] = ret; + ret = getter( elem, name, isXML ) != null ? + lowercaseName : + null; + attrHandle[ lowercaseName ] = handle; + } + return ret; + }; +} ); + + + + +var rfocusable = /^(?:input|select|textarea|button)$/i, + rclickable = /^(?:a|area)$/i; + +jQuery.fn.extend( { + prop: function( name, value ) { + return access( this, jQuery.prop, name, value, arguments.length > 1 ); + }, + + removeProp: function( name ) { + return this.each( function() { + delete this[ jQuery.propFix[ name ] || name ]; + } ); + } +} ); + +jQuery.extend( { + prop: function( elem, name, value ) { + var ret, hooks, + nType = elem.nodeType; + + // Don't get/set properties on text, comment and attribute nodes + if ( nType === 3 || nType === 8 || nType === 2 ) { + return; + } + + if ( nType !== 1 || !jQuery.isXMLDoc( elem ) ) { + + // Fix name and attach hooks + name = jQuery.propFix[ name ] || name; + hooks = jQuery.propHooks[ name ]; + } + + if ( value !== undefined ) { + if ( hooks && "set" in hooks && + ( ret = hooks.set( elem, value, name ) ) !== undefined ) { + return ret; + } + + return ( elem[ name ] = value ); + } + + if ( hooks && "get" in hooks && ( ret = hooks.get( elem, name ) ) !== null ) { + return ret; + } + + return elem[ name ]; + }, + + propHooks: { + tabIndex: { + get: function( elem ) { + + // Support: IE <=9 - 11 only + // elem.tabIndex doesn't always return the + // correct value when it hasn't been explicitly set + // https://web.archive.org/web/20141116233347/http://fluidproject.org/blog/2008/01/09/getting-setting-and-removing-tabindex-values-with-javascript/ + // Use proper attribute retrieval(#12072) + var tabindex = jQuery.find.attr( elem, "tabindex" ); + + if ( tabindex ) { + return parseInt( tabindex, 10 ); + } + + if ( + rfocusable.test( elem.nodeName ) || + rclickable.test( elem.nodeName ) && + elem.href + ) { + return 0; + } + + return -1; + } + } + }, + + propFix: { + "for": "htmlFor", + "class": "className" + } +} ); + +// Support: IE <=11 only +// Accessing the selectedIndex property +// forces the browser to respect setting selected +// on the option +// The getter ensures a default option is selected +// when in an optgroup +// eslint rule "no-unused-expressions" is disabled for this code +// since it considers such accessions noop +if ( !support.optSelected ) { + jQuery.propHooks.selected = { + get: function( elem ) { + + /* eslint no-unused-expressions: "off" */ + + var parent = elem.parentNode; + if ( parent && parent.parentNode ) { + parent.parentNode.selectedIndex; + } + return null; + }, + set: function( elem ) { + + /* eslint no-unused-expressions: "off" */ + + var parent = elem.parentNode; + if ( parent ) { + parent.selectedIndex; + + if ( parent.parentNode ) { + parent.parentNode.selectedIndex; + } + } + } + }; +} + +jQuery.each( [ + "tabIndex", + "readOnly", + "maxLength", + "cellSpacing", + "cellPadding", + "rowSpan", + "colSpan", + "useMap", + "frameBorder", + "contentEditable" +], function() { + jQuery.propFix[ this.toLowerCase() ] = this; +} ); + + + + + // Strip and collapse whitespace according to HTML spec + // https://html.spec.whatwg.org/multipage/infrastructure.html#strip-and-collapse-whitespace + function stripAndCollapse( value ) { + var tokens = value.match( rnothtmlwhite ) || []; + return tokens.join( " " ); + } + + +function getClass( elem ) { + return elem.getAttribute && elem.getAttribute( "class" ) || ""; +} + +jQuery.fn.extend( { + addClass: function( value ) { + var classes, elem, cur, curValue, clazz, j, finalValue, + i = 0; + + if ( jQuery.isFunction( value ) ) { + return this.each( function( j ) { + jQuery( this ).addClass( value.call( this, j, getClass( this ) ) ); + } ); + } + + if ( typeof value === "string" && value ) { + classes = value.match( rnothtmlwhite ) || []; + + while ( ( elem = this[ i++ ] ) ) { + curValue = getClass( elem ); + cur = elem.nodeType === 1 && ( " " + stripAndCollapse( curValue ) + " " ); + + if ( cur ) { + j = 0; + while ( ( clazz = classes[ j++ ] ) ) { + if ( cur.indexOf( " " + clazz + " " ) < 0 ) { + cur += clazz + " "; + } + } + + // Only assign if different to avoid unneeded rendering. + finalValue = stripAndCollapse( cur ); + if ( curValue !== finalValue ) { + elem.setAttribute( "class", finalValue ); + } + } + } + } + + return this; + }, + + removeClass: function( value ) { + var classes, elem, cur, curValue, clazz, j, finalValue, + i = 0; + + if ( jQuery.isFunction( value ) ) { + return this.each( function( j ) { + jQuery( this ).removeClass( value.call( this, j, getClass( this ) ) ); + } ); + } + + if ( !arguments.length ) { + return this.attr( "class", "" ); + } + + if ( typeof value === "string" && value ) { + classes = value.match( rnothtmlwhite ) || []; + + while ( ( elem = this[ i++ ] ) ) { + curValue = getClass( elem ); + + // This expression is here for better compressibility (see addClass) + cur = elem.nodeType === 1 && ( " " + stripAndCollapse( curValue ) + " " ); + + if ( cur ) { + j = 0; + while ( ( clazz = classes[ j++ ] ) ) { + + // Remove *all* instances + while ( cur.indexOf( " " + clazz + " " ) > -1 ) { + cur = cur.replace( " " + clazz + " ", " " ); + } + } + + // Only assign if different to avoid unneeded rendering. + finalValue = stripAndCollapse( cur ); + if ( curValue !== finalValue ) { + elem.setAttribute( "class", finalValue ); + } + } + } + } + + return this; + }, + + toggleClass: function( value, stateVal ) { + var type = typeof value; + + if ( typeof stateVal === "boolean" && type === "string" ) { + return stateVal ? this.addClass( value ) : this.removeClass( value ); + } + + if ( jQuery.isFunction( value ) ) { + return this.each( function( i ) { + jQuery( this ).toggleClass( + value.call( this, i, getClass( this ), stateVal ), + stateVal + ); + } ); + } + + return this.each( function() { + var className, i, self, classNames; + + if ( type === "string" ) { + + // Toggle individual class names + i = 0; + self = jQuery( this ); + classNames = value.match( rnothtmlwhite ) || []; + + while ( ( className = classNames[ i++ ] ) ) { + + // Check each className given, space separated list + if ( self.hasClass( className ) ) { + self.removeClass( className ); + } else { + self.addClass( className ); + } + } + + // Toggle whole class name + } else if ( value === undefined || type === "boolean" ) { + className = getClass( this ); + if ( className ) { + + // Store className if set + dataPriv.set( this, "__className__", className ); + } + + // If the element has a class name or if we're passed `false`, + // then remove the whole classname (if there was one, the above saved it). + // Otherwise bring back whatever was previously saved (if anything), + // falling back to the empty string if nothing was stored. + if ( this.setAttribute ) { + this.setAttribute( "class", + className || value === false ? + "" : + dataPriv.get( this, "__className__" ) || "" + ); + } + } + } ); + }, + + hasClass: function( selector ) { + var className, elem, + i = 0; + + className = " " + selector + " "; + while ( ( elem = this[ i++ ] ) ) { + if ( elem.nodeType === 1 && + ( " " + stripAndCollapse( getClass( elem ) ) + " " ).indexOf( className ) > -1 ) { + return true; + } + } + + return false; + } +} ); + + + + +var rreturn = /\r/g; + +jQuery.fn.extend( { + val: function( value ) { + var hooks, ret, isFunction, + elem = this[ 0 ]; + + if ( !arguments.length ) { + if ( elem ) { + hooks = jQuery.valHooks[ elem.type ] || + jQuery.valHooks[ elem.nodeName.toLowerCase() ]; + + if ( hooks && + "get" in hooks && + ( ret = hooks.get( elem, "value" ) ) !== undefined + ) { + return ret; + } + + ret = elem.value; + + // Handle most common string cases + if ( typeof ret === "string" ) { + return ret.replace( rreturn, "" ); + } + + // Handle cases where value is null/undef or number + return ret == null ? "" : ret; + } + + return; + } + + isFunction = jQuery.isFunction( value ); + + return this.each( function( i ) { + var val; + + if ( this.nodeType !== 1 ) { + return; + } + + if ( isFunction ) { + val = value.call( this, i, jQuery( this ).val() ); + } else { + val = value; + } + + // Treat null/undefined as ""; convert numbers to string + if ( val == null ) { + val = ""; + + } else if ( typeof val === "number" ) { + val += ""; + + } else if ( Array.isArray( val ) ) { + val = jQuery.map( val, function( value ) { + return value == null ? "" : value + ""; + } ); + } + + hooks = jQuery.valHooks[ this.type ] || jQuery.valHooks[ this.nodeName.toLowerCase() ]; + + // If set returns undefined, fall back to normal setting + if ( !hooks || !( "set" in hooks ) || hooks.set( this, val, "value" ) === undefined ) { + this.value = val; + } + } ); + } +} ); + +jQuery.extend( { + valHooks: { + option: { + get: function( elem ) { + + var val = jQuery.find.attr( elem, "value" ); + return val != null ? + val : + + // Support: IE <=10 - 11 only + // option.text throws exceptions (#14686, #14858) + // Strip and collapse whitespace + // https://html.spec.whatwg.org/#strip-and-collapse-whitespace + stripAndCollapse( jQuery.text( elem ) ); + } + }, + select: { + get: function( elem ) { + var value, option, i, + options = elem.options, + index = elem.selectedIndex, + one = elem.type === "select-one", + values = one ? null : [], + max = one ? index + 1 : options.length; + + if ( index < 0 ) { + i = max; + + } else { + i = one ? index : 0; + } + + // Loop through all the selected options + for ( ; i < max; i++ ) { + option = options[ i ]; + + // Support: IE <=9 only + // IE8-9 doesn't update selected after form reset (#2551) + if ( ( option.selected || i === index ) && + + // Don't return options that are disabled or in a disabled optgroup + !option.disabled && + ( !option.parentNode.disabled || + !nodeName( option.parentNode, "optgroup" ) ) ) { + + // Get the specific value for the option + value = jQuery( option ).val(); + + // We don't need an array for one selects + if ( one ) { + return value; + } + + // Multi-Selects return an array + values.push( value ); + } + } + + return values; + }, + + set: function( elem, value ) { + var optionSet, option, + options = elem.options, + values = jQuery.makeArray( value ), + i = options.length; + + while ( i-- ) { + option = options[ i ]; + + /* eslint-disable no-cond-assign */ + + if ( option.selected = + jQuery.inArray( jQuery.valHooks.option.get( option ), values ) > -1 + ) { + optionSet = true; + } + + /* eslint-enable no-cond-assign */ + } + + // Force browsers to behave consistently when non-matching value is set + if ( !optionSet ) { + elem.selectedIndex = -1; + } + return values; + } + } + } +} ); + +// Radios and checkboxes getter/setter +jQuery.each( [ "radio", "checkbox" ], function() { + jQuery.valHooks[ this ] = { + set: function( elem, value ) { + if ( Array.isArray( value ) ) { + return ( elem.checked = jQuery.inArray( jQuery( elem ).val(), value ) > -1 ); + } + } + }; + if ( !support.checkOn ) { + jQuery.valHooks[ this ].get = function( elem ) { + return elem.getAttribute( "value" ) === null ? "on" : elem.value; + }; + } +} ); + + + + +// Return jQuery for attributes-only inclusion + + +var rfocusMorph = /^(?:focusinfocus|focusoutblur)$/; + +jQuery.extend( jQuery.event, { + + trigger: function( event, data, elem, onlyHandlers ) { + + var i, cur, tmp, bubbleType, ontype, handle, special, + eventPath = [ elem || document ], + type = hasOwn.call( event, "type" ) ? event.type : event, + namespaces = hasOwn.call( event, "namespace" ) ? event.namespace.split( "." ) : []; + + cur = tmp = elem = elem || document; + + // Don't do events on text and comment nodes + if ( elem.nodeType === 3 || elem.nodeType === 8 ) { + return; + } + + // focus/blur morphs to focusin/out; ensure we're not firing them right now + if ( rfocusMorph.test( type + jQuery.event.triggered ) ) { + return; + } + + if ( type.indexOf( "." ) > -1 ) { + + // Namespaced trigger; create a regexp to match event type in handle() + namespaces = type.split( "." ); + type = namespaces.shift(); + namespaces.sort(); + } + ontype = type.indexOf( ":" ) < 0 && "on" + type; + + // Caller can pass in a jQuery.Event object, Object, or just an event type string + event = event[ jQuery.expando ] ? + event : + new jQuery.Event( type, typeof event === "object" && event ); + + // Trigger bitmask: & 1 for native handlers; & 2 for jQuery (always true) + event.isTrigger = onlyHandlers ? 2 : 3; + event.namespace = namespaces.join( "." ); + event.rnamespace = event.namespace ? + new RegExp( "(^|\\.)" + namespaces.join( "\\.(?:.*\\.|)" ) + "(\\.|$)" ) : + null; + + // Clean up the event in case it is being reused + event.result = undefined; + if ( !event.target ) { + event.target = elem; + } + + // Clone any incoming data and prepend the event, creating the handler arg list + data = data == null ? + [ event ] : + jQuery.makeArray( data, [ event ] ); + + // Allow special events to draw outside the lines + special = jQuery.event.special[ type ] || {}; + if ( !onlyHandlers && special.trigger && special.trigger.apply( elem, data ) === false ) { + return; + } + + // Determine event propagation path in advance, per W3C events spec (#9951) + // Bubble up to document, then to window; watch for a global ownerDocument var (#9724) + if ( !onlyHandlers && !special.noBubble && !jQuery.isWindow( elem ) ) { + + bubbleType = special.delegateType || type; + if ( !rfocusMorph.test( bubbleType + type ) ) { + cur = cur.parentNode; + } + for ( ; cur; cur = cur.parentNode ) { + eventPath.push( cur ); + tmp = cur; + } + + // Only add window if we got to document (e.g., not plain obj or detached DOM) + if ( tmp === ( elem.ownerDocument || document ) ) { + eventPath.push( tmp.defaultView || tmp.parentWindow || window ); + } + } + + // Fire handlers on the event path + i = 0; + while ( ( cur = eventPath[ i++ ] ) && !event.isPropagationStopped() ) { + + event.type = i > 1 ? + bubbleType : + special.bindType || type; + + // jQuery handler + handle = ( dataPriv.get( cur, "events" ) || {} )[ event.type ] && + dataPriv.get( cur, "handle" ); + if ( handle ) { + handle.apply( cur, data ); + } + + // Native handler + handle = ontype && cur[ ontype ]; + if ( handle && handle.apply && acceptData( cur ) ) { + event.result = handle.apply( cur, data ); + if ( event.result === false ) { + event.preventDefault(); + } + } + } + event.type = type; + + // If nobody prevented the default action, do it now + if ( !onlyHandlers && !event.isDefaultPrevented() ) { + + if ( ( !special._default || + special._default.apply( eventPath.pop(), data ) === false ) && + acceptData( elem ) ) { + + // Call a native DOM method on the target with the same name as the event. + // Don't do default actions on window, that's where global variables be (#6170) + if ( ontype && jQuery.isFunction( elem[ type ] ) && !jQuery.isWindow( elem ) ) { + + // Don't re-trigger an onFOO event when we call its FOO() method + tmp = elem[ ontype ]; + + if ( tmp ) { + elem[ ontype ] = null; + } + + // Prevent re-triggering of the same event, since we already bubbled it above + jQuery.event.triggered = type; + elem[ type ](); + jQuery.event.triggered = undefined; + + if ( tmp ) { + elem[ ontype ] = tmp; + } + } + } + } + + return event.result; + }, + + // Piggyback on a donor event to simulate a different one + // Used only for `focus(in | out)` events + simulate: function( type, elem, event ) { + var e = jQuery.extend( + new jQuery.Event(), + event, + { + type: type, + isSimulated: true + } + ); + + jQuery.event.trigger( e, null, elem ); + } + +} ); + +jQuery.fn.extend( { + + trigger: function( type, data ) { + return this.each( function() { + jQuery.event.trigger( type, data, this ); + } ); + }, + triggerHandler: function( type, data ) { + var elem = this[ 0 ]; + if ( elem ) { + return jQuery.event.trigger( type, data, elem, true ); + } + } +} ); + + +jQuery.each( ( "blur focus focusin focusout resize scroll click dblclick " + + "mousedown mouseup mousemove mouseover mouseout mouseenter mouseleave " + + "change select submit keydown keypress keyup contextmenu" ).split( " " ), + function( i, name ) { + + // Handle event binding + jQuery.fn[ name ] = function( data, fn ) { + return arguments.length > 0 ? + this.on( name, null, data, fn ) : + this.trigger( name ); + }; +} ); + +jQuery.fn.extend( { + hover: function( fnOver, fnOut ) { + return this.mouseenter( fnOver ).mouseleave( fnOut || fnOver ); + } +} ); + + + + +support.focusin = "onfocusin" in window; + + +// Support: Firefox <=44 +// Firefox doesn't have focus(in | out) events +// Related ticket - https://bugzilla.mozilla.org/show_bug.cgi?id=687787 +// +// Support: Chrome <=48 - 49, Safari <=9.0 - 9.1 +// focus(in | out) events fire after focus & blur events, +// which is spec violation - http://www.w3.org/TR/DOM-Level-3-Events/#events-focusevent-event-order +// Related ticket - https://bugs.chromium.org/p/chromium/issues/detail?id=449857 +if ( !support.focusin ) { + jQuery.each( { focus: "focusin", blur: "focusout" }, function( orig, fix ) { + + // Attach a single capturing handler on the document while someone wants focusin/focusout + var handler = function( event ) { + jQuery.event.simulate( fix, event.target, jQuery.event.fix( event ) ); + }; + + jQuery.event.special[ fix ] = { + setup: function() { + var doc = this.ownerDocument || this, + attaches = dataPriv.access( doc, fix ); + + if ( !attaches ) { + doc.addEventListener( orig, handler, true ); + } + dataPriv.access( doc, fix, ( attaches || 0 ) + 1 ); + }, + teardown: function() { + var doc = this.ownerDocument || this, + attaches = dataPriv.access( doc, fix ) - 1; + + if ( !attaches ) { + doc.removeEventListener( orig, handler, true ); + dataPriv.remove( doc, fix ); + + } else { + dataPriv.access( doc, fix, attaches ); + } + } + }; + } ); +} +var location = window.location; + +var nonce = jQuery.now(); + +var rquery = ( /\?/ ); + + + +// Cross-browser xml parsing +jQuery.parseXML = function( data ) { + var xml; + if ( !data || typeof data !== "string" ) { + return null; + } + + // Support: IE 9 - 11 only + // IE throws on parseFromString with invalid input. + try { + xml = ( new window.DOMParser() ).parseFromString( data, "text/xml" ); + } catch ( e ) { + xml = undefined; + } + + if ( !xml || xml.getElementsByTagName( "parsererror" ).length ) { + jQuery.error( "Invalid XML: " + data ); + } + return xml; +}; + + +var + rbracket = /\[\]$/, + rCRLF = /\r?\n/g, + rsubmitterTypes = /^(?:submit|button|image|reset|file)$/i, + rsubmittable = /^(?:input|select|textarea|keygen)/i; + +function buildParams( prefix, obj, traditional, add ) { + var name; + + if ( Array.isArray( obj ) ) { + + // Serialize array item. + jQuery.each( obj, function( i, v ) { + if ( traditional || rbracket.test( prefix ) ) { + + // Treat each array item as a scalar. + add( prefix, v ); + + } else { + + // Item is non-scalar (array or object), encode its numeric index. + buildParams( + prefix + "[" + ( typeof v === "object" && v != null ? i : "" ) + "]", + v, + traditional, + add + ); + } + } ); + + } else if ( !traditional && jQuery.type( obj ) === "object" ) { + + // Serialize object item. + for ( name in obj ) { + buildParams( prefix + "[" + name + "]", obj[ name ], traditional, add ); + } + + } else { + + // Serialize scalar item. + add( prefix, obj ); + } +} + +// Serialize an array of form elements or a set of +// key/values into a query string +jQuery.param = function( a, traditional ) { + var prefix, + s = [], + add = function( key, valueOrFunction ) { + + // If value is a function, invoke it and use its return value + var value = jQuery.isFunction( valueOrFunction ) ? + valueOrFunction() : + valueOrFunction; + + s[ s.length ] = encodeURIComponent( key ) + "=" + + encodeURIComponent( value == null ? "" : value ); + }; + + // If an array was passed in, assume that it is an array of form elements. + if ( Array.isArray( a ) || ( a.jquery && !jQuery.isPlainObject( a ) ) ) { + + // Serialize the form elements + jQuery.each( a, function() { + add( this.name, this.value ); + } ); + + } else { + + // If traditional, encode the "old" way (the way 1.3.2 or older + // did it), otherwise encode params recursively. + for ( prefix in a ) { + buildParams( prefix, a[ prefix ], traditional, add ); + } + } + + // Return the resulting serialization + return s.join( "&" ); +}; + +jQuery.fn.extend( { + serialize: function() { + return jQuery.param( this.serializeArray() ); + }, + serializeArray: function() { + return this.map( function() { + + // Can add propHook for "elements" to filter or add form elements + var elements = jQuery.prop( this, "elements" ); + return elements ? jQuery.makeArray( elements ) : this; + } ) + .filter( function() { + var type = this.type; + + // Use .is( ":disabled" ) so that fieldset[disabled] works + return this.name && !jQuery( this ).is( ":disabled" ) && + rsubmittable.test( this.nodeName ) && !rsubmitterTypes.test( type ) && + ( this.checked || !rcheckableType.test( type ) ); + } ) + .map( function( i, elem ) { + var val = jQuery( this ).val(); + + if ( val == null ) { + return null; + } + + if ( Array.isArray( val ) ) { + return jQuery.map( val, function( val ) { + return { name: elem.name, value: val.replace( rCRLF, "\r\n" ) }; + } ); + } + + return { name: elem.name, value: val.replace( rCRLF, "\r\n" ) }; + } ).get(); + } +} ); + + +var + r20 = /%20/g, + rhash = /#.*$/, + rantiCache = /([?&])_=[^&]*/, + rheaders = /^(.*?):[ \t]*([^\r\n]*)$/mg, + + // #7653, #8125, #8152: local protocol detection + rlocalProtocol = /^(?:about|app|app-storage|.+-extension|file|res|widget):$/, + rnoContent = /^(?:GET|HEAD)$/, + rprotocol = /^\/\//, + + /* Prefilters + * 1) They are useful to introduce custom dataTypes (see ajax/jsonp.js for an example) + * 2) These are called: + * - BEFORE asking for a transport + * - AFTER param serialization (s.data is a string if s.processData is true) + * 3) key is the dataType + * 4) the catchall symbol "*" can be used + * 5) execution will start with transport dataType and THEN continue down to "*" if needed + */ + prefilters = {}, + + /* Transports bindings + * 1) key is the dataType + * 2) the catchall symbol "*" can be used + * 3) selection will start with transport dataType and THEN go to "*" if needed + */ + transports = {}, + + // Avoid comment-prolog char sequence (#10098); must appease lint and evade compression + allTypes = "*/".concat( "*" ), + + // Anchor tag for parsing the document origin + originAnchor = document.createElement( "a" ); + originAnchor.href = location.href; + +// Base "constructor" for jQuery.ajaxPrefilter and jQuery.ajaxTransport +function addToPrefiltersOrTransports( structure ) { + + // dataTypeExpression is optional and defaults to "*" + return function( dataTypeExpression, func ) { + + if ( typeof dataTypeExpression !== "string" ) { + func = dataTypeExpression; + dataTypeExpression = "*"; + } + + var dataType, + i = 0, + dataTypes = dataTypeExpression.toLowerCase().match( rnothtmlwhite ) || []; + + if ( jQuery.isFunction( func ) ) { + + // For each dataType in the dataTypeExpression + while ( ( dataType = dataTypes[ i++ ] ) ) { + + // Prepend if requested + if ( dataType[ 0 ] === "+" ) { + dataType = dataType.slice( 1 ) || "*"; + ( structure[ dataType ] = structure[ dataType ] || [] ).unshift( func ); + + // Otherwise append + } else { + ( structure[ dataType ] = structure[ dataType ] || [] ).push( func ); + } + } + } + }; +} + +// Base inspection function for prefilters and transports +function inspectPrefiltersOrTransports( structure, options, originalOptions, jqXHR ) { + + var inspected = {}, + seekingTransport = ( structure === transports ); + + function inspect( dataType ) { + var selected; + inspected[ dataType ] = true; + jQuery.each( structure[ dataType ] || [], function( _, prefilterOrFactory ) { + var dataTypeOrTransport = prefilterOrFactory( options, originalOptions, jqXHR ); + if ( typeof dataTypeOrTransport === "string" && + !seekingTransport && !inspected[ dataTypeOrTransport ] ) { + + options.dataTypes.unshift( dataTypeOrTransport ); + inspect( dataTypeOrTransport ); + return false; + } else if ( seekingTransport ) { + return !( selected = dataTypeOrTransport ); + } + } ); + return selected; + } + + return inspect( options.dataTypes[ 0 ] ) || !inspected[ "*" ] && inspect( "*" ); +} + +// A special extend for ajax options +// that takes "flat" options (not to be deep extended) +// Fixes #9887 +function ajaxExtend( target, src ) { + var key, deep, + flatOptions = jQuery.ajaxSettings.flatOptions || {}; + + for ( key in src ) { + if ( src[ key ] !== undefined ) { + ( flatOptions[ key ] ? target : ( deep || ( deep = {} ) ) )[ key ] = src[ key ]; + } + } + if ( deep ) { + jQuery.extend( true, target, deep ); + } + + return target; +} + +/* Handles responses to an ajax request: + * - finds the right dataType (mediates between content-type and expected dataType) + * - returns the corresponding response + */ +function ajaxHandleResponses( s, jqXHR, responses ) { + + var ct, type, finalDataType, firstDataType, + contents = s.contents, + dataTypes = s.dataTypes; + + // Remove auto dataType and get content-type in the process + while ( dataTypes[ 0 ] === "*" ) { + dataTypes.shift(); + if ( ct === undefined ) { + ct = s.mimeType || jqXHR.getResponseHeader( "Content-Type" ); + } + } + + // Check if we're dealing with a known content-type + if ( ct ) { + for ( type in contents ) { + if ( contents[ type ] && contents[ type ].test( ct ) ) { + dataTypes.unshift( type ); + break; + } + } + } + + // Check to see if we have a response for the expected dataType + if ( dataTypes[ 0 ] in responses ) { + finalDataType = dataTypes[ 0 ]; + } else { + + // Try convertible dataTypes + for ( type in responses ) { + if ( !dataTypes[ 0 ] || s.converters[ type + " " + dataTypes[ 0 ] ] ) { + finalDataType = type; + break; + } + if ( !firstDataType ) { + firstDataType = type; + } + } + + // Or just use first one + finalDataType = finalDataType || firstDataType; + } + + // If we found a dataType + // We add the dataType to the list if needed + // and return the corresponding response + if ( finalDataType ) { + if ( finalDataType !== dataTypes[ 0 ] ) { + dataTypes.unshift( finalDataType ); + } + return responses[ finalDataType ]; + } +} + +/* Chain conversions given the request and the original response + * Also sets the responseXXX fields on the jqXHR instance + */ +function ajaxConvert( s, response, jqXHR, isSuccess ) { + var conv2, current, conv, tmp, prev, + converters = {}, + + // Work with a copy of dataTypes in case we need to modify it for conversion + dataTypes = s.dataTypes.slice(); + + // Create converters map with lowercased keys + if ( dataTypes[ 1 ] ) { + for ( conv in s.converters ) { + converters[ conv.toLowerCase() ] = s.converters[ conv ]; + } + } + + current = dataTypes.shift(); + + // Convert to each sequential dataType + while ( current ) { + + if ( s.responseFields[ current ] ) { + jqXHR[ s.responseFields[ current ] ] = response; + } + + // Apply the dataFilter if provided + if ( !prev && isSuccess && s.dataFilter ) { + response = s.dataFilter( response, s.dataType ); + } + + prev = current; + current = dataTypes.shift(); + + if ( current ) { + + // There's only work to do if current dataType is non-auto + if ( current === "*" ) { + + current = prev; + + // Convert response if prev dataType is non-auto and differs from current + } else if ( prev !== "*" && prev !== current ) { + + // Seek a direct converter + conv = converters[ prev + " " + current ] || converters[ "* " + current ]; + + // If none found, seek a pair + if ( !conv ) { + for ( conv2 in converters ) { + + // If conv2 outputs current + tmp = conv2.split( " " ); + if ( tmp[ 1 ] === current ) { + + // If prev can be converted to accepted input + conv = converters[ prev + " " + tmp[ 0 ] ] || + converters[ "* " + tmp[ 0 ] ]; + if ( conv ) { + + // Condense equivalence converters + if ( conv === true ) { + conv = converters[ conv2 ]; + + // Otherwise, insert the intermediate dataType + } else if ( converters[ conv2 ] !== true ) { + current = tmp[ 0 ]; + dataTypes.unshift( tmp[ 1 ] ); + } + break; + } + } + } + } + + // Apply converter (if not an equivalence) + if ( conv !== true ) { + + // Unless errors are allowed to bubble, catch and return them + if ( conv && s.throws ) { + response = conv( response ); + } else { + try { + response = conv( response ); + } catch ( e ) { + return { + state: "parsererror", + error: conv ? e : "No conversion from " + prev + " to " + current + }; + } + } + } + } + } + } + + return { state: "success", data: response }; +} + +jQuery.extend( { + + // Counter for holding the number of active queries + active: 0, + + // Last-Modified header cache for next request + lastModified: {}, + etag: {}, + + ajaxSettings: { + url: location.href, + type: "GET", + isLocal: rlocalProtocol.test( location.protocol ), + global: true, + processData: true, + async: true, + contentType: "application/x-www-form-urlencoded; charset=UTF-8", + + /* + timeout: 0, + data: null, + dataType: null, + username: null, + password: null, + cache: null, + throws: false, + traditional: false, + headers: {}, + */ + + accepts: { + "*": allTypes, + text: "text/plain", + html: "text/html", + xml: "application/xml, text/xml", + json: "application/json, text/javascript" + }, + + contents: { + xml: /\bxml\b/, + html: /\bhtml/, + json: /\bjson\b/ + }, + + responseFields: { + xml: "responseXML", + text: "responseText", + json: "responseJSON" + }, + + // Data converters + // Keys separate source (or catchall "*") and destination types with a single space + converters: { + + // Convert anything to text + "* text": String, + + // Text to html (true = no transformation) + "text html": true, + + // Evaluate text as a json expression + "text json": JSON.parse, + + // Parse text as xml + "text xml": jQuery.parseXML + }, + + // For options that shouldn't be deep extended: + // you can add your own custom options here if + // and when you create one that shouldn't be + // deep extended (see ajaxExtend) + flatOptions: { + url: true, + context: true + } + }, + + // Creates a full fledged settings object into target + // with both ajaxSettings and settings fields. + // If target is omitted, writes into ajaxSettings. + ajaxSetup: function( target, settings ) { + return settings ? + + // Building a settings object + ajaxExtend( ajaxExtend( target, jQuery.ajaxSettings ), settings ) : + + // Extending ajaxSettings + ajaxExtend( jQuery.ajaxSettings, target ); + }, + + ajaxPrefilter: addToPrefiltersOrTransports( prefilters ), + ajaxTransport: addToPrefiltersOrTransports( transports ), + + // Main method + ajax: function( url, options ) { + + // If url is an object, simulate pre-1.5 signature + if ( typeof url === "object" ) { + options = url; + url = undefined; + } + + // Force options to be an object + options = options || {}; + + var transport, + + // URL without anti-cache param + cacheURL, + + // Response headers + responseHeadersString, + responseHeaders, + + // timeout handle + timeoutTimer, + + // Url cleanup var + urlAnchor, + + // Request state (becomes false upon send and true upon completion) + completed, + + // To know if global events are to be dispatched + fireGlobals, + + // Loop variable + i, + + // uncached part of the url + uncached, + + // Create the final options object + s = jQuery.ajaxSetup( {}, options ), + + // Callbacks context + callbackContext = s.context || s, + + // Context for global events is callbackContext if it is a DOM node or jQuery collection + globalEventContext = s.context && + ( callbackContext.nodeType || callbackContext.jquery ) ? + jQuery( callbackContext ) : + jQuery.event, + + // Deferreds + deferred = jQuery.Deferred(), + completeDeferred = jQuery.Callbacks( "once memory" ), + + // Status-dependent callbacks + statusCode = s.statusCode || {}, + + // Headers (they are sent all at once) + requestHeaders = {}, + requestHeadersNames = {}, + + // Default abort message + strAbort = "canceled", + + // Fake xhr + jqXHR = { + readyState: 0, + + // Builds headers hashtable if needed + getResponseHeader: function( key ) { + var match; + if ( completed ) { + if ( !responseHeaders ) { + responseHeaders = {}; + while ( ( match = rheaders.exec( responseHeadersString ) ) ) { + responseHeaders[ match[ 1 ].toLowerCase() ] = match[ 2 ]; + } + } + match = responseHeaders[ key.toLowerCase() ]; + } + return match == null ? null : match; + }, + + // Raw string + getAllResponseHeaders: function() { + return completed ? responseHeadersString : null; + }, + + // Caches the header + setRequestHeader: function( name, value ) { + if ( completed == null ) { + name = requestHeadersNames[ name.toLowerCase() ] = + requestHeadersNames[ name.toLowerCase() ] || name; + requestHeaders[ name ] = value; + } + return this; + }, + + // Overrides response content-type header + overrideMimeType: function( type ) { + if ( completed == null ) { + s.mimeType = type; + } + return this; + }, + + // Status-dependent callbacks + statusCode: function( map ) { + var code; + if ( map ) { + if ( completed ) { + + // Execute the appropriate callbacks + jqXHR.always( map[ jqXHR.status ] ); + } else { + + // Lazy-add the new callbacks in a way that preserves old ones + for ( code in map ) { + statusCode[ code ] = [ statusCode[ code ], map[ code ] ]; + } + } + } + return this; + }, + + // Cancel the request + abort: function( statusText ) { + var finalText = statusText || strAbort; + if ( transport ) { + transport.abort( finalText ); + } + done( 0, finalText ); + return this; + } + }; + + // Attach deferreds + deferred.promise( jqXHR ); + + // Add protocol if not provided (prefilters might expect it) + // Handle falsy url in the settings object (#10093: consistency with old signature) + // We also use the url parameter if available + s.url = ( ( url || s.url || location.href ) + "" ) + .replace( rprotocol, location.protocol + "//" ); + + // Alias method option to type as per ticket #12004 + s.type = options.method || options.type || s.method || s.type; + + // Extract dataTypes list + s.dataTypes = ( s.dataType || "*" ).toLowerCase().match( rnothtmlwhite ) || [ "" ]; + + // A cross-domain request is in order when the origin doesn't match the current origin. + if ( s.crossDomain == null ) { + urlAnchor = document.createElement( "a" ); + + // Support: IE <=8 - 11, Edge 12 - 13 + // IE throws exception on accessing the href property if url is malformed, + // e.g. http://example.com:80x/ + try { + urlAnchor.href = s.url; + + // Support: IE <=8 - 11 only + // Anchor's host property isn't correctly set when s.url is relative + urlAnchor.href = urlAnchor.href; + s.crossDomain = originAnchor.protocol + "//" + originAnchor.host !== + urlAnchor.protocol + "//" + urlAnchor.host; + } catch ( e ) { + + // If there is an error parsing the URL, assume it is crossDomain, + // it can be rejected by the transport if it is invalid + s.crossDomain = true; + } + } + + // Convert data if not already a string + if ( s.data && s.processData && typeof s.data !== "string" ) { + s.data = jQuery.param( s.data, s.traditional ); + } + + // Apply prefilters + inspectPrefiltersOrTransports( prefilters, s, options, jqXHR ); + + // If request was aborted inside a prefilter, stop there + if ( completed ) { + return jqXHR; + } + + // We can fire global events as of now if asked to + // Don't fire events if jQuery.event is undefined in an AMD-usage scenario (#15118) + fireGlobals = jQuery.event && s.global; + + // Watch for a new set of requests + if ( fireGlobals && jQuery.active++ === 0 ) { + jQuery.event.trigger( "ajaxStart" ); + } + + // Uppercase the type + s.type = s.type.toUpperCase(); + + // Determine if request has content + s.hasContent = !rnoContent.test( s.type ); + + // Save the URL in case we're toying with the If-Modified-Since + // and/or If-None-Match header later on + // Remove hash to simplify url manipulation + cacheURL = s.url.replace( rhash, "" ); + + // More options handling for requests with no content + if ( !s.hasContent ) { + + // Remember the hash so we can put it back + uncached = s.url.slice( cacheURL.length ); + + // If data is available, append data to url + if ( s.data ) { + cacheURL += ( rquery.test( cacheURL ) ? "&" : "?" ) + s.data; + + // #9682: remove data so that it's not used in an eventual retry + delete s.data; + } + + // Add or update anti-cache param if needed + if ( s.cache === false ) { + cacheURL = cacheURL.replace( rantiCache, "$1" ); + uncached = ( rquery.test( cacheURL ) ? "&" : "?" ) + "_=" + ( nonce++ ) + uncached; + } + + // Put hash and anti-cache on the URL that will be requested (gh-1732) + s.url = cacheURL + uncached; + + // Change '%20' to '+' if this is encoded form body content (gh-2658) + } else if ( s.data && s.processData && + ( s.contentType || "" ).indexOf( "application/x-www-form-urlencoded" ) === 0 ) { + s.data = s.data.replace( r20, "+" ); + } + + // Set the If-Modified-Since and/or If-None-Match header, if in ifModified mode. + if ( s.ifModified ) { + if ( jQuery.lastModified[ cacheURL ] ) { + jqXHR.setRequestHeader( "If-Modified-Since", jQuery.lastModified[ cacheURL ] ); + } + if ( jQuery.etag[ cacheURL ] ) { + jqXHR.setRequestHeader( "If-None-Match", jQuery.etag[ cacheURL ] ); + } + } + + // Set the correct header, if data is being sent + if ( s.data && s.hasContent && s.contentType !== false || options.contentType ) { + jqXHR.setRequestHeader( "Content-Type", s.contentType ); + } + + // Set the Accepts header for the server, depending on the dataType + jqXHR.setRequestHeader( + "Accept", + s.dataTypes[ 0 ] && s.accepts[ s.dataTypes[ 0 ] ] ? + s.accepts[ s.dataTypes[ 0 ] ] + + ( s.dataTypes[ 0 ] !== "*" ? ", " + allTypes + "; q=0.01" : "" ) : + s.accepts[ "*" ] + ); + + // Check for headers option + for ( i in s.headers ) { + jqXHR.setRequestHeader( i, s.headers[ i ] ); + } + + // Allow custom headers/mimetypes and early abort + if ( s.beforeSend && + ( s.beforeSend.call( callbackContext, jqXHR, s ) === false || completed ) ) { + + // Abort if not done already and return + return jqXHR.abort(); + } + + // Aborting is no longer a cancellation + strAbort = "abort"; + + // Install callbacks on deferreds + completeDeferred.add( s.complete ); + jqXHR.done( s.success ); + jqXHR.fail( s.error ); + + // Get transport + transport = inspectPrefiltersOrTransports( transports, s, options, jqXHR ); + + // If no transport, we auto-abort + if ( !transport ) { + done( -1, "No Transport" ); + } else { + jqXHR.readyState = 1; + + // Send global event + if ( fireGlobals ) { + globalEventContext.trigger( "ajaxSend", [ jqXHR, s ] ); + } + + // If request was aborted inside ajaxSend, stop there + if ( completed ) { + return jqXHR; + } + + // Timeout + if ( s.async && s.timeout > 0 ) { + timeoutTimer = window.setTimeout( function() { + jqXHR.abort( "timeout" ); + }, s.timeout ); + } + + try { + completed = false; + transport.send( requestHeaders, done ); + } catch ( e ) { + + // Rethrow post-completion exceptions + if ( completed ) { + throw e; + } + + // Propagate others as results + done( -1, e ); + } + } + + // Callback for when everything is done + function done( status, nativeStatusText, responses, headers ) { + var isSuccess, success, error, response, modified, + statusText = nativeStatusText; + + // Ignore repeat invocations + if ( completed ) { + return; + } + + completed = true; + + // Clear timeout if it exists + if ( timeoutTimer ) { + window.clearTimeout( timeoutTimer ); + } + + // Dereference transport for early garbage collection + // (no matter how long the jqXHR object will be used) + transport = undefined; + + // Cache response headers + responseHeadersString = headers || ""; + + // Set readyState + jqXHR.readyState = status > 0 ? 4 : 0; + + // Determine if successful + isSuccess = status >= 200 && status < 300 || status === 304; + + // Get response data + if ( responses ) { + response = ajaxHandleResponses( s, jqXHR, responses ); + } + + // Convert no matter what (that way responseXXX fields are always set) + response = ajaxConvert( s, response, jqXHR, isSuccess ); + + // If successful, handle type chaining + if ( isSuccess ) { + + // Set the If-Modified-Since and/or If-None-Match header, if in ifModified mode. + if ( s.ifModified ) { + modified = jqXHR.getResponseHeader( "Last-Modified" ); + if ( modified ) { + jQuery.lastModified[ cacheURL ] = modified; + } + modified = jqXHR.getResponseHeader( "etag" ); + if ( modified ) { + jQuery.etag[ cacheURL ] = modified; + } + } + + // if no content + if ( status === 204 || s.type === "HEAD" ) { + statusText = "nocontent"; + + // if not modified + } else if ( status === 304 ) { + statusText = "notmodified"; + + // If we have data, let's convert it + } else { + statusText = response.state; + success = response.data; + error = response.error; + isSuccess = !error; + } + } else { + + // Extract error from statusText and normalize for non-aborts + error = statusText; + if ( status || !statusText ) { + statusText = "error"; + if ( status < 0 ) { + status = 0; + } + } + } + + // Set data for the fake xhr object + jqXHR.status = status; + jqXHR.statusText = ( nativeStatusText || statusText ) + ""; + + // Success/Error + if ( isSuccess ) { + deferred.resolveWith( callbackContext, [ success, statusText, jqXHR ] ); + } else { + deferred.rejectWith( callbackContext, [ jqXHR, statusText, error ] ); + } + + // Status-dependent callbacks + jqXHR.statusCode( statusCode ); + statusCode = undefined; + + if ( fireGlobals ) { + globalEventContext.trigger( isSuccess ? "ajaxSuccess" : "ajaxError", + [ jqXHR, s, isSuccess ? success : error ] ); + } + + // Complete + completeDeferred.fireWith( callbackContext, [ jqXHR, statusText ] ); + + if ( fireGlobals ) { + globalEventContext.trigger( "ajaxComplete", [ jqXHR, s ] ); + + // Handle the global AJAX counter + if ( !( --jQuery.active ) ) { + jQuery.event.trigger( "ajaxStop" ); + } + } + } + + return jqXHR; + }, + + getJSON: function( url, data, callback ) { + return jQuery.get( url, data, callback, "json" ); + }, + + getScript: function( url, callback ) { + return jQuery.get( url, undefined, callback, "script" ); + } +} ); + +jQuery.each( [ "get", "post" ], function( i, method ) { + jQuery[ method ] = function( url, data, callback, type ) { + + // Shift arguments if data argument was omitted + if ( jQuery.isFunction( data ) ) { + type = type || callback; + callback = data; + data = undefined; + } + + // The url can be an options object (which then must have .url) + return jQuery.ajax( jQuery.extend( { + url: url, + type: method, + dataType: type, + data: data, + success: callback + }, jQuery.isPlainObject( url ) && url ) ); + }; +} ); + + +jQuery._evalUrl = function( url ) { + return jQuery.ajax( { + url: url, + + // Make this explicit, since user can override this through ajaxSetup (#11264) + type: "GET", + dataType: "script", + cache: true, + async: false, + global: false, + "throws": true + } ); +}; + + +jQuery.fn.extend( { + wrapAll: function( html ) { + var wrap; + + if ( this[ 0 ] ) { + if ( jQuery.isFunction( html ) ) { + html = html.call( this[ 0 ] ); + } + + // The elements to wrap the target around + wrap = jQuery( html, this[ 0 ].ownerDocument ).eq( 0 ).clone( true ); + + if ( this[ 0 ].parentNode ) { + wrap.insertBefore( this[ 0 ] ); + } + + wrap.map( function() { + var elem = this; + + while ( elem.firstElementChild ) { + elem = elem.firstElementChild; + } + + return elem; + } ).append( this ); + } + + return this; + }, + + wrapInner: function( html ) { + if ( jQuery.isFunction( html ) ) { + return this.each( function( i ) { + jQuery( this ).wrapInner( html.call( this, i ) ); + } ); + } + + return this.each( function() { + var self = jQuery( this ), + contents = self.contents(); + + if ( contents.length ) { + contents.wrapAll( html ); + + } else { + self.append( html ); + } + } ); + }, + + wrap: function( html ) { + var isFunction = jQuery.isFunction( html ); + + return this.each( function( i ) { + jQuery( this ).wrapAll( isFunction ? html.call( this, i ) : html ); + } ); + }, + + unwrap: function( selector ) { + this.parent( selector ).not( "body" ).each( function() { + jQuery( this ).replaceWith( this.childNodes ); + } ); + return this; + } +} ); + + +jQuery.expr.pseudos.hidden = function( elem ) { + return !jQuery.expr.pseudos.visible( elem ); +}; +jQuery.expr.pseudos.visible = function( elem ) { + return !!( elem.offsetWidth || elem.offsetHeight || elem.getClientRects().length ); +}; + + + + +jQuery.ajaxSettings.xhr = function() { + try { + return new window.XMLHttpRequest(); + } catch ( e ) {} +}; + +var xhrSuccessStatus = { + + // File protocol always yields status code 0, assume 200 + 0: 200, + + // Support: IE <=9 only + // #1450: sometimes IE returns 1223 when it should be 204 + 1223: 204 + }, + xhrSupported = jQuery.ajaxSettings.xhr(); + +support.cors = !!xhrSupported && ( "withCredentials" in xhrSupported ); +support.ajax = xhrSupported = !!xhrSupported; + +jQuery.ajaxTransport( function( options ) { + var callback, errorCallback; + + // Cross domain only allowed if supported through XMLHttpRequest + if ( support.cors || xhrSupported && !options.crossDomain ) { + return { + send: function( headers, complete ) { + var i, + xhr = options.xhr(); + + xhr.open( + options.type, + options.url, + options.async, + options.username, + options.password + ); + + // Apply custom fields if provided + if ( options.xhrFields ) { + for ( i in options.xhrFields ) { + xhr[ i ] = options.xhrFields[ i ]; + } + } + + // Override mime type if needed + if ( options.mimeType && xhr.overrideMimeType ) { + xhr.overrideMimeType( options.mimeType ); + } + + // X-Requested-With header + // For cross-domain requests, seeing as conditions for a preflight are + // akin to a jigsaw puzzle, we simply never set it to be sure. + // (it can always be set on a per-request basis or even using ajaxSetup) + // For same-domain requests, won't change header if already provided. + if ( !options.crossDomain && !headers[ "X-Requested-With" ] ) { + headers[ "X-Requested-With" ] = "XMLHttpRequest"; + } + + // Set headers + for ( i in headers ) { + xhr.setRequestHeader( i, headers[ i ] ); + } + + // Callback + callback = function( type ) { + return function() { + if ( callback ) { + callback = errorCallback = xhr.onload = + xhr.onerror = xhr.onabort = xhr.onreadystatechange = null; + + if ( type === "abort" ) { + xhr.abort(); + } else if ( type === "error" ) { + + // Support: IE <=9 only + // On a manual native abort, IE9 throws + // errors on any property access that is not readyState + if ( typeof xhr.status !== "number" ) { + complete( 0, "error" ); + } else { + complete( + + // File: protocol always yields status 0; see #8605, #14207 + xhr.status, + xhr.statusText + ); + } + } else { + complete( + xhrSuccessStatus[ xhr.status ] || xhr.status, + xhr.statusText, + + // Support: IE <=9 only + // IE9 has no XHR2 but throws on binary (trac-11426) + // For XHR2 non-text, let the caller handle it (gh-2498) + ( xhr.responseType || "text" ) !== "text" || + typeof xhr.responseText !== "string" ? + { binary: xhr.response } : + { text: xhr.responseText }, + xhr.getAllResponseHeaders() + ); + } + } + }; + }; + + // Listen to events + xhr.onload = callback(); + errorCallback = xhr.onerror = callback( "error" ); + + // Support: IE 9 only + // Use onreadystatechange to replace onabort + // to handle uncaught aborts + if ( xhr.onabort !== undefined ) { + xhr.onabort = errorCallback; + } else { + xhr.onreadystatechange = function() { + + // Check readyState before timeout as it changes + if ( xhr.readyState === 4 ) { + + // Allow onerror to be called first, + // but that will not handle a native abort + // Also, save errorCallback to a variable + // as xhr.onerror cannot be accessed + window.setTimeout( function() { + if ( callback ) { + errorCallback(); + } + } ); + } + }; + } + + // Create the abort callback + callback = callback( "abort" ); + + try { + + // Do send the request (this may raise an exception) + xhr.send( options.hasContent && options.data || null ); + } catch ( e ) { + + // #14683: Only rethrow if this hasn't been notified as an error yet + if ( callback ) { + throw e; + } + } + }, + + abort: function() { + if ( callback ) { + callback(); + } + } + }; + } +} ); + + + + +// Prevent auto-execution of scripts when no explicit dataType was provided (See gh-2432) +jQuery.ajaxPrefilter( function( s ) { + if ( s.crossDomain ) { + s.contents.script = false; + } +} ); + +// Install script dataType +jQuery.ajaxSetup( { + accepts: { + script: "text/javascript, application/javascript, " + + "application/ecmascript, application/x-ecmascript" + }, + contents: { + script: /\b(?:java|ecma)script\b/ + }, + converters: { + "text script": function( text ) { + jQuery.globalEval( text ); + return text; + } + } +} ); + +// Handle cache's special case and crossDomain +jQuery.ajaxPrefilter( "script", function( s ) { + if ( s.cache === undefined ) { + s.cache = false; + } + if ( s.crossDomain ) { + s.type = "GET"; + } +} ); + +// Bind script tag hack transport +jQuery.ajaxTransport( "script", function( s ) { + + // This transport only deals with cross domain requests + if ( s.crossDomain ) { + var script, callback; + return { + send: function( _, complete ) { + script = jQuery( " + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

API Reference¶

+

The API documentation aims to provide a complete reference to the +Freedom Metal API.

+

The API documentation is split into sections corresponding to each feature:

+
+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/button.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/button.html new file mode 100644 index 000000000..4fa1de895 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/button.html @@ -0,0 +1,184 @@ + + + + + + + + Buttons — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Buttons¶

+

API for interfacing with physical buttons

+
+

Functions

+
+
+struct metal_button *metal_button_get(char *label)¶
+

Get a reference to a button.

+

+
Return
+
A handle for the button
+
Parameters
+
    +
  • label: The DeviceTree label for the button
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_button_interrupt_controller(struct metal_button *button)¶
+

Get the interrupt controller for a button.

+

+
Return
+
A pointer to the interrupt controller responsible for handling button interrupts.
+
Parameters
+
    +
  • button: The handle for the button
    • +
+
+
+

+
+ +
+
+int metal_button_get_interrupt_id(struct metal_button *button)¶
+

Get the interrupt id for a button.

+

+
Return
+
The interrupt id corresponding to a button.
+
Parameters
+
    +
  • button: The handle for the button
    • +
+
+
+

+
+ +
+
+
+struct metal_button¶
+
#include <button.h>

A button device handle.

+

A struct metal_button is an implementation-defined object which represents a button on a development board.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cache.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cache.html new file mode 100644 index 000000000..b02c6ef40 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cache.html @@ -0,0 +1,184 @@ + + + + + + + + Caches — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Caches¶

+

API for configuring caches.

+
+

Functions

+
+
+void metal_cache_init(struct metal_cache *cache, int ways)¶
+

Initialize a cache.

+

Initializes a cache with the requested number of ways enabled.

+
+
Parameters
+
    +
  • cache: The handle for the cache to initialize
    • +
  • ways: The number of ways to enable
    • +
+
+
+

+
+ +
+
+int metal_cache_get_enabled_ways(struct metal_cache *cache)¶
+

Get the current number of enabled cache ways.

+

+
Return
+
The current number of enabled cache ways
+
Parameters
+
    +
  • cache: The handle for the cache
    • +
+
+
+

+
+ +
+
+int metal_cache_set_enabled_ways(struct metal_cache *cache, int ways)¶
+

Enable the requested number of cache ways.

+

+
Return
+
0 if the ways are successfully enabled
+
Parameters
+
    +
  • cache: The handle for the cache
    • +
  • ways: The number of ways to enabled
    • +
+
+
+

+
+ +
+
+
+struct metal_cache¶
+
#include <cache.h>

a handle for a cache

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/clock.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/clock.html new file mode 100644 index 000000000..b14f4cbb6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/clock.html @@ -0,0 +1,220 @@ + + + + + + + + Clocks — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Clocks¶

+

API for manipulating clock sources.

+

The clock interface allows for controlling the rate of various clocks in the system.

+
+

Typedefs

+
+
+typedef void (*metal_clock_pre_rate_change_callback)(void *priv)¶
+

Function signature of clock pre-rate change callbacks.

+
+ +
+
+typedef void (*metal_clock_post_rate_change_callback)(void *priv)¶
+

Function signature of clock post-rate change callbacks.

+
+ +
+
+

Functions

+
+
+long metal_clock_get_rate_hz(const struct metal_clock *clk)¶
+

Returns the current rate of the given clock.

+

+
Return
+
The current rate of the clock in Hz
+
Parameters
+
    +
  • clk: The handle for the clock
    • +
+
+
+

+
+ +
+
+long metal_clock_set_rate_hz(struct metal_clock *clk, long hz)¶
+

Set the current rate of a clock.

+

Attempts to set the current rate of the given clock to as close as possible to the given rate in Hz. Returns the actual value that’s been selected, which could be anything!

+
+
Return
+
The new rate of the clock in Hz.
+
Parameters
+
    +
  • clk: The handle for the clock
    • +
  • hz: The desired rate in Hz
    • +
+
+
+

+

Prior to and after the rate change of the clock, this will call the registered pre- and post-rate change callbacks.

+
+ +
+
+void metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, metal_clock_pre_rate_change_callback cb, void *priv)¶
+

Register a callback that must be called before a rate change.

+

+
Parameters
+
    +
  • clk: The handle for the clock
    • +
  • cb: The callback to be registered
    • +
  • priv: Private data for the callback handler
    • +
+
+
+

+
+ +
+
+void metal_clock_register_post_rate_change_callback(struct metal_clock *clk, metal_clock_post_rate_change_callback cb, void *priv)¶
+

Registers a callback that must be called after a rate change.

+

+
Parameters
+
    +
  • clk: The handle for the clock
    • +
  • cb: The callback to be registered
    • +
  • priv: Private data for the callback handler
    • +
+
+
+

+
+ +
+
+
+struct metal_clock¶
+
#include <clock.h>

The handle for a clock.

+

Clocks are defined as a pointer to a struct metal_clock, the contents of which are implementation defined. Users of the clock interface must call functions which accept a struct metal_clock * as an argument to interract with the clock.

+

Note that no mechanism for obtaining a pointer to a struct metal_clock has been defined, making it impossible to call any of these functions without invoking implementation-defined behavior.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cpu.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cpu.html new file mode 100644 index 000000000..eff5b30ad --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/cpu.html @@ -0,0 +1,465 @@ + + + + + + + + CPU — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

CPU¶

+

API for accessing CPU capabilities.

+
+

Typedefs

+
+
+typedef void (*metal_exception_handler_t)(struct metal_cpu *cpu, int ecode)¶
+

Function signature for exception handlers.

+
+ +
+
+

Functions

+
+
+struct metal_cpu *metal_cpu_get(int hartid)¶
+

Get a reference to a CPU hart.

+

+
Return
+
A pointer to the CPU device handle
+
Parameters
+
    +
  • hartid: The ID of the desired CPU hart
    • +
+
+
+

+
+ +
+
+int metal_cpu_get_current_hartid()¶
+

Get the hartid of the CPU hart executing this function.

+

+
Return
+
The hartid of the current CPU hart
+
+

+
+ +
+
+int metal_cpu_get_num_harts()¶
+

Get the number of CPU harts.

+

+
Return
+
The number of CPU harts
+
+

+
+ +
+
+unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu)¶
+

Get the CPU cycle count timer value.

+

Get the value of the cycle count timer for a given CPU

+

+
Return
+
The value of the CPU cycle count timer
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu)¶
+

Get the timebase of the CPU.

+

Get the value of the timebase of the cycle count timer

+

+
Return
+
The value of the cycle count timer timebase
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu)¶
+

Get the value of the mtime RTC.

+

Get the value of the mtime real-time clock. The CPU interrupt controller must be initialized before this function is called or the return value will be 0.

+

+
Return
+
The value of mtime, or 0 if failure
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, unsigned long long time)¶
+

Set the value of the RTC mtimecmp RTC.

+

Set the value of the mtime real-time clock compare register. The CPU interrupt controller must be initialized before this function is called or the return value will be -1;

+

+
Return
+
The value of mtimecmp or -1 if error
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
  • time: The value to set the compare register to
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu)¶
+

Get a reference to RTC timer interrupt controller.

+

Get a reference to the interrupt controller for the real-time clock interrupt. The controller returned by this function must be initialized before any interrupts are registered or enabled with it.

+

+
Return
+
A pointer to the timer interrupt handle
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu)¶
+

Get the RTC timer interrupt id.

+

Get the interrupt ID of the real-time clock interrupt

+

+
Return
+
The timer interrupt ID
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_cpu_software_interrupt_controller(struct metal_cpu *cpu)¶
+

Get a reference to the software interrupt controller.

+

Get a reference to the interrupt controller for the software/inter-process interrupt. The controller returned by this function must be initialized before any interrupts are registered or enabled with it.

+

+
Return
+
A pointer to the software interrupt handle
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu)¶
+

Get the software interrupt id.

+

Get the interrupt ID for the software/inter-process interrupt

+

+
Return
+
the software interrupt ID
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid)¶
+

Set the inter-process interrupt for a hart.

+

Trigger a software/inter-process interrupt for a hart. The CPU interrupt controller for the CPU handle passed to this function must be initialized before this function is called.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
  • hartid: The CPU hart ID to be interrupted
    • +
+
+
+

+
+ +
+
+int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid)¶
+

Clear the inter-process interrupt for a hart.

+

Clear the software/inter-process interrupt for a hart. The CPU interrupt controller for the CPU handle passed to this function must be initialized before this function is called.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
  • hartid: The CPU hart ID to clear
    • +
+
+
+

+
+ +
+
+int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid)¶
+

Get the value of MSIP for the given hart.

+

Get the value of the machine software interrupt pending bit for the given hart. The CPU interrupt controller for the CPU handle passed as argument to this function must be initialized before this function is called.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • cpu: the CPU device handle
    • +
  • hartid: The CPU hart to read
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_cpu_interrupt_controller(struct metal_cpu *cpu)¶
+

Get the interrupt controller for the CPU.

+

Get the CPU interrupt controller. The controller returned by this function must be initialized before any interrupts are registered or enabled and before any exception handlers are registered with this CPU.

+

+
Return
+
The handle for the CPU interrupt controller
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler)¶
+

Register an exception handler.

+

Register an exception handler for the CPU. The CPU interrupt controller must be initialized before this function is called.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
  • ecode: The exception code to register a handler for
    • +
  • handler: Callback function for the exception handler
    • +
+
+
+

+
+ +
+
+int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc)¶
+

Get the length of an instruction in bytes.

+

Get the length of an instruction in bytes.

+

On RISC-V platforms, this is useful for detecting whether an instruction is compressed (2 bytes long) or uncompressed (4 bytes long).

+

This function is useful in conjuction with metal_cpu_get_exception_pc() and metal_cpu_set_exception_pc() in order to cause the exception handler to return execution after the faulting instruction.

+

+
Return
+
the length of the instruction in bytes
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
  • epc: The address of the instruction to measure
    • +
+
+
+

+
+ +
+
+uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu)¶
+

Get the program counter of the current exception.

+

This function must be called within an exception handler. The behavior is undefined outside of an exception handler.

+

+
Return
+
The value of the program counter at the time of the exception
+
Parameters
+
    +
  • cpu: The CPU device handle
    • +
+
+
+

+
+ +
+
+int metal_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t epc)¶
+

Set the exception program counter.

+

This function must be called within an exception handler. The behavior is undefined outside of an exception handler.

+

This function can be used to cause an exception handler to return execution to an address other than the one that caused the exception.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • cpu: the CPU device handle
    • +
  • epc: The address to set the exception program counter to
    • +
+
+
+

+
+ +
+
+
+struct metal_cpu¶
+
#include <cpu.h>

A device handle for a CPU hart.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/gpio.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/gpio.html new file mode 100644 index 000000000..70d802e00 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/gpio.html @@ -0,0 +1,272 @@ + + + + + + + + GPIO — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

GPIO¶

+

API for manipulating general-purpose input/output.

+
+

Functions

+
+
+struct metal_gpio *metal_gpio_get_device(int device_num)¶
+

Get a GPIO device handle.

+

+
Return
+
The GPIO device handle, or NULL if there is no device at that index
+
Parameters
+
    +
  • device_num: The GPIO device index
    • +
+
+
+

+
+ +
+
+int metal_gpio_disable_input(struct metal_gpio *gpio, int pin)¶
+

Disable input on a pin.

+

+
Return
+
0 if the input is successfully disabled
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
+
+
+

+
+ +
+
+int metal_gpio_enable_output(struct metal_gpio *gpio, int pin)¶
+

Enable output on a pin.

+

+
Return
+
0 if the output is successfully enabled
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
+
+
+

+
+ +
+
+int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value)¶
+

Set the output value of a GPIO pin.

+

+
Return
+
0 if the output is successfully set
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
  • value: The value to set the pin to
    • +
+
+
+

+
+ +
+
+int metal_gpio_get_pin(struct metal_gpio *gpio, int pin)¶
+

Get the value of the GPIO pin.

+

+
Return
+
The value of the GPIO pin
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
+
+
+

+
+ +
+
+int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin)¶
+

Clears the value of the GPIO pin.

+

+
Return
+
0 if the pin is successfully cleared
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
+
+
+

+
+ +
+
+int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin)¶
+

Toggles the value of the GPIO pin.

+

+
Return
+
0 if the pin is successfully toggled
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The pin number indexed from 0
    • +
+
+
+

+
+ +
+
+int metal_gpio_enable_pinmux(struct metal_gpio *gpio, int pin, int io_function)¶
+

Enables and sets the pinmux for a GPIO pin.

+

+
Return
+
0 if the pinmux is successfully set
+
Parameters
+
    +
  • gpio: The handle for the GPIO interface
    • +
  • pin: The bitmask for the pin to enable pinmux on
    • +
  • io_function: The IO function to set
    • +
+
+
+

+
+ +
+
+
+struct metal_gpio¶
+
#include <gpio.h>

The handle for a GPIO interface.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/interrupt.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/interrupt.html new file mode 100644 index 000000000..e796903c6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/interrupt.html @@ -0,0 +1,283 @@ + + + + + + + + Interrupts — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Interrupts¶

+

API for registering and manipulating interrupts.

+
+

Typedefs

+
+
+typedef enum metal_vector_mode_ metal_vector_mode¶
+

Possible mode of interrupts to operate.

+
+ +
+
+typedef void (*metal_interrupt_handler_t)(int, void *)¶
+

Function signature for interrupt callback handlers.

+
+ +
+
+

Enums

+
+
+enum metal_vector_mode_¶
+

Possible mode of interrupts to operate.

+

Values:

+
+
+METAL_DIRECT_MODE = 0¶
+
+ +
+
+METAL_VECTOR_MODE = 1¶
+
+ +
+
+METAL_SELECTIVE_VECTOR_MODE = 2¶
+
+ +
+
+METAL_HARDWARE_VECTOR_MODE = 3¶
+
+ +
+ +
+
+

Functions

+
+
+void metal_interrupt_init(struct metal_interrupt *controller)¶
+

Initialize a given interrupt controller.

+

Initialize a given interrupt controller. This function must be called before any interrupts are registered or enabled with the handler. It is invalid to initialize an interrupt controller more than once.

+

+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
+
+
+

+
+ +
+
+int metal_interrupt_register_handler(struct metal_interrupt *controller, int id, metal_interrupt_handler_t handler, void *priv_data)¶
+

Register an interrupt handler.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
  • id: The interrupt ID to register
    • +
  • handler: The interrupt handler callback
    • +
  • priv_data: Private data for the interrupt handler
    • +
+
+
+

+
+ +
+
+int metal_interrupt_enable(struct metal_interrupt *controller, int id)¶
+

Enable an interrupt.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
  • id: The interrupt ID to enable
    • +
+
+
+

+
+ +
+
+int metal_interrupt_disable(struct metal_interrupt *controller, int id)¶
+

Disable an interrupt.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
  • id: The interrupt ID to disable
    • +
+
+
+

+
+ +
+
+int metal_interrupt_vector_enable(struct metal_interrupt *controller, int id, metal_vector_mode mode)¶
+

Enable an interrupt vector.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
  • id: The interrupt ID to enable
    • +
  • mode: The interrupt mode type to enable
    • +
+
+
+

+
+ +
+
+int metal_interrupt_vector_disable(struct metal_interrupt *controller, int id)¶
+

Disable an interrupt vector.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • controller: The handle for the interrupt controller
    • +
  • id: The interrupt ID to disable
    • +
+
+
+

+
+ +
+
+
+struct metal_interrupt¶
+
#include <interrupt.h>

A handle for an interrupt.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/itim.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/itim.html new file mode 100644 index 000000000..b27bace15 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/itim.html @@ -0,0 +1,136 @@ + + + + + + + + ITIM — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

ITIM¶

+

API for manipulating ITIM allocation

+
+

Defines

+
+
+METAL_PLACE_IN_ITIM
+

Link a function into the ITIM.

+

Link a function into the ITIM (Instruction Tightly Integrated Memory) if the ITIM is present on the target device.

+
+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/led.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/led.html new file mode 100644 index 000000000..da05d06c6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/led.html @@ -0,0 +1,224 @@ + + + + + + + + LEDs — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

LEDs¶

+

API for manipulating LEDs.

+
+

Functions

+
+
+struct metal_led *metal_led_get(char *label)¶
+

Get a handle for an LED.

+

+
Return
+
A handle to the LED, or NULL if none is found for the requested label
+
Parameters
+
    +
  • label: The DeviceTree label for the desired LED
    • +
+
+
+

+
+ +
+
+struct metal_led *metal_led_get_rgb(char *label, char *color)¶
+

Get a handle for a channel of an RGB LED.

+

+
Return
+
A handle to the LED, or NULL if none is found for the requested label and color
+
Parameters
+
    +
  • label: The DeviceTree label for the desired LED
    • +
  • color: The color for the LED in the DeviceTree
    • +
+
+
+

+
+ +
+
+void metal_led_enable(struct metal_led *led)¶
+

Enable an LED.

+

+
Parameters
+
    +
  • led: The handle for the LED
    • +
+
+
+

+
+ +
+
+void metal_led_on(struct metal_led *led)¶
+

Turn an LED on.

+

+
Parameters
+
    +
  • led: The handle for the LED
    • +
+
+
+

+
+ +
+
+void metal_led_off(struct metal_led *led)¶
+

Turn an LED off.

+

+
Parameters
+
    +
  • led: The handle for the LED
    • +
+
+
+

+
+ +
+
+void metal_led_toggle(struct metal_led *led)¶
+

Toggle the on/off state of an LED.

+

+
Parameters
+
    +
  • led: The handle for the LED
    • +
+
+
+

+
+ +
+
+
+struct metal_led¶
+
#include <led.h>

A handle for an LED.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/lock.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/lock.html new file mode 100644 index 000000000..a04e89721 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/lock.html @@ -0,0 +1,196 @@ + + + + + + + + Locks — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Locks¶

+

An API for creating and using a software lock/mutex.

+
+

Defines

+
+
+METAL_LOCK_DECLARE(name)¶
+

Declare a lock.

+

Locks must be declared with METAL_LOCK_DECLARE to ensure that the lock is linked into a memory region which supports atomic memory operations.

+
+ +
+
+

Functions

+
+
+int metal_lock_init(struct metal_lock *lock)¶
+

Initialize a lock.

+

If the lock cannot be initialized, attempts to take or give the lock will result in a Store/AMO access fault.

+
+
Return
+
0 if the lock is successfully initialized. A non-zero code indicates failure.
+
Parameters
+
    +
  • lock: The handle for a lock
    • +
+
+
+

+
+ +
+
+int metal_lock_take(struct metal_lock *lock)¶
+

Take a lock.

+

If the lock initialization failed, attempts to take a lock will result in a Store/AMO access fault.

+
+
Return
+
0 if the lock is successfully taken
+
Parameters
+
    +
  • lock: The handle for a lock
    • +
+
+
+

+
+ +
+
+int metal_lock_give(struct metal_lock *lock)¶
+

Give back a held lock.

+

If the lock initialization failed, attempts to give a lock will result in a Store/AMO access fault.

+
+
Return
+
0 if the lock is successfully given
+
Parameters
+
    +
  • lock: The handle for a lock
    • +
+
+
+

+
+ +
+
+
+struct metal_lock¶
+
#include <lock.h>

A handle for a lock.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/memory.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/memory.html new file mode 100644 index 000000000..54bdb970e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/memory.html @@ -0,0 +1,216 @@ + + + + + + + + Memory Enumeration — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Memory Enumeration¶

+

API for enumerating memory blocks.

+
+

Functions

+
+
+struct metal_memory *metal_get_memory_from_address(const uintptr_t address)¶
+

Get the memory block which services the given address.

+

Given a physical memory address, get a handle for the memory block to which that address is mapped.

+

+
Return
+
The memory block handle, or NULL if the address is not mapped to a memory block
+
Parameters
+
    +
  • address: The address to query
    • +
+
+
+

+
+ +
+
+uintptr_t metal_memory_get_base_address(const struct metal_memory *memory)¶
+

Get the base address for a memory block.

+

+
Return
+
The base address of the memory block
+
Parameters
+
    +
  • memory: The handle for the memory block
    • +
+
+
+

+
+ +
+
+size_t metal_memory_get_size(const struct metal_memory *memory)¶
+

Get the size of a memory block.

+

+
Return
+
The size of the memory block
+
Parameters
+
    +
  • memory: The handle for the memory block
    • +
+
+
+

+
+ +
+
+int metal_memory_supports_atomics(const struct metal_memory *memory)¶
+

Query if a memory block supports atomic operations.

+

+
Return
+
nonzero if the memory block supports atomic operations
+
Parameters
+
    +
  • memory: The handle for the memory block
    • +
+
+
+

+
+ +
+
+int metal_memory_is_cachable(const struct metal_memory *memory)¶
+

Query if a memory block is cacheable.

+

+
Return
+
nonzero if the memory block is cachable
+
Parameters
+
    +
  • memory: The handle for the memory block
    • +
+
+
+

+
+ +
+
+
+struct metal_memory¶
+
#include <memory.h>

A handle for a memory block.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/pmp.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/pmp.html new file mode 100644 index 000000000..262b7a413 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/pmp.html @@ -0,0 +1,481 @@ + + + + + + + + PMPs — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

PMPs¶

+

API for Configuring Physical Memory Protection on RISC-V Cores.

+

The Physical Memory Protection (PMP) interface on RISC-V cores is a form of memory protection unit which allows for a finite number of physical memory regions to be configured with certain access permissions.

+

Additional information about the use and configuration rules for PMPs can be found by reading the RISC-V Privileged Architecture Specification.

+
+

Enums

+
+
+enum metal_pmp_address_mode¶
+

Set of available PMP addressing modes.

+

Values:

+
+
+METAL_PMP_OFF = 0¶
+

Disable the PMP region.

+
+ +
+
+METAL_PMP_TOR = 1¶
+

Use Top-of-Range mode.

+
+ +
+
+METAL_PMP_NA4 = 2¶
+

Use naturally-aligned 4-byte region mode.

+
+ +
+
+METAL_PMP_NAPOT = 3¶
+

Use naturally-aligned power-of-two mode.

+
+ +
+ +
+
+

Functions

+
+
+struct metal_pmp *metal_pmp_get_device(void)¶
+

Get the PMP device handle.

+
+ +
+
+void metal_pmp_init(struct metal_pmp *pmp)¶
+

Initialize the PMP.

+

The PMP initialization routine is optional and may be called as many times as is desired. The effect of the initialization routine is to attempt to set all regions to unlocked and disabled, as well as to clear the X, W, and R bits. Only the pmp configuration of the hart which executes the routine will be affected.

+
+
Parameters
+
    +
  • pmp: The PMP device handle to be initialized
    • +
+
+
+

+

If any regions are fused to preset values by the implementation or locked, those PMP regions will silently remain uninitialized.

+
+ +
+
+int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config config, size_t address)¶
+

Configure a PMP region.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to configure
    • +
  • config: The desired configuration of the PMP region
    • +
  • address: The desired address of the PMP region
    • +
+
+
+

+
+ +
+
+int metal_pmp_get_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config *config, size_t *address)¶
+

Get the configuration for a PMP region.

+

+
Return
+
0 if the region is read successfully
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
  • config: Variable to store the PMP region configuration
    • +
  • address: Variable to store the PMP region address
    • +
+
+
+

+
+ +
+
+int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region)¶
+

Lock a PMP region.

+

+
Return
+
0 if the region is successfully locked
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to lock
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address)¶
+

Set the address for a PMP region.

+

+
Return
+
0 if the address is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • address: The desired address of the PMP region
    • +
+
+
+

+
+ +
+
+size_t metal_pmp_get_address(struct metal_pmp *pmp, unsigned int region)¶
+

Get the address of a PMP region.

+

+
Return
+
The address of the PMP region, or 0 if the region could not be read
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum metal_pmp_address_mode mode)¶
+

Set the addressing mode of a PMP region.

+

+
Return
+
0 if the addressing mode is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • mode: The PMP addressing mode to set
    • +
+
+
+

+
+ +
+
+enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, unsigned int region)¶
+

Get the addressing mode of a PMP region.

+

+
Return
+
The address mode of the PMP region
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_executable(struct metal_pmp *pmp, unsigned int region, int X)¶
+

Set the executable bit for a PMP region.

+

+
Return
+
0 if the executable bit is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • X: The desired value of the executable bit
    • +
+
+
+

+
+ +
+
+int metal_pmp_get_executable(struct metal_pmp *pmp, unsigned int region)¶
+

Get the executable bit for a PMP region.

+

+
Return
+
the value of the executable bit
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_writeable(struct metal_pmp *pmp, unsigned int region, int W)¶
+

Set the writable bit for a PMP region.

+

+
Return
+
0 if the writable bit is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • W: The desired value of the writable bit
    • +
+
+
+

+
+ +
+
+int metal_pmp_get_writeable(struct metal_pmp *pmp, unsigned int region)¶
+

Get the writable bit for a PMP region.

+

+
Return
+
the value of the writable bit
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_readable(struct metal_pmp *pmp, unsigned int region, int R)¶
+

Set the readable bit for a PMP region.

+

+
Return
+
0 if the readable bit is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • R: The desired value of the readable bit
    • +
+
+
+

+
+ +
+
+int metal_pmp_get_readable(struct metal_pmp *pmp, unsigned int region)¶
+

Set the readable bit for a PMP region.

+

+
Return
+
the value of the readable bit
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to read
    • +
+
+
+

+
+ +
+
+
+struct metal_pmp_config¶
+
#include <pmp.h>

Configuration for a PMP region.

+
+

Public Types

+
+
+enum metal_pmp_locked¶
+

Sets whether the PMP region is locked.

+

Values:

+
+
+METAL_PMP_UNLOCKED = 0¶
+
+ +
+
+METAL_PMP_LOCKED = 1¶
+
+ +
+ +
+
+

Public Members

+
+
+int R¶
+

Sets whether reads to the PMP region succeed.

+
+ +
+
+int W¶
+

Sets whether writes to the PMP region succeed.

+
+ +
+
+int X¶
+

Sets whether the PMP region is executable.

+
+ +
+
+metal_pmp_address_mode A¶
+

Sets the addressing mode of the PMP region.

+
+ +
+
+metal_pmp_config::metal_pmp_locked L¶
+
+ +
+
+ +
+
+struct metal_pmp¶
+
#include <pmp.h>

A handle for the PMP device.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/shutdown.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/shutdown.html new file mode 100644 index 000000000..e3a10137d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/shutdown.html @@ -0,0 +1,144 @@ + + + + + + + + Shutdown — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Shutdown¶

+

API for shutting down a machine.

+
+

Functions

+
+
+void metal_shutdown(int code)¶
+

The public METAL shutdown interface.

+

Shuts down the machine, if the machine enables an interface for shutting down. When no interface is provided, will cause the machine to spin indefinitely.

+

+
Parameters
+
    +
  • code: The return code to set. 0 indicates program success.
    • +
+
+
+

+
+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/spi.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/spi.html new file mode 100644 index 000000000..30f202801 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/spi.html @@ -0,0 +1,288 @@ + + + + + + + + SPIs — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

SPIs¶

+
+

Functions

+
+
+struct metal_spi *metal_spi_get_device(int device_num)¶
+

Get a handle for a SPI device.

+

+
Return
+
A handle to the SPI device, or NULL if the device does not exist
+
Parameters
+
    +
  • device_num: The index of the desired SPI device
    • +
+
+
+

+
+ +
+
+void metal_spi_init(struct metal_spi *spi, int baud_rate)¶
+

Initialize a SPI device with a certain baud rate.

+

+
Parameters
+
    +
  • spi: The handle for the SPI device to initialize
    • +
  • baud_rate: The baud rate to set the SPI device to
    • +
+
+
+

+
+ +
+
+int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf)¶
+

Perform a SPI transfer.

+

+
Return
+
0 if the transfer succeeds
+
Parameters
+
    +
  • spi: The handle for the SPI device to perform the transfer
    • +
  • config: The configuration for the SPI transfer.
    • +
  • len: The number of bytes to transfer
    • +
  • tx_buf: The buffer to send over the SPI bus. Must be len bytes long. If NULL, the SPI will transfer the value 0.
    • +
  • rx_buf: The buffer to receive data into. Must be len bytes long. If NULL, the SPI will ignore received bytes.
    • +
+
+
+

+
+ +
+
+int metal_spi_get_baud_rate(struct metal_spi *spi)¶
+

Get the current baud rate of the SPI device.

+

+
Return
+
The baud rate in Hz
+
Parameters
+
    +
  • spi: The handle for the SPI device
    • +
+
+
+

+
+ +
+
+int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate)¶
+

Set the current baud rate of the SPI device.

+

+
Return
+
0 if the baud rate is successfully changed
+
Parameters
+
    +
  • spi: The handle for the SPI device
    • +
  • baud_rate: The desired baud rate of the SPI device
    • +
+
+
+

+
+ +
+
+
+struct metal_spi_config¶
+
#include <spi.h>

The configuration for a SPI transfer.

+
+

Public Types

+
+
+enum [anonymous]¶
+

The protocol for the SPI transfer.

+

Values:

+
+
+METAL_SPI_SINGLE¶
+
+ +
+
+METAL_SPI_DUAL¶
+
+ +
+
+METAL_SPI_QUAD¶
+
+ +
+ +
+
+

Public Members

+
+
+metal_spi_config::@0 metal_spi_config::protocol
+

The protocol for the SPI transfer.

+
+ +
+
+unsigned int polarity¶
+

The polarity of the SPI transfer, equivalent to CPOL.

+
+ +
+
+unsigned int phase¶
+

The phase of the SPI transfer, equivalent to CPHA.

+
+ +
+
+unsigned int little_endian¶
+

The endianness of the SPI transfer.

+
+ +
+
+unsigned int cs_active_high¶
+

The active state of the chip select line.

+
+ +
+
+unsigned int csid¶
+

The chip select ID to activate for the SPI transfer.

+
+ +
+
+ +
+
+struct metal_spi¶
+
#include <spi.h>

A handle for a SPI device.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/switch.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/switch.html new file mode 100644 index 000000000..d867d3dbf --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/switch.html @@ -0,0 +1,183 @@ + + + + + + + + Switches — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Switches¶

+

API for reading toggle switches.

+
+

Functions

+
+
+struct metal_switch *metal_switch_get(char *label)¶
+

Get a handle for a switch.

+

+
Return
+
A handle to the switch, or NULL if none is found for the requested label
+
Parameters
+
    +
  • label: The DeviceTree label for the desired switch
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_switch_interrupt_controller(struct metal_switch *sw)¶
+

Get the interrupt controller for a switch.

+

+
Return
+
The interrupt controller handle
+
Parameters
+
    +
  • sw: The handle for the switch
    • +
+
+
+

+
+ +
+
+int metal_switch_get_interrupt_id(struct metal_switch *sw)¶
+

Get the interrupt id for a switch.

+

+
Return
+
The interrupt ID for the switch
+
Parameters
+
    +
  • sw: The handle for the switch
    • +
+
+
+

+
+ +
+
+
+struct metal_switch¶
+
#include <switch.h>

A handle for a switch.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/timer.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/timer.html new file mode 100644 index 000000000..7a3729785 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/timer.html @@ -0,0 +1,180 @@ + + + + + + + + Timer API — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Timer API¶

+

API for reading and manipulating the machine timer.

+
+

Functions

+
+
+int metal_timer_get_cyclecount(int hartid, unsigned long long *cyclecount)¶
+

Read the machine cycle count.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • hartid: The hart ID to read the cycle count of
    • +
  • cyclecount: The variable to hold the value
    • +
+
+
+

+
+ +
+
+int metal_timer_get_timebase_frequency(int hartid, unsigned long long *timebase)¶
+

Get the machine timebase frequency.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • hartid: The hart ID to read the timebase of
    • +
  • timebase: The variable to hold the value
    • +
+
+
+

+
+ +
+
+int metal_timer_set_tick(int hartid, int second)¶
+

Set the machine timer tick interval in seconds.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • hartid: The hart ID to read the timebase of
    • +
  • second: The number of seconds to set the tick interval to
    • +
+
+
+

+
+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/tty.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/tty.html new file mode 100644 index 000000000..ce5d7b23e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/tty.html @@ -0,0 +1,146 @@ + + + + + + + + TTY — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

TTY¶

+

API for emulated serial teriminals.

+
+

Functions

+
+
+int metal_tty_putc(unsigned char c)¶
+

Write a character to the default output device.

+

Write a character to the default output device, which for most targets is the UART serial port.

+

+
Return
+
0 on success, or -1 on failure.
+
Parameters
+
    +
  • c: The character to write to the terminal
    • +
+
+
+

+
+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/uart.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/uart.html new file mode 100644 index 000000000..394741269 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/apiref/uart.html @@ -0,0 +1,249 @@ + + + + + + + + UARTs — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

UARTs¶

+

API for UART serial ports.

+
+

Functions

+
+
+void metal_uart_init(struct metal_uart *uart, int baud_rate)¶
+

Initialize UART device.

+

Initialize the UART device described by the UART handle. This function must be called before any other method on the UART can be invoked. It is invalid to initialize a UART more than once.

+

+
Parameters
+
    +
  • uart: The UART device handle
    • +
  • baud_rate: the baud rate to set the UART to
    • +
+
+
+

+
+ +
+
+int metal_uart_putc(struct metal_uart *uart, unsigned char c)¶
+

Output a character over the UART.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • uart: The UART device handle
    • +
  • c: The character to send over the UART
    • +
+
+
+

+
+ +
+
+int metal_uart_getc(struct metal_uart *uart, unsigned char *c)¶
+

Read a character sent over the UART.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • uart: The UART device handle
    • +
  • c: The varible to hold the read character
    • +
+
+
+

+
+ +
+
+int metal_uart_get_baud_rate(struct metal_uart *uart)¶
+

Get the baud rate of the UART peripheral.

+

+
Return
+
The current baud rate of the UART
+
Parameters
+
    +
  • uart: The UART device handle
    • +
+
+
+

+
+ +
+
+int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate)¶
+

Set the baud rate of the UART peripheral.

+

+
Return
+
the new baud rate of the UART
+
Parameters
+
    +
  • uart: The UART device handle
    • +
  • baud_rate: The baud rate to configure
    • +
+
+
+

+
+ +
+
+struct metal_interrupt *metal_uart_interrupt_controller(struct metal_uart *uart)¶
+

Get the interrupt controller of the UART peripheral.

+

Get the interrupt controller for the UART peripheral. The interrupt controller must be initialized before any interrupts can be registered or enabled with it.

+

+
Return
+
The handle for the UART interrupt controller
+
Parameters
+
    +
  • uart: The UART device handle
    • +
+
+
+

+
+ +
+
+int metal_uart_get_interrupt_id(struct metal_uart *uart)¶
+

Get the interrupt ID of the UART controller.

+

+
Return
+
The UART interrupt id
+
Parameters
+
    +
  • uart: The UART device handle
    • +
+
+
+

+
+ +
+
+
+struct metal_uart¶
+
#include <uart.h>

Handle for a UART serial device.

+
+ +
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide.html new file mode 100644 index 000000000..2d6398854 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide.html @@ -0,0 +1,122 @@ + + + + + + + + Developer Guide — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ + + + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/exceptions.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/exceptions.html new file mode 100644 index 000000000..3212aa7c1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/exceptions.html @@ -0,0 +1,201 @@ + + + + + + + + Exception Handlers — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Exception Handlers¶

+

CPU exceptions are the mechanism by which various execution and memory system +errors are handled. When an exception occurs, Freedom Metal will call the +corresponding exception handler function, if one has been registered by the +application.

+
+

Initializing the CPU¶

+

When the user application enters the main() function, the Freedom Metal +framework has not yet performed the initialization necessary to register +exception handlers. If this initialization is not performed before an exception +occurs, any exception will cause the CPU to spin in a tight loop until reset.

+

To initialize the Freedom Metal exception handlers, initialize CPU interrupts:

+
struct metal_cpu *cpu0 = metal_get_cpu(0);
+if(!cpu) {
+   /* There was an error acquiring the CPU hart 0 handle */
+}
+
+struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0);
+if(!cpu_int) {
+   /* There was an error acquiring the CPU interrupt controller */
+}
+
+metal_interrupt_init(cpu_int);
+
+
+

The Freedom Metal interrupt API is further documented in Interrupt Handlers +and Interrupts.

+
+
+

Defining an Exception Handler¶

+

Exception handlers must conform to the following function signature:

+
+
+typedef void (*metal_exception_handler_t)(struct metal_cpu *cpu, int ecode)
+

Function signature for exception handlers.

+
+ +

Therefore, an example exception handler might look like:

+
void my_exception_handler(struct metal_cpu *cpu, int ecode) {
+   /* Contents of handler */
+}
+
+
+
+
+

Registering an Exception Handler¶

+

Exception handlers are registered with a given CPU hart for an individual exception +code.

+
/* CPU Hart 0's interrupt controller must be initialized
+ * if it is not already */
+struct metal_cpu *cpu0 = metal_get_cpu(0);
+
+int rc = metal_cpu_exception_register(cpu0,
+            <my_ecode>, /* Set to your desired value */
+            my_exception_handler);
+if(rc != 0) {
+   /* Failed to register exception handler */
+}
+
+
+

A single exception handler may be used for multiple exception codes. For this reason, +exception handlers receive the exception code as the ecode parameter and may use +this to determine how to handle the exception.

+
+
+

Returing Execution after a Faulting Instruction¶

+

The default behavior of a RISC-V CPU is to return execution to the faulting instruction. +If this is not the desired behavior, execution can be returned to the instruction after +the faulting instruction using the following method:

+
void return_after_fault(struct metal_cpu *cpu, int ecode)
+{
+   /* Get the faulting instruction address */
+   uintptr_t epc = metal_cpu_get_exception_pc(cpu);
+
+   /* Get the length of the faulting instruction */
+   size_t len = metal_cpu_get_instruction_length(cpu, epc);
+
+   /* Advance stored exception program counter by the
+    * instruction length */
+   metal_cpu_set_exception_pc(cpu, epc + len);
+}
+
+
+
+
+

Additional Documentation¶

+

Additional documentation for the exception handler API can be found in The CPU API Reference.

+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/fe310-g000-pll.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/fe310-g000-pll.html new file mode 100644 index 000000000..0967dae4b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/fe310-g000-pll.html @@ -0,0 +1,136 @@ + + + + + + + + FE310-G00 PLL — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

FE310-G00 PLL¶

+

On targets with a PLL compatible with the FE310-G000 SoC, the PLL is configured +at program initialization with a constructor. This PLL sets the clock frequency +of the RISC-V CPU, and users of Freedom Metal who wish to set a specific clock +rate can use Freedom Metal to request that the PLL take on a certain output rate.

+

In the DeviceTree for your target, there should be a node like the following +(example taken from the SiFive HiFive1):

+
hfclk: clock@4 {
+        compatible = "sifive,fe310-g000,pll";
+        clocks = <&hfxoscout &hfroscout>;
+        clock-names = "pllref", "pllsel0";
+        reg = <&prci 0x8 &prci 0xc>;
+        reg-names = "config", "divider";
+        clock-frequency = <16000000>;
+};
+
+
+

The clock-frequency property of the node sets the requested clock rate of +the FE310-G000 PLL. The PLL driver will attempt to configure the PLL to achieve +this clock rate.

+

Users should note that the FE310-G000 PLL only supports certain input/output +clock rate ratios, and so the effective output rate of the PLL may differ from +the requested rate.

+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/interrupts.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/interrupts.html new file mode 100644 index 000000000..7d6a8d67e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/interrupts.html @@ -0,0 +1,215 @@ + + + + + + + + Interrupt Handlers — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Interrupt Handlers¶

+
+

The Interrupt Heirarchy¶

+

Freedom Metal conceptualizes interrupts as a heirarchy of interrupt controllers. +This heirarchy is established by the interrupt heirarchy of the target platform +itself. Presently, the interrupt heirarchy for a given platform is best documented +by the target’s DeviceTree representation, which can be found in +bsp/<target-name>/design.dts.

+

In Freedom Metal, the heirarchy is a tree. The nodes of the tree consist of +struct metal_interrupt:

+
+
+struct metal_interrupt
+

A handle for an interrupt.

+
+ +

And the vertices of the tree consist of interrupt id.

+digraph int_heirarchy_graph { +cpu [label="CPU"]; +cpu_int [label="CPU Interrupt Controller", shape=box]; +timer_int [label="Timer Interrupt Controller", shape=box]; +soft_int [label="Software Interrupt Controller", shape=box]; + +cpu -> cpu_int [label="ID = 0"]; +cpu_int -> timer_int [label="ID = timer_id"]; +cpu_int -> soft_int [label="ID = software_id"]; +} +
+
+

The CPU Interrupt Controller¶

+

The CPU interrupt controller is the top of the interrupt heirarchy. It must be +initialized before any other interrupt controllers are initialized. In example:

+
struct metal_cpu *cpu0 = metal_get_cpu(0);
+if(!cpu) {
+   /* Unable to get CPU handle */
+}
+struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0);
+if(!cpu_int) {
+   /* Unable to get CPU interrupt handle */
+}
+metal_interrupt_init(cpu_int);
+
+
+

The CPU interrupt must be enabled for the CPU to receive any interrupts, and any +enabled interrupts can be masked by disabling the CPU interrupt.

+
int rc = 0;
+
+/* Enable the CPU interrupt */
+rc = metal_interrupt_enable(cpu_int, 0);
+if(rc != 0) {
+   /* Failed to enable the CPU interrupt */
+}
+
+/* Disable the CPU interrupt */
+rc = metal_interrupt_disable(cpu_int, 0);
+if(rc != 0) {
+   /* Failed to disable the CPU interrupt */
+}
+
+
+
+
+

Interrupt Handlers¶

+

Interrupt handlers must conform to the following function signature:

+
+
+typedef void (*metal_interrupt_handler_t)(int, void *)
+

Function signature for interrupt callback handlers.

+
+ +

Therefore, an interrupt handler might look like:

+
void my_interrupt_handler(int id, void *priv_data) {
+   /* Contents of handler */
+}
+
+
+
+
+

Registering an Interrupt Handler¶

+

Interrupt handlers are registered with the interrupt controller for the interrupt +they are servicing. For example, if we want to register a CPU timer interrupt:

+
struct metal_interrupt *timer_int = metal_cpu_timer_interrupt_controller(cpu0);
+if(!timer_int) {
+   /* Failed to get timer interrupt controller */
+}
+metal_interrupt_init(timer_int);
+
+int timer_id = metal_cpu_timer_get_interrupt_id(cpu0);
+
+int rc = metal_interrupt_register_handler(timer_int, timer_id, my_interrupt_handler, cpu0);
+if(rc != 0) {
+   /* Failed to register interrupt handler */
+}
+
+
+
+
+

Additional Documentation¶

+

Additional documentation for the interrupt handler API can be found in +the CPU API reference and +the Interrupt API reference.

+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/itim.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/itim.html new file mode 100644 index 000000000..61f0e89a5 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/itim.html @@ -0,0 +1,150 @@ + + + + + + + + Instruction Tightly Integrated Memory — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Instruction Tightly Integrated Memory¶

+

The Instruction Tightly Integrated Memory (ITIM) is an optional feature +on certain SiFive RISC-V CPUs. The ITIM is a memory device which is +optimized in the CoreIP memory heirarchy to provide low-latency +access to instruction memory.

+

Freedom Metal provides the ability to designate functions to run out of +the ITIM by decorating the functions with the following “decorator”:

+
+
+METAL_PLACE_IN_ITIM¶
+

Link a function into the ITIM.

+

Link a function into the ITIM (Instruction Tightly Integrated Memory) if the ITIM is present on the target device.

+
+ +

For example:

+
METAL_PLACE_IN_ITIM
+void my_itim_func() {
+   /* This code will run out of the ITIM */
+}
+
+
+
+

Caveats¶

+

The METAL_PLACE_IN_ITIM decorator tells the toolchain to link the +decorated function into the ITIM memory. However, compiler optimizations +such as function inlining may cause execution to never transfer to +instructions fetched from the ITIM.

+

If this compiler optimization is not desired, one workaround is to +tell the compiler to not inline the function:

+
__attribute__((noinline))
+METAL_PLACE_IN_ITIM
+void my_itim_func() {
+   /* This code will run out of the ITIM */
+}
+
+
+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/pmps.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/pmps.html new file mode 100644 index 000000000..c480b46e6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/pmps.html @@ -0,0 +1,293 @@ + + + + + + + + Physical Memory Protection — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Physical Memory Protection¶

+

Physical Memory Protection (PMP) is a part of the RISC-V Privileged Architecture +Specification which discribes the interface for a standard RISC-V memory +protection unit.

+

The PMP defines a finite number of PMP regions which can be individually configured +to enforce access permissions to a range of addresses in memory. Each PMP region +is configurable with the following options:

+
+
+struct metal_pmp_config
+

Configuration for a PMP region.

+
+

Public Types

+
+
+enum metal_pmp_locked
+

Sets whether the PMP region is locked.

+

Values:

+
+
+METAL_PMP_UNLOCKED = 0
+
+ +
+
+METAL_PMP_LOCKED = 1
+
+ +
+ +
+
+

Public Members

+
+
+int R
+

Sets whether reads to the PMP region succeed.

+
+ +
+
+int W
+

Sets whether writes to the PMP region succeed.

+
+ +
+
+int X
+

Sets whether the PMP region is executable.

+
+ +
+
+metal_pmp_address_mode A
+

Sets the addressing mode of the PMP region.

+
+ +
+
+ +
+

Initializing the PMP¶

+

All PMP-related functions first depend on having a handle to the PMP device:

+
struct metal_pmp *pmp = metal_pmp_get_device();
+if(!pmp) {
+   /* Failed to get PMP device handle */
+}
+
+
+

PMP initialization is optional and has the effect of disabling all PMP regions, +if possible:

+
metal_pmp_init(pmp);
+
+
+

The number of PMP regions available can be retrieved from the PMP device handle:

+
+
+struct metal_pmp
+

A handle for the PMP device.

+
+ +
+
+

Configuring a PMP Region¶

+

Freedom Metal has a set of APIs for configuring a PMP region. The most generic of these +is

+
+
+int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config config, size_t address)
+

Configure a PMP region.

+

+
Return
+
0 upon success
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to configure
    • +
  • config: The desired configuration of the PMP region
    • +
  • address: The desired address of the PMP region
    • +
+
+
+

+
+ +

This function allows for the configuration of all PMP region settings.

+

Additional APIs are provided for granularly changing individual PMP region settings. +For example:

+
+
+int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address)
+

Set the address for a PMP region.

+

+
Return
+
0 if the address is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • address: The desired address of the PMP region
    • +
+
+
+

+
+ +
+
+int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region)
+

Lock a PMP region.

+

+
Return
+
0 if the region is successfully locked
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to lock
    • +
+
+
+

+
+ +
+
+int metal_pmp_set_writeable(struct metal_pmp *pmp, unsigned int region, int W)
+

Set the writable bit for a PMP region.

+

+
Return
+
0 if the writable bit is successfully set
+
Parameters
+
    +
  • pmp: The PMP device handle
    • +
  • region: The PMP region to set
    • +
  • W: The desired value of the writable bit
    • +
+
+
+

+
+ +

Additional documentation for this API is provided in the PMP API reference.

+

The RISC-V specification allows implementation of PMP to hard-wire the configuration +values of PMP regions. In these cases, attempts to configure these PMP regions will +fail.

+
+
+

Handling PMP Access Faults¶

+

Attempted memory accesses which the PMP is configured to prevent trigger a +CPU exception. These exceptions can be handled by installing a CPU exception +handler for exception codes related to memory access faults.

+

Additional documentation about creating and registering exception handlers can +be found in the Exception Handlers Developer Guide.

+
+
+

Additional Documentation¶

+

Additional documentation about the Physical Memory Protection system and fault +handling on RISC-V systems can be found in +The RISC-V Privileged ISA Specification v1.10.

+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/tty.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/tty.html new file mode 100644 index 000000000..099f21c36 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/devguide/tty.html @@ -0,0 +1,137 @@ + + + + + + + + Standard I/O — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Standard I/O¶

+

Freedom Metal integrates with libc STDOUT to provide virtual terminal support. +The default STDOUT device is the first UART serial peripheral on the target. +If no UART serial peripheral is present, such as in the case of SiFive CoreIP +test harnesses, then the bytes sent to STDOUT are dropped.

+
+

Hello World¶

+

Using the virtual terminal with Freedom Metal is exactly what you might expect:

+
1
+2
+3
+4
+5
+6
+7
#include <stdio.h>
+
+int main(void) {
+   printf("Hello, world!");
+
+   return 0;
+}
+
+
+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/genindex.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/genindex.html new file mode 100644 index 000000000..d61c2033a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/genindex.html @@ -0,0 +1,399 @@ + + + + + + + + + Index — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ + +

Index

+ +
+ _ + | M + +
+

_

+ + +
+ +

M

+ + + +
+ + + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/index.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/index.html new file mode 100644 index 000000000..4491c3508 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/index.html @@ -0,0 +1,152 @@ + + + + + + + + Freedom Metal — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Freedom Metal¶

+

This is the documentation for the SiFive Freedom Metal library v201905.

+

Freedom Metal is generally available from the Freedom Metal GitHub Repository.

+ +
+

Indices and tables¶

+ +
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
+ + + + + + \ No newline at end of file diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/introduction.html b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/introduction.html new file mode 100644 index 000000000..0509b04a4 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/html/introduction.html @@ -0,0 +1,139 @@ + + + + + + + + Introduction to Freedom Metal — Freedom Metal v201905 documentation + + + + + + + + + + + + + + + + + + + +
+
+
+ + +
+ +
+

Introduction to Freedom Metal¶

+
+

What is Freedom Metal?¶

+

Freedom Metal enables portable, bare-metal application development for all of +SiFive’s RISC-V IP, FPGA evaluation targets, and development boards.

+
+
Freedom Metal provides:
+
    +
  • A bare-metal C application environment
    • +
  • An API for controlling CPU features and peripherals
    • +
  • The ability to retarget to any SiFive RISC-V product
    • +
+
+
This makes Freedom Metal suitable for:
+
    +
  • Writing portable hardware tests
    • +
  • Bootstrapping bare metal application development
    • +
  • A RISC-V hardware abstraction layer
    • +
  • And more!
    • +
+
+
+
+
+

How Do I Use Freedom Metal?¶

+

The best way to get started writing applications with Freedom Metal is to use +the SiFive Freedom E SDK which bundles the build scripts and configuration +necessary to use Freedom Metal with SiFive’s standard evaluation products.

+

If you prefer working with an Integrated Development Environment (IDE), +SiFive Freedom Studio comes packaged with a prebuilt toolchain and the same +Freedom Metal examples from Freedom E SDK.

+
+
+ + +
+ +
+
+ +
+
+
+ ©2019, SiFive Inc.. + + | + Powered by Sphinx 1.7.5 + & Alabaster 0.7.11 + + | + Page source +
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b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/mee-spec.md @@ -0,0 +1,170 @@ +# MEE Specification + +The MEE is designed to provide a source-level compatibility for +bare-metal code between platforms. This specification defines the +publicly available API. The intent is that this API is stable so users +can rely on it not changing, but we're not going to make any guarantees +about it until our 1.0.0 release. + +Note that the MEE does not define an ABI -- specifically that means that +binaries will not be compatible between different versions of the MBI, +or between different platforms. + +## User API + +The core of the MEE is a C API that is designed to allow programmers to +write portable bare-metal embedded code. + +Any symbol beginning with `__mee_` is internal to the MEE and must not +be called or defined by user code. Symbols beginning with `mee_` are +public interfaces and can be considered to be a stable API. The best +documentation for most of these symbols are found in the code, but some +is listed below. + +### Clock Interface + +The clock interface allows for controlling the rate of various clocks in +the system. Clocks are defined by a pointer to a `struct mee_clock`, the +contents of which is implementation defined. Users of the clock +interface must call the functions defined below in order to interact +with a `struct mee_clock *`. + +Note that no mechanism for obtaining a pointer to a `struct mee_clock` +has been defined, making it impossible to call any of these functions +without invoking implementation-defined behavior. + +#### `long mee_clock_get_rate_hz(const struct mee_clock *clock)` + +Returns the clock rate of the given clock, in Hz. + +#### `long mee_clock_set_rate_hz(const struct mee_clock *clock, long hz)` + +Attempts to set the rate of the given clock to the given value, in Hz. +Returns the rate the given clock was actually set to, which may be +different than the requested rate. There are no hard requirements on +what clock rates can be set, but it's expected that a best effort +approach is taken to match the caller's desired clock rate. + +#### `void mee_clock_register_rate_change_callback(struct mee_clock *clk, int (*cb)(struct mee_clock *, void *), void *priv)` + +Registers a function (and an associated opaque data block) that will be +called whenever the giver clock's rate has been changed. This function +will be called after the driver-specific clock frequency changing code +has returned, but before the caller of `mee_clock_set_rate_hz()` has +been returned to. + +It's not guaranteed that the given clock's rate will have actually +changed every time the given function is called, but it's guaranteed +that the given function will be called every time the given clock's rate +has been changed. + +### Timer Interface + +The timer interface allows for access of various timers values in +the system. Timers are defined by a pointer to a `struct mee_timer`, the +contents of which is implementation defined. Users of the timer +interface must call the functions defined below in order to interact +with a `struct mee_timer *`. + +Note that no mechanism for obtaining a pointer to a `struct mee_timer` +has been defined, making it impossible to call any of these functions +without invoking implementation-defined behavior. + +#### `int mee_timer_get_cyclecount(int hartid, unsigned long long *mcc)` + +Returns the cpu machine cycle count of a given hartid. + +#### `int mee_timer_get_timebase_frequency(int hartid, unsigned long long *timebase)` + +Returns the timebase frequency of a given hartid, s.t a time elapse duration can determined. +For example, a timebase frequency of 1000000 (1MHz) will have each cycle count of 1s. + +#### `void mee_timer_init(const struct mee_timer *timer, unsigned long long timebase)` + +Setup the timebase frequency for a given timer, in Hz. + +### Power Control Interface + +The MEE defines a mechanism to control the power state of a given +machine. The interface is currently quite simple: it's just the +`mee_shutdown()` function. + +#### `void mee_shutdown(int code) __attribute__((noreturn))` + +Terminates execution of this program, attempting to pass the given code +to whomever may be looking. The code `0` indicates success, while all +other codes indicate failure. The exact mechanism by which execution +terminates is implementation defined, but some examples include: + +* Spinning in an infinite loop. +* Printing the return code to standard out and spinning in an infinite + loop. +* Toggling an external I/O to disable the power to the core. +* Poking through a hole to the host that's providing this environment + and indicating success or failure. + +### TTY Interface + +The MEE provides an terminal interface. This interface is designed to +provide a simple mechanism for getting text-based data outside of the +MEE -- in other words, it's designed to be used to implement C library +functions like `printf()`. + +#### `int mee_tty_putc(unsigned char c);` + +Writes the given character to the default terminal, returning 0 on +success or -1 on failure. + +### UART Interface + +The UART interface allows users of the MEE to control + +Note that there is no mechanism for obtaining a pointer to a `struct +mee_uart` without invoking implementation-defined behavior, thus making +calling any of these functions impossible. + +#### `int mee_uart_init(struct mee_uart *uart)` + +Initializes the given UART. This must be called exactly once before any +other function on this UART can be called. It is invalid to initialize +a UART more than once. + +#### `int mee_uart_putc(struct mee_uart *uart, unsigned char c)` + +Writes the given character to the given UART, returning 0 on success and +-1 on failure. + +#### `int mee_uart_getc(struct mee_uart *uart, unsigned char *c)` + +Reads a character from the given UART, storing it at the given character +pointer. This returns 0 on success and -1 on failure. + +#### `int mee_uart_get_baud_rate(struct mee_uart *uart)` + +Obtains the baud rate of the given UART, or `-1` to signify an error. + +#### `int mee_uart_set_baud_rate(struct mee_uart *uart, int baud_rate)` + +Sets the baud rate of the given UART. Returns 0 on success, or -1 on +failure. Failure to set the baud rate can render the UART unusable +until a subsequent coll to `mee_uart_set_baud_rate()` returns success. + +### C Startup Interface + +The MEE handles entering the C library's start routine, which is defined +by the symbol `_start`. This symbol must be defined by the C library in +order to allow the MEE to do anything meaningful. + +The MEE follows the standard RISC-V bootloader ABI when calling +`_start`: + +* `a0` contains the hart ID. +* `a1` contains a pointer to the machine description. The MEE always + sets this to NULL, as machines are described statically. +* `a2` contains a callback that should be called from within the child + environment after it has initialized itself. + +This can be described as a the C function `void _start(long hartid, +unsigned char *dtb, void (*after_init)(void))'. Note that the MEE does +not initialize a C environment and therefor this cannot actually be a C +function -- for example, there may not be a stack. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/api.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/api.rst new file mode 100644 index 000000000..5615e2f58 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/api.rst @@ -0,0 +1,13 @@ +API Reference +============= + +The API documentation aims to provide a complete reference to the +Freedom Metal API. + +The API documentation is split into sections corresponding to each feature: + +.. toctree:: + :glob: + + apiref/* + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/button.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/button.rst new file mode 100644 index 000000000..2f749da14 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/button.rst @@ -0,0 +1,6 @@ +Buttons +======= + +.. doxygenfile:: metal/button.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cache.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cache.rst new file mode 100644 index 000000000..6de6a9f32 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cache.rst @@ -0,0 +1,6 @@ +Caches +====== + +.. doxygenfile:: metal/cache.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/clock.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/clock.rst new file mode 100644 index 000000000..5b3526e65 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/clock.rst @@ -0,0 +1,6 @@ +Clocks +====== + +.. doxygenfile:: metal/clock.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cpu.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cpu.rst new file mode 100644 index 000000000..5f192aaf4 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/cpu.rst @@ -0,0 +1,6 @@ +CPU +=== + +.. doxygenfile:: metal/cpu.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/gpio.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/gpio.rst new file mode 100644 index 000000000..2759a91d6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/gpio.rst @@ -0,0 +1,5 @@ +GPIO +==== + +.. doxygenfile:: metal/gpio.h + :project: metal diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/interrupt.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/interrupt.rst new file mode 100644 index 000000000..a6a6c2d32 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/interrupt.rst @@ -0,0 +1,6 @@ +Interrupts +========== + +.. doxygenfile:: metal/interrupt.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/itim.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/itim.rst new file mode 100644 index 000000000..3199324c2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/itim.rst @@ -0,0 +1,7 @@ +ITIM +==== + +.. doxygenfile:: metal/itim.h + :project: metal + :no-link: + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/led.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/led.rst new file mode 100644 index 000000000..e14156d65 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/led.rst @@ -0,0 +1,6 @@ +LEDs +==== + +.. doxygenfile:: metal/led.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/lock.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/lock.rst new file mode 100644 index 000000000..17f09f82c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/lock.rst @@ -0,0 +1,6 @@ +Locks +======= + +.. doxygenfile:: metal/lock.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/memory.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/memory.rst new file mode 100644 index 000000000..2fdff1674 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/memory.rst @@ -0,0 +1,6 @@ +Memory Enumeration +================== + +.. doxygenfile:: metal/memory.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/pmp.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/pmp.rst new file mode 100644 index 000000000..cc7771773 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/pmp.rst @@ -0,0 +1,6 @@ +PMPs +==== + +.. doxygenfile:: metal/pmp.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/shutdown.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/shutdown.rst new file mode 100644 index 000000000..86aecb5cf --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/shutdown.rst @@ -0,0 +1,6 @@ +Shutdown +======== + +.. doxygenfile:: metal/shutdown.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/spi.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/spi.rst new file mode 100644 index 000000000..a40c62472 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/spi.rst @@ -0,0 +1,6 @@ +SPIs +===== + +.. doxygenfile:: metal/spi.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/switch.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/switch.rst new file mode 100644 index 000000000..6870196b2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/switch.rst @@ -0,0 +1,6 @@ +Switches +======== + +.. doxygenfile:: metal/switch.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/timer.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/timer.rst new file mode 100644 index 000000000..2bea5c438 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/timer.rst @@ -0,0 +1,6 @@ +Timer API +========= + +.. doxygenfile:: metal/timer.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/tty.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/tty.rst new file mode 100644 index 000000000..7aaafa292 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/tty.rst @@ -0,0 +1,6 @@ +TTY +=== + +.. doxygenfile:: metal/tty.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/uart.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/uart.rst new file mode 100644 index 000000000..df7ef9a4d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/apiref/uart.rst @@ -0,0 +1,6 @@ +UARTs +===== + +.. doxygenfile:: metal/uart.h + :project: metal + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/conf.py b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/conf.py new file mode 100644 index 000000000..7d9a83731 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/conf.py @@ -0,0 +1,160 @@ +# -*- coding: utf-8 -*- +# +# Configuration file for the Sphinx documentation builder. +# +# This file does only contain a selection of the most common options. For a +# full list see the documentation: +# http://www.sphinx-doc.org/en/master/config + +# -- Path setup -------------------------------------------------------------- + +# If extensions (or modules to document with autodoc) are in another directory, +# add these directories to sys.path here. If the directory is relative to the +# documentation root, use os.path.abspath to make it absolute, like shown here. +# +import os +# import sys +# sys.path.insert(0, os.path.abspath('.')) + + +# -- Project information ----------------------------------------------------- + +project = 'Freedom Metal' +copyright = '2019, SiFive Inc.' +author = 'SiFive Inc.' + +version = "v201905" +release = version + + +# -- General configuration --------------------------------------------------- + +# If your documentation needs a minimal Sphinx version, state it here. +# +# needs_sphinx = '1.0' + +# Add any Sphinx extension module names here, as strings. They can be +# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom +# ones. +extensions = [ + "breathe", + "sphinx.ext.graphviz" +] + +breathe_projects = { + "metal" : "../xml/", +} + +# Add any paths that contain templates here, relative to this directory. +templates_path = ['metal_templates'] + +# The suffix(es) of source filenames. +# You can specify multiple suffix as a list of string: +# +# source_suffix = ['.rst', '.md'] +source_suffix = '.rst' + +# The master toctree document. +master_doc = 'index' + +# The language for content autogenerated by Sphinx. Refer to documentation +# for a list of supported languages. +# +# This is also used if you do content translation via gettext catalogs. +# Usually you set "language" from the command line for these cases. +language = None + +# List of patterns, relative to source directory, that match files and +# directories to ignore when looking for source files. +# This pattern also affects html_static_path and html_extra_path . +exclude_patterns = [] + +# The name of the Pygments (syntax highlighting) style to use. +pygments_style = 'sphinx' + + +# -- Options for HTML output ------------------------------------------------- + +# The theme to use for HTML and HTML Help pages. See the documentation for +# a list of builtin themes. +# +html_theme = 'alabaster' + +# Theme options are theme-specific and customize the look and feel of a theme +# further. For a list of options available for each theme, see the +# documentation. +# +# html_theme_options = {} + +# Add any paths that contain custom static files (such as style sheets) here, +# relative to this directory. They are copied after the builtin static files, +# so a file named "default.css" will overwrite the builtin "default.css". +html_static_path = ['metal_static'] + +# Custom sidebar templates, must be a dictionary that maps document names +# to template names. +# +# The default sidebars (for documents that don't match any pattern) are +# defined by theme itself. Builtin themes are using these templates by +# default: ``['localtoc.html', 'relations.html', 'sourcelink.html', +# 'searchbox.html']``. +# +# html_sidebars = {} +html_sidebars = { '**': ['about.html', 'navigation.html', 'relations.html', 'searchbox.html']} + + +# -- Options for HTMLHelp output --------------------------------------------- + +# Output file base name for HTML help builder. +htmlhelp_basename = 'FreedomMetaldoc' + + +# -- Options for LaTeX output ------------------------------------------------ + +latex_elements = { + # The paper size ('letterpaper' or 'a4paper'). + # + # 'papersize': 'letterpaper', + + # The font size ('10pt', '11pt' or '12pt'). + # + # 'pointsize': '10pt', + + # Additional stuff for the LaTeX preamble. + # + # 'preamble': '', + + # Latex figure (float) alignment + # + # 'figure_align': 'htbp', +} + +# Grouping the document tree into LaTeX files. List of tuples +# (source start file, target name, title, +# author, documentclass [howto, manual, or own class]). +latex_documents = [ + (master_doc, 'FreedomMetal.tex', 'Freedom Metal Documentation', + 'SiFive Inc.', 'manual'), +] + + +# -- Options for manual page output ------------------------------------------ + +# One entry per manual page. List of tuples +# (source start file, name, description, authors, manual section). +man_pages = [ + (master_doc, 'freedommetal', 'Freedom Metal Documentation', + [author], 1) +] + + +# -- Options for Texinfo output ---------------------------------------------- + +# Grouping the document tree into Texinfo files. List of tuples +# (source start file, target name, title, author, +# dir menu entry, description, category) +texinfo_documents = [ + (master_doc, 'FreedomMetal', 'Freedom Metal Documentation', + author, 'FreedomMetal', 'One line description of project.', + 'Miscellaneous'), +] diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide.rst new file mode 100644 index 000000000..3377b2cda --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide.rst @@ -0,0 +1,9 @@ +Developer Guide +=============== + +.. toctree:: + :maxdepth: 1 + :glob: + + devguide/* + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/exceptions.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/exceptions.rst new file mode 100644 index 000000000..c8c53effe --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/exceptions.rst @@ -0,0 +1,103 @@ +Exception Handlers +================== + +CPU exceptions are the mechanism by which various execution and memory system +errors are handled. When an exception occurs, Freedom Metal will call the +corresponding exception handler function, if one has been registered by the +application. + +Initializing the CPU +-------------------- + +When the user application enters the ``main()`` function, the Freedom Metal +framework has not yet performed the initialization necessary to register +exception handlers. If this initialization is not performed before an exception +occurs, any exception will cause the CPU to spin in a tight loop until reset. + +To initialize the Freedom Metal exception handlers, initialize CPU interrupts: + +.. code-block:: C + + struct metal_cpu *cpu0 = metal_get_cpu(0); + if(!cpu) { + /* There was an error acquiring the CPU hart 0 handle */ + } + + struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0); + if(!cpu_int) { + /* There was an error acquiring the CPU interrupt controller */ + } + + metal_interrupt_init(cpu_int); + +The Freedom Metal interrupt API is further documented in :doc:`/devguide/interrupts` +and :doc:`/apiref/interrupt`. + +Defining an Exception Handler +----------------------------- + +Exception handlers must conform to the following function signature: + +.. doxygentypedef:: metal_exception_handler_t + :project: metal + :no-link: + +Therefore, an example exception handler might look like: + +.. code-block:: C + + void my_exception_handler(struct metal_cpu *cpu, int ecode) { + /* Contents of handler */ + } + +Registering an Exception Handler +-------------------------------- + +Exception handlers are registered with a given CPU hart for an individual exception +code. + +.. code-block:: C + + /* CPU Hart 0's interrupt controller must be initialized + * if it is not already */ + struct metal_cpu *cpu0 = metal_get_cpu(0); + + int rc = metal_cpu_exception_register(cpu0, + , /* Set to your desired value */ + my_exception_handler); + if(rc != 0) { + /* Failed to register exception handler */ + } + +A single exception handler may be used for multiple exception codes. For this reason, +exception handlers receive the exception code as the ``ecode`` parameter and may use +this to determine how to handle the exception. + +Returing Execution after a Faulting Instruction +----------------------------------------------- + +The default behavior of a RISC-V CPU is to return execution to the faulting instruction. +If this is not the desired behavior, execution can be returned to the instruction after +the faulting instruction using the following method: + +.. code-block:: C + + void return_after_fault(struct metal_cpu *cpu, int ecode) + { + /* Get the faulting instruction address */ + uintptr_t epc = metal_cpu_get_exception_pc(cpu); + + /* Get the length of the faulting instruction */ + size_t len = metal_cpu_get_instruction_length(cpu, epc); + + /* Advance stored exception program counter by the + * instruction length */ + metal_cpu_set_exception_pc(cpu, epc + len); + } + +Additional Documentation +------------------------ + +Additional documentation for the exception handler API can be found in :doc:`The CPU API Reference `. + + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/fe310-g000-pll.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/fe310-g000-pll.rst new file mode 100644 index 000000000..af2ddd2d3 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/fe310-g000-pll.rst @@ -0,0 +1,29 @@ +FE310-G00 PLL +============= + +On targets with a PLL compatible with the FE310-G000 SoC, the PLL is configured +at program initialization with a constructor. This PLL sets the clock frequency +of the RISC-V CPU, and users of Freedom Metal who wish to set a specific clock +rate can use Freedom Metal to request that the PLL take on a certain output rate. + +In the DeviceTree for your target, there should be a node like the following +(example taken from the SiFive HiFive1): + +.. code-block:: DeviceTree + + hfclk: clock@4 { + compatible = "sifive,fe310-g000,pll"; + clocks = <&hfxoscout &hfroscout>; + clock-names = "pllref", "pllsel0"; + reg = <&prci 0x8 &prci 0xc>; + reg-names = "config", "divider"; + clock-frequency = <16000000>; + }; + +The ``clock-frequency`` property of the node sets the requested clock rate of +the FE310-G000 PLL. The PLL driver will attempt to configure the PLL to achieve +this clock rate. + +Users should note that the FE310-G000 PLL only supports certain input/output +clock rate ratios, and so the effective output rate of the PLL may differ from +the requested rate. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/interrupts.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/interrupts.rst new file mode 100644 index 000000000..914b58690 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/interrupts.rst @@ -0,0 +1,112 @@ +Interrupt Handlers +================== + +The Interrupt Heirarchy +----------------------- + +Freedom Metal conceptualizes interrupts as a heirarchy of interrupt controllers. +This heirarchy is established by the interrupt heirarchy of the target platform +itself. Presently, the interrupt heirarchy for a given platform is best documented +by the target's DeviceTree representation, which can be found in +``bsp//design.dts``. + +In Freedom Metal, the heirarchy is a tree. The nodes of the tree consist of +``struct metal_interrupt``: + +.. doxygenstruct:: metal_interrupt + :project: metal + +And the vertices of the tree consist of interrupt ``id``. + +.. digraph:: int_heirarchy_graph + + cpu [label="CPU"]; + cpu_int [label="CPU Interrupt Controller", shape=box]; + timer_int [label="Timer Interrupt Controller", shape=box]; + soft_int [label="Software Interrupt Controller", shape=box]; + + cpu -> cpu_int [label="ID = 0"]; + cpu_int -> timer_int [label="ID = timer_id"]; + cpu_int -> soft_int [label="ID = software_id"]; + +The CPU Interrupt Controller +---------------------------- + +The CPU interrupt controller is the top of the interrupt heirarchy. It must be +initialized before any other interrupt controllers are initialized. In example: + +.. code-block:: C + + struct metal_cpu *cpu0 = metal_get_cpu(0); + if(!cpu) { + /* Unable to get CPU handle */ + } + struct metal_interrupt *cpu_int = metal_cpu_interrupt_controller(cpu0); + if(!cpu_int) { + /* Unable to get CPU interrupt handle */ + } + metal_interrupt_init(cpu_int); + +The CPU interrupt must be enabled for the CPU to receive any interrupts, and any +enabled interrupts can be masked by disabling the CPU interrupt. + +.. code-block:: C + + int rc = 0; + + /* Enable the CPU interrupt */ + rc = metal_interrupt_enable(cpu_int, 0); + if(rc != 0) { + /* Failed to enable the CPU interrupt */ + } + + /* Disable the CPU interrupt */ + rc = metal_interrupt_disable(cpu_int, 0); + if(rc != 0) { + /* Failed to disable the CPU interrupt */ + } + +Interrupt Handlers +------------------ + +Interrupt handlers must conform to the following function signature: + +.. doxygentypedef:: metal_interrupt_handler_t + :project: metal + +Therefore, an interrupt handler might look like: + +.. code-block:: C + + void my_interrupt_handler(int id, void *priv_data) { + /* Contents of handler */ + } + +Registering an Interrupt Handler +-------------------------------- + +Interrupt handlers are registered with the interrupt controller for the interrupt +they are servicing. For example, if we want to register a CPU timer interrupt: + +.. code-block:: C + + struct metal_interrupt *timer_int = metal_cpu_timer_interrupt_controller(cpu0); + if(!timer_int) { + /* Failed to get timer interrupt controller */ + } + metal_interrupt_init(timer_int); + + int timer_id = metal_cpu_timer_get_interrupt_id(cpu0); + + int rc = metal_interrupt_register_handler(timer_int, timer_id, my_interrupt_handler, cpu0); + if(rc != 0) { + /* Failed to register interrupt handler */ + } + +Additional Documentation +------------------------ + +Additional documentation for the interrupt handler API can be found in +:doc:`the CPU API reference ` and +:doc:`the Interrupt API reference `. + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/itim.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/itim.rst new file mode 100644 index 000000000..cdee19ca9 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/itim.rst @@ -0,0 +1,41 @@ +Instruction Tightly Integrated Memory +===================================== + +The Instruction Tightly Integrated Memory (ITIM) is an optional feature +on certain SiFive RISC-V CPUs. The ITIM is a memory device which is +optimized in the CoreIP memory heirarchy to provide low-latency +access to instruction memory. + +Freedom Metal provides the ability to designate functions to run out of +the ITIM by decorating the functions with the following "decorator": + +.. doxygendefine:: METAL_PLACE_IN_ITIM + :project: metal + +For example: + +.. code-block:: C + + METAL_PLACE_IN_ITIM + void my_itim_func() { + /* This code will run out of the ITIM */ + } + +Caveats +------- +The ``METAL_PLACE_IN_ITIM`` decorator tells the toolchain to link the +decorated function into the ITIM memory. However, compiler optimizations +such as function inlining may cause execution to never transfer to +instructions fetched from the ITIM. + +If this compiler optimization is not desired, one workaround is to +tell the compiler to not inline the function: + +.. code-block:: C + + __attribute__((noinline)) + METAL_PLACE_IN_ITIM + void my_itim_func() { + /* This code will run out of the ITIM */ + } + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/pmps.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/pmps.rst new file mode 100644 index 000000000..aa535d651 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/pmps.rst @@ -0,0 +1,88 @@ +Physical Memory Protection +========================== + +Physical Memory Protection (PMP) is a part of the RISC-V Privileged Architecture +Specification which discribes the interface for a standard RISC-V memory +protection unit. + +The PMP defines a finite number of PMP regions which can be individually configured +to enforce access permissions to a range of addresses in memory. Each PMP region +is configurable with the following options: + +.. doxygenstruct:: metal_pmp_config + :project: metal + :members: + :no-link: + +Initializing the PMP +-------------------- + +All PMP-related functions first depend on having a handle to the PMP device: + +.. code-block:: C + + struct metal_pmp *pmp = metal_pmp_get_device(); + if(!pmp) { + /* Failed to get PMP device handle */ + } + +PMP initialization is optional and has the effect of disabling all PMP regions, +if possible: + +.. code-block:: C + + metal_pmp_init(pmp); + +The number of PMP regions available can be retrieved from the PMP device handle: + +.. doxygenstruct:: metal_pmp + :project: metal + :members: + :no-link: + +Configuring a PMP Region +------------------------ + +Freedom Metal has a set of APIs for configuring a PMP region. The most generic of these +is + +.. doxygenfunction:: metal_pmp_set_region + :project: metal + +This function allows for the configuration of all PMP region settings. + +Additional APIs are provided for granularly changing individual PMP region settings. +For example: + +.. doxygenfunction:: metal_pmp_set_address + :project: metal + :no-link: +.. doxygenfunction:: metal_pmp_lock + :project: metal + :no-link: +.. doxygenfunction:: metal_pmp_set_writeable + :project: metal + :no-link: + +Additional documentation for this API is provided in :doc:`the PMP API reference `. + +The RISC-V specification allows implementation of PMP to hard-wire the configuration +values of PMP regions. In these cases, attempts to configure these PMP regions will +fail. + +Handling PMP Access Faults +-------------------------- + +Attempted memory accesses which the PMP is configured to prevent trigger a +CPU exception. These exceptions can be handled by installing a CPU exception +handler for exception codes related to memory access faults. + +Additional documentation about creating and registering exception handlers can +be found in :doc:`the Exception Handlers Developer Guide `. + +Additional Documentation +------------------------ + +Additional documentation about the Physical Memory Protection system and fault +handling on RISC-V systems can be found in +`The RISC-V Privileged ISA Specification v1.10 `_. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/tty.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/tty.rst new file mode 100644 index 000000000..c94135174 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/devguide/tty.rst @@ -0,0 +1,24 @@ +Standard I/O +============ + +Freedom Metal integrates with libc ``STDOUT`` to provide virtual terminal support. +The default ``STDOUT`` device is the first UART serial peripheral on the target. +If no UART serial peripheral is present, such as in the case of SiFive CoreIP +test harnesses, then the bytes sent to ``STDOUT`` are dropped. + +Hello World +----------- + +Using the virtual terminal with Freedom Metal is exactly what you might expect: + +.. code-block:: C + :linenos: + + #include + + int main(void) { + printf("Hello, world!"); + + return 0; + } + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/index.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/index.rst new file mode 100644 index 000000000..b4e0e79d0 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/index.rst @@ -0,0 +1,25 @@ +Freedom Metal +============= + +This is the documentation for the SiFive Freedom Metal library |version|. + +Freedom Metal is generally available from the `Freedom Metal GitHub Repository`_. + +.. _Freedom Metal GitHub Repository: + https://github.com/sifive/freedom-metal + +Table of Contents +----------------- + +.. toctree:: + :maxdepth: 2 + + introduction + devguide + api + +Indices and tables +------------------ + +* :ref:`genindex` +* :ref:`search` diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/introduction.rst b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/introduction.rst new file mode 100644 index 000000000..de4da0d64 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/doc/sphinx/introduction.rst @@ -0,0 +1,37 @@ +Introduction to Freedom Metal +============================= + +What is Freedom Metal? +---------------------- + +Freedom Metal enables portable, bare-metal application development for all of +SiFive's RISC-V IP, FPGA evaluation targets, and development boards. + +Freedom Metal provides: + - A bare-metal C application environment + - An API for controlling CPU features and peripherals + - The ability to retarget to any SiFive RISC-V product + +This makes Freedom Metal suitable for: + - Writing portable hardware tests + - Bootstrapping bare metal application development + - A RISC-V hardware abstraction layer + - And more! + + +How Do I Use Freedom Metal? +--------------------------- + +The best way to get started writing applications with Freedom Metal is to use +the `SiFive Freedom E SDK`_ which bundles the build scripts and configuration +necessary to use Freedom Metal with SiFive's standard evaluation products. + +If you prefer working with an Integrated Development Environment (IDE), +`SiFive Freedom Studio`_ comes packaged with a prebuilt toolchain and the same +Freedom Metal examples from Freedom E SDK. + +.. _SiFive Freedom E SDK: + https://github.com/sifive/freedom-e-sdk + +.. _SiFive Freedom Studio: + https://www.sifive.com/boards#software diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/crt0.S b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/crt0.S new file mode 100644 index 000000000..2141915ea --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/crt0.S @@ -0,0 +1,220 @@ +/* Copyright (c) 2017-2018 SiFive Inc. All rights reserved. + + This copyrighted material is made available to anyone wishing to use, + modify, copy, or redistribute it subject to the terms and conditions + of the FreeBSD License. This program is distributed in the hope that + it will be useful, but WITHOUT ANY WARRANTY expressed or implied, + including the implied warranties of MERCHANTABILITY or FITNESS FOR + A PARTICULAR PURPOSE. A copy of this license is available at + http://www.opensource.org/licenses. +*/ + +/* crt0.S: Entry point for RISC-V METAL programs. */ + +.section .text.libgloss.start +.global _start +.type _start, @function + + /* _start is defined by the METAL to have been called with the following + * arguments: + * a0: the hart ID of the currently executing hart. Harts can start at + * any arbitrary point, it's the C library's job to ensure the code is + * safe. + * a1: a pointer to a description of the machine on which this code is + * currently executing. This is probably 0 on an embedded system + * because they tend to not be dynamically portable. As such, newlib + * ignores this argument. + * a2: a pointer to a function that must be run after the envirnoment has + * been initialized, but before user code can be expected to be run. + * If this is 0 then there is no function to be run. */ +_start: +.cfi_startproc +.cfi_undefined ra + + /* This is a bit funky: it's not usually sane for _start to return, but in + * this case we actually want to in order to signal an error to the METAL. */ + mv s0, ra + + /* Before doing anything we must initialize the global pointer, as we cannot + * safely perform any access that may be relaxed without GP being set. This + * is done with relaxation disabled to avoid relaxing the address calculation + * to just "addi gp, gp, 0". */ +.option push +.option norelax + la gp, __global_pointer$ +.option pop + + /* The METAL is designed for a bare-metal environment and therefor is expected + * to define its own stack pointer. We also align the stack pointer here + * because the only RISC-V ABI that's currently defined mandates 16-byte + * stack alignment. */ + la sp, _sp + + /* Increment by hartid number of stack sizes */ + li t0, 0 + la t1, __stack_size +1: + beq t0, a0, 1f + add sp, sp, t1 + addi t0, t0, 1 + j 1b +1: + andi sp, sp, -16 + + /* If we're not hart 0, skip the initialization work */ + la t0, __metal_boot_hart + bne a0, t0, _skip_init + + /* Embedded systems frequently require relocating the data segment before C + * code can be run -- for example, the data segment may exist in flash upon + * boot and then need to get relocated into a non-persistant writable memory + * before C code can execute. If this is the case we do so here. This step + * is optional: if the METAL provides an environment in which this relocation + * is not necessary then it must simply set metal_segment_data_source_start to + * be equal to metal_segment_data_target_start. */ + la t0, metal_segment_data_source_start + la t1, metal_segment_data_target_start + la t2, metal_segment_data_target_end + + beq t0, t1, 2f + bge t1, t2, 2f + +1: + lw a0, 0(t0) + addi t0, t0, 4 + sw a0, 0(t1) + addi t1, t1, 4 + blt t1, t2, 1b +2: + + /* Copy the ITIM section */ + la t0, metal_segment_itim_source_start + la t1, metal_segment_itim_target_start + la t2, metal_segment_itim_target_end + + beq t0, t1, 2f + bge t1, t2, 2f + +1: + lw a0, 0(t0) + addi t0, t0, 4 + sw a0, 0(t1) + addi t1, t1, 4 + blt t1, t2, 1b +2: + + /* Zero the BSS segment. */ + la t1, metal_segment_bss_target_start + la t2, metal_segment_bss_target_end + + bge t1, t2, 2f + +1: + sw x0, 0(t1) + addi t1, t1, 4 + blt t1, t2, 1b +2: + + /* At this point we're in an environment that can execute C code. The first + * thing to do is to make the callback to the parent environment if it's been + * requested to do so. */ + beqz a2, 1f + jalr a2 +1: + + /* The RISC-V port only uses new-style constructors and destructors. */ + la a0, __libc_fini_array + call atexit + call __libc_init_array + +_skip_init: + + /* Synchronize harts so that secondary harts wait until hart 0 finishes + initializing */ + call _synchronize_harts + + /* Check RISC-V isa and enable FS bits if Floating Point architecture. */ + csrr a5, misa + li a4, 0x10028 + and a5, a5, a4 + beqz a5, 1f + csrr a5, mstatus + lui a4, 0x2 + or a5, a5, a4 + csrw mstatus, a5 + csrwi fcsr, 0 +1: + + /* This is a C runtime, so main() is defined to have some arguments. Since + * there's nothing sane the METAL can pass we don't bother with that but + * instead just setup as close to a NOP as we can. */ + li a0, 1 /* argc=1 */ + la a1, argv /* argv = {"libgloss", NULL} */ + la a2, envp /* envp = {NULL} */ + call secondary_main + + /* Call exit to handle libc's cleanup routines. Under normal contains this + * shouldn't even get called, but I'm still not using a tail call here + * because returning to the METAL is the right thing to do in pathological + * situations. */ + call exit + + /* And here's where we return. Again, it's a bit odd but the METAL defines + * this as a bad idea (ie, as opposed to leaving it undefined) and at this + * point it's really the only thing left to do. */ + mv ra, s0 + ret + +.cfi_endproc + +/* RISC-V systems always use __libc_{init,fini}_array, but for compatibility we + * define _{init,fini} to do nothing. */ +.global _init +.type _init, @function +.global _fini +.type _fini, @function +_init: +_fini: + ret +.size _init, .-_init +.size _fini, .-_fini + +/* By default, secondary_main will cause secondary harts to spin forever. + * Users can redefine secondary_main themselves to run code on secondary harts */ +.weak secondary_main +.global secondary_main +.type secondary_main, @function + +secondary_main: + addi sp, sp, -16 +#if __riscv_xlen == 32 + sw ra, 4(sp) +#else + sd ra, 8(sp) +#endif + csrr t0, mhartid + la t1, __metal_boot_hart + beq t0, t1, 2f +1: + wfi + j 1b +2: + call main +#if __riscv_xlen == 32 + lw ra, 4(sp) +#else + ld ra, 8(sp) +#endif + addi sp, sp, 16 + ret + +/* This shim allows main() to be passed a set of arguments that can satisfy the + * requirements of the C API. */ +.section .rodata.libgloss.start +argv: +.dc.a name +envp: +.dc.a 0 +name: +.asciz "libgloss" + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/nanosleep.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/nanosleep.c new file mode 100644 index 000000000..8be22104e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/nanosleep.c @@ -0,0 +1,9 @@ +#include +#include + +int +nanosleep(const struct timespec *rqtp, struct timespec *rmtp) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/synchronize_harts.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/synchronize_harts.c new file mode 100644 index 000000000..3e857d1df --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/synchronize_harts.c @@ -0,0 +1,59 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include +#include + +#define METAL_REG(base, offset) (((unsigned long)(base) + (offset))) +#define METAL_REGW(base, offset) (__METAL_ACCESS_ONCE((__metal_io_u32 *)METAL_REG((base), (offset)))) +#define METAL_MSIP(base, hart) (METAL_REGW((base),4*(hart))) + +/* + * _synchronize_harts() is called by crt0.S to cause harts > 0 to wait for + * hart 0 to finish copying the datat section, zeroing the BSS, and running + * the libc contstructors. + */ +void _synchronize_harts() { +#if __METAL_DT_MAX_HARTS > 1 + + int hart = metal_cpu_get_current_hartid(); + uintptr_t msip_base = 0; + + /* Get the base address of the MSIP registers */ +#ifdef __METAL_DT_RISCV_CLINT0_HANDLE + msip_base = __metal_driver_sifive_clint0_control_base(__METAL_DT_RISCV_CLINT0_HANDLE); + msip_base += METAL_RISCV_CLINT0_MSIP_BASE; +#elif __METAL_DT_RISCV_CLIC0_HANDLE + msip_base = __metal_driver_sifive_clic0_control_base(__METAL_DT_RISCV_CLIC0_HANDLE); + msip_base += METAL_RISCV_CLIC0_MSIP_BASE; +#else +#warning No handle for CLINT or CLIC found, harts may be unsynchronized after init! +#endif + + /* Disable machine interrupts as a precaution */ + __asm__ volatile("csrc mstatus, %0" :: "r" (METAL_MSTATUS_MIE)); + + if (hart == 0) { + /* Hart 0 waits for all harts to set their MSIP bit */ + for (int i = 1 ; i < __METAL_DT_MAX_HARTS; i++) { + while (METAL_MSIP(msip_base, i) == 0) ; + } + + /* Hart 0 clears everyone's MSIP bit */ + for (int i = 1 ; i < __METAL_DT_MAX_HARTS; i++) { + METAL_MSIP(msip_base, i) = 0; + } + } else { + /* Other harts set their MSIP bit to indicate they're ready */ + METAL_MSIP(msip_base, hart) = 1; + __asm__ volatile ("fence w,rw"); + + /* Wait for hart 0 to clear the MSIP bit */ + while (METAL_MSIP(msip_base, hart) == 1) ; + } + +#endif /* __METAL_DT_MAX_HARTS > 1 */ +} + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_access.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_access.c new file mode 100644 index 000000000..c0bc1534d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_access.c @@ -0,0 +1,8 @@ +#include + +int +_access(const char *file, int mode) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chdir.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chdir.c new file mode 100644 index 000000000..f33d26a44 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chdir.c @@ -0,0 +1,8 @@ +#include + +int +_chdir(const char *path) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chmod.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chmod.c new file mode 100644 index 000000000..67412bf7d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chmod.c @@ -0,0 +1,9 @@ +#include +#include + +int +_chmod(const char *path, mode_t mode) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chown.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chown.c new file mode 100644 index 000000000..302952eb1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_chown.c @@ -0,0 +1,9 @@ +#include +#include + +int +_chown(const char *path, uid_t owner, gid_t group) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_close.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_close.c new file mode 100644 index 000000000..26dd6a59e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_close.c @@ -0,0 +1,8 @@ +#include + +int +_close(int file) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_execve.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_execve.c new file mode 100644 index 000000000..9ae9f7e50 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_execve.c @@ -0,0 +1,8 @@ +#include + +int +_execve(const char *name, char *const argv[], char *const env[]) +{ + errno = ENOMEM; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_exit.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_exit.c new file mode 100644 index 000000000..35f5f1a16 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_exit.c @@ -0,0 +1,8 @@ +#include + +void +_exit(int exit_status) +{ + metal_shutdown(exit_status); + while (1); +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_faccessat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_faccessat.c new file mode 100644 index 000000000..873d52c2e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_faccessat.c @@ -0,0 +1,8 @@ +#include + +int +_faccessat(int dirfd, const char *file, int mode, int flags) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fork.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fork.c new file mode 100644 index 000000000..64e67569f --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fork.c @@ -0,0 +1,8 @@ +#include + +int +_fork() +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstat.c new file mode 100644 index 000000000..fedc28977 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstat.c @@ -0,0 +1,9 @@ +#include +#include + +int +_fstat(int file, struct stat *st) +{ + errno = -ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstatat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstatat.c new file mode 100644 index 000000000..f2f43bd9e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_fstatat.c @@ -0,0 +1,9 @@ +#include +#include + +int +_fstatat(int dirfd, const char *file, struct stat *st, int flags) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_ftime.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_ftime.c new file mode 100644 index 000000000..65c156398 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_ftime.c @@ -0,0 +1,9 @@ +#include +#include + +int +_ftime(struct timeb *tp) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getcwd.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getcwd.c new file mode 100644 index 000000000..82e8404ee --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getcwd.c @@ -0,0 +1,8 @@ +#include + +char * +_getcwd(char *buf, size_t size) +{ + errno = -ENOSYS; + return NULL; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getpid.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getpid.c new file mode 100644 index 000000000..589ad117c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_getpid.c @@ -0,0 +1,7 @@ +#include + +int +_getpid() +{ + return 1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_gettimeofday.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_gettimeofday.c new file mode 100644 index 000000000..3f867e4eb --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_gettimeofday.c @@ -0,0 +1,19 @@ +#include +#include +#include + +int +_gettimeofday(struct timeval *tp, void *tzp) +{ + int rv; + unsigned long long mcc, timebase; + if (rv = metal_timer_get_cyclecount(0, &mcc)) { + return -1; + } + if (rv = metal_timer_get_timebase_frequency(0, &timebase)) { + return -1; + } + tp->tv_sec = mcc / timebase; + tp->tv_usec = mcc % timebase * 1000000 / timebase; + return 0; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_isatty.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_isatty.c new file mode 100644 index 000000000..dd4f1461b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_isatty.c @@ -0,0 +1,7 @@ +#include + +int +_isatty(int file) +{ + return (file == STDOUT_FILENO); +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_kill.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_kill.c new file mode 100644 index 000000000..9003f266f --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_kill.c @@ -0,0 +1,8 @@ +#include + +int +_kill(int pid, int sig) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_link.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_link.c new file mode 100644 index 000000000..40d5912bc --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_link.c @@ -0,0 +1,7 @@ +#include + +int _link(const char *old_name, const char *new_name) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lseek.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lseek.c new file mode 100644 index 000000000..d28a781f8 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lseek.c @@ -0,0 +1,9 @@ +#include +#include + +off_t +_lseek(int file, off_t ptr, int dir) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lstat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lstat.c new file mode 100644 index 000000000..97a45855f --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_lstat.c @@ -0,0 +1,8 @@ +#include +#include + +int _lstat(const char *file, struct stat *st) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_open.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_open.c new file mode 100644 index 000000000..a59f627f0 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_open.c @@ -0,0 +1,8 @@ +#include + +int +_open(const char *name, int flags, int mode) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_openat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_openat.c new file mode 100644 index 000000000..206de3bde --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_openat.c @@ -0,0 +1,8 @@ +#include + +int +_openat(int dirfd, const char *name, int flags, int mode) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_read.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_read.c new file mode 100644 index 000000000..15833cabb --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_read.c @@ -0,0 +1,9 @@ +#include +#include + +ssize_t +_read(int file, void *ptr, size_t len) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sbrk.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sbrk.c new file mode 100644 index 000000000..34ef77ff5 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sbrk.c @@ -0,0 +1,38 @@ +#include + +/* brk is handled entirely within the C library. This limits METAL programs that + * use the C library to be disallowed from dynamically allocating memory + * without talking to the C library, but that sounds like a sane way to go + * about it. Note that there is no error checking anywhere in this file, users + * will simply get the relevant error when actually trying to use the memory + * that's been allocated. */ +extern char metal_segment_heap_target_start; +extern char metal_segment_heap_target_end; +static char *brk = &metal_segment_heap_target_start; + +int +_brk(void *addr) +{ + brk = addr; + return 0; +} + +char * +_sbrk(ptrdiff_t incr) +{ + char *old = brk; + + /* If __heap_size == 0, we can't allocate memory on the heap */ + if(&metal_segment_heap_target_start == &metal_segment_heap_target_end) { + return NULL; + } + + /* Don't move the break past the end of the heap */ + if ((brk + incr) < &metal_segment_heap_target_end) { + brk += incr; + } else { + brk = &metal_segment_heap_target_end; + } + + return old; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_stat.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_stat.c new file mode 100644 index 000000000..3c2e41910 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_stat.c @@ -0,0 +1,9 @@ +#include +#include + +int +_stat(const char *file, struct stat *st) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sysconf.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sysconf.c new file mode 100644 index 000000000..452a252ae --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_sysconf.c @@ -0,0 +1,16 @@ +#include +#include + +/* Get configurable system variables. */ + +long +_sysconf(int name) +{ + switch (name) + { + case _SC_CLK_TCK: + return CLOCKS_PER_SEC; + } + + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_times.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_times.c new file mode 100644 index 000000000..40d1f4e3f --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_times.c @@ -0,0 +1,41 @@ +#include +#include +#include +#include + +extern int _gettimeofday(struct timeval *, void *); + +/* Timing information for current process. From + newlib/libc/include/sys/times.h the tms struct fields are as follows: + + - clock_t tms_utime : user clock ticks + - clock_t tms_stime : system clock ticks + - clock_t tms_cutime : children's user clock ticks + - clock_t tms_cstime : children's system clock ticks + + Since maven does not currently support processes we set both of the + children's times to zero. Eventually we might want to separately + account for user vs system time, but for now we just return the total + number of cycles since starting the program. */ +clock_t +_times(struct tms *buf) +{ + int rv; + // when called for the first time, initialize t0 + static struct timeval t0; + if (t0.tv_sec == 0 && t0.tv_usec == 0) + _gettimeofday (&t0, 0); + + struct timeval t; + _gettimeofday (&t, 0); + + unsigned long long timebase; + if (rv = metal_timer_get_timebase_frequency(0, &timebase)) { + return -1; + } + + long long utime = (t.tv_sec - t0.tv_sec) * 1000000 + (t.tv_usec - t0.tv_usec); + buf->tms_utime = utime * timebase / 1000000; + buf->tms_stime = buf->tms_cstime = buf->tms_cutime = 0; + return 0; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_unlink.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_unlink.c new file mode 100644 index 000000000..b369d2017 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_unlink.c @@ -0,0 +1,8 @@ +#include + +int +_unlink(const char *name) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_utime.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_utime.c new file mode 100644 index 000000000..33d557aa7 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_utime.c @@ -0,0 +1,9 @@ +#include +struct utimbuf; + +int +_utime(const char *path, const struct utimbuf *times) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_wait.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_wait.c new file mode 100644 index 000000000..9d459f14c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_wait.c @@ -0,0 +1,7 @@ +#include + +int _wait(int *status) +{ + errno = ENOSYS; + return -1; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_write.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_write.c new file mode 100644 index 000000000..bfcf0cb2b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/sys_write.c @@ -0,0 +1,19 @@ +#include +#include +#include +#include + +/* Write to a file. */ +ssize_t +_write(int file, const void *ptr, size_t len) +{ + if (file != STDOUT_FILENO) { + errno = ENOSYS; + return -1; + } + + const char *bptr = ptr; + for (size_t i = 0; i < len; ++i) + metal_tty_putc(bptr[i]); + return 0; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/button.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/button.h new file mode 100644 index 000000000..0c26f435a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/button.h @@ -0,0 +1,59 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__BUTTON_H +#define METAL__BUTTON_H + +/*! + * @file button.h + * API for interfacing with physical buttons + */ + +#include + +struct metal_button; + +struct metal_button_vtable { + int (*button_exist)(struct metal_button *button, char *label); + struct metal_interrupt* (*interrupt_controller)(struct metal_button *button); + int (*get_interrupt_id)(struct metal_button *button); +}; + +/*! + * @brief A button device handle + * + * A `struct metal_button` is an implementation-defined object which represents + * a button on a development board. + */ +struct metal_button { + const struct metal_button_vtable *vtable; +}; + +/*! + * @brief Get a reference to a button + * + * @param label The DeviceTree label for the button + * @return A handle for the button + */ +struct metal_button* metal_button_get(char *label); + + +/*! + * @brief Get the interrupt controller for a button + * + * @param button The handle for the button + * @return A pointer to the interrupt controller responsible for handling + * button interrupts. + */ +inline struct metal_interrupt* + metal_button_interrupt_controller(struct metal_button *button) { return button->vtable->interrupt_controller(button); } + +/*! + * @brief Get the interrupt id for a button + * + * @param button The handle for the button + * @return The interrupt id corresponding to a button. + */ +inline int metal_button_get_interrupt_id(struct metal_button *button) { return button->vtable->get_interrupt_id(button); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cache.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cache.h new file mode 100644 index 000000000..a8a60ada6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cache.h @@ -0,0 +1,58 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__CACHE_H +#define METAL__CACHE_H + +/*! + * @file cache.h + * + * @brief API for configuring caches + */ + +struct metal_cache; + +struct __metal_cache_vtable { + void (*init)(struct metal_cache *cache, int ways); + int (*get_enabled_ways)(struct metal_cache *cache); + int (*set_enabled_ways)(struct metal_cache *cache, int ways); +}; + +/*! + * @brief a handle for a cache + */ +struct metal_cache { + const struct __metal_cache_vtable *vtable; +}; + +/*! + * @brief Initialize a cache + * @param cache The handle for the cache to initialize + * @param ways The number of ways to enable + * + * Initializes a cache with the requested number of ways enabled. + */ +inline void metal_cache_init(struct metal_cache *cache, int ways) { + return cache->vtable->init(cache, ways); +} + +/*! + * @brief Get the current number of enabled cache ways + * @param cache The handle for the cache + * @return The current number of enabled cache ways + */ +inline int metal_cache_get_enabled_ways(struct metal_cache *cache) { + return cache->vtable->get_enabled_ways(cache); +} + +/*! + * @brief Enable the requested number of cache ways + * @param cache The handle for the cache + * @param ways The number of ways to enabled + * @return 0 if the ways are successfully enabled + */ +inline int metal_cache_set_enabled_ways(struct metal_cache *cache, int ways) { + return cache->vtable->set_enabled_ways(cache, ways); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/clock.h new file mode 100644 index 000000000..277841e01 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/clock.h @@ -0,0 +1,119 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__CLOCK_H +#define METAL__CLOCK_H + +/*! + * @file clock.h + * @brief API for manipulating clock sources + * + * The clock interface allows for controlling the rate of various clocks in the system. + */ + +struct metal_clock; + +#include + +/* The generic interface to all clocks. */ +struct __metal_clock_vtable { + long (*get_rate_hz)(const struct metal_clock *clk); + long (*set_rate_hz)(struct metal_clock *clk, long hz); +}; + +/*! + * @brief Function signature of clock pre-rate change callbacks + */ +typedef void (*metal_clock_pre_rate_change_callback)(void *priv); + +/*! + * @brief Function signature of clock post-rate change callbacks + */ +typedef void (*metal_clock_post_rate_change_callback)(void *priv); + +/*! + * @struct metal_clock + * @brief The handle for a clock + * + * Clocks are defined as a pointer to a `struct metal_clock`, the contents of which + * are implementation defined. Users of the clock interface must call functions + * which accept a `struct metal_clock *` as an argument to interract with the clock. + * + * Note that no mechanism for obtaining a pointer to a `struct metal_clock` has been + * defined, making it impossible to call any of these functions without invoking + * implementation-defined behavior. + */ +struct metal_clock { + const struct __metal_clock_vtable *vtable; + + /* Pre-rate change callback */ + metal_clock_pre_rate_change_callback _pre_rate_change_callback; + void *_pre_rate_change_callback_priv; + + /* Post-rate change callback */ + metal_clock_post_rate_change_callback _post_rate_change_callback; + void *_post_rate_change_callback_priv; +}; + +/*! + * @brief Returns the current rate of the given clock + * + * @param clk The handle for the clock + * @return The current rate of the clock in Hz + */ +inline long metal_clock_get_rate_hz(const struct metal_clock *clk) { return clk->vtable->get_rate_hz(clk); } + +/*! + * @brief Set the current rate of a clock + * + * @param clk The handle for the clock + * @param hz The desired rate in Hz + * @return The new rate of the clock in Hz. + * + * Attempts to set the current rate of the given clock to as close as possible + * to the given rate in Hz. Returns the actual value that's been selected, which + * could be anything! + * + * Prior to and after the rate change of the clock, this will call the registered + * pre- and post-rate change callbacks. + */ +inline long metal_clock_set_rate_hz(struct metal_clock *clk, long hz) +{ + if(clk->_pre_rate_change_callback != NULL) + clk->_pre_rate_change_callback(clk->_pre_rate_change_callback_priv); + + long out = clk->vtable->set_rate_hz(clk, hz); + + if (clk->_post_rate_change_callback != NULL) + clk->_post_rate_change_callback(clk->_post_rate_change_callback_priv); + + return out; +} + +/*! + * @brief Register a callback that must be called before a rate change + * + * @param clk The handle for the clock + * @param cb The callback to be registered + * @param priv Private data for the callback handler + */ +inline void metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, metal_clock_pre_rate_change_callback cb, void *priv) +{ + clk->_pre_rate_change_callback = cb; + clk->_pre_rate_change_callback_priv = priv; +} + +/*! + * @brief Registers a callback that must be called after a rate change + * + * @param clk The handle for the clock + * @param cb The callback to be registered + * @param priv Private data for the callback handler + */ +inline void metal_clock_register_post_rate_change_callback(struct metal_clock *clk, metal_clock_post_rate_change_callback cb, void *priv) +{ + clk->_post_rate_change_callback = cb; + clk->_post_rate_change_callback_priv = priv; +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/compiler.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/compiler.h new file mode 100644 index 000000000..62c0ea975 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/compiler.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__COMPILER_H +#define METAL__COMPILER_H + +#define __METAL_DECLARE_VTABLE(type) \ + extern const struct type type; + +#define __METAL_DEFINE_VTABLE(type) \ + const struct type type + +#define __METAL_GET_FIELD(reg, mask) \ + (((reg) & (mask)) / ((mask) & ~((mask) << 1))) + +/* Set field with mask for a given value */ +#define __METAL_SET_FIELD(reg, mask, val) \ + (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask))) + +void _metal_trap(int ecode); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cpu.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cpu.h new file mode 100644 index 000000000..453bd12de --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/cpu.h @@ -0,0 +1,271 @@ +/* Copyright 2018 SiFive, Inc */ + +/* SPDX-License-Identifier: Apache-2.0 */ + +/*! @file cpu.h + * @brief API for accessing CPU capabilities. + */ + +#ifndef METAL__CPU_H +#define METAL__CPU_H + +#include +#include + +struct metal_cpu; + +/*! + * @brief Function signature for exception handlers + */ +typedef void (*metal_exception_handler_t) (struct metal_cpu *cpu, int ecode); + +struct metal_cpu_vtable { + unsigned long long (*timer_get)(struct metal_cpu *cpu); + unsigned long long (*timebase_get)(struct metal_cpu *cpu); + unsigned long long (*mtime_get)(struct metal_cpu *cpu); + int (*mtimecmp_set)(struct metal_cpu *cpu, unsigned long long time); + struct metal_interrupt* (*tmr_controller_interrupt)(struct metal_cpu *cpu); + int (*get_tmr_interrupt_id)(struct metal_cpu *cpu); + struct metal_interrupt* (*sw_controller_interrupt)(struct metal_cpu *cpu); + int (*get_sw_interrupt_id)(struct metal_cpu *cpu); + int (*set_sw_ipi)(struct metal_cpu *cpu, int hartid); + int (*clear_sw_ipi)(struct metal_cpu *cpu, int hartid); + int (*get_msip)(struct metal_cpu *cpu, int hartid); + struct metal_interrupt* (*controller_interrupt)(struct metal_cpu *cpu); + int (*exception_register)(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler); + int (*get_ilen)(struct metal_cpu *cpu, uintptr_t epc); + uintptr_t (*get_epc)(struct metal_cpu *cpu); + int (*set_epc)(struct metal_cpu *cpu, uintptr_t epc); +}; + +/*! @brief A device handle for a CPU hart + */ +struct metal_cpu { + const struct metal_cpu_vtable *vtable; +}; + +/*! @brief Get a reference to a CPU hart + * + * @param hartid The ID of the desired CPU hart + * @return A pointer to the CPU device handle + */ +struct metal_cpu* metal_cpu_get(int hartid); + +/*! @brief Get the hartid of the CPU hart executing this function + * + * @return The hartid of the current CPU hart */ +int metal_cpu_get_current_hartid(); + +/*! @brief Get the number of CPU harts + * + * @return The number of CPU harts */ +int metal_cpu_get_num_harts(); + +/*! @brief Get the CPU cycle count timer value + * + * Get the value of the cycle count timer for a given CPU + * + * @param cpu The CPU device handle + * @return The value of the CPU cycle count timer + */ +inline unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu) +{ return cpu->vtable->timer_get(cpu); } + +/*! @brief Get the timebase of the CPU + * + * Get the value of the timebase of the cycle count timer + * + * @param cpu The CPU device handle + * @return The value of the cycle count timer timebase + */ +inline unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu) +{ return cpu->vtable->timebase_get(cpu); } + +/*! @brief Get the value of the mtime RTC + * + * Get the value of the mtime real-time clock. The CPU interrupt controller + * must be initialized before this function is called or the return value + * will be 0. + * + * @param cpu The CPU device handle + * @return The value of mtime, or 0 if failure + */ +inline unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu) +{ return cpu->vtable->mtime_get(cpu); } + +/*! @brief Set the value of the RTC mtimecmp RTC + * + * Set the value of the mtime real-time clock compare register. The CPU + * interrupt controller must be initialized before this function is called + * or the return value will be -1; + * + * @param cpu The CPU device handle + * @param time The value to set the compare register to + * @return The value of mtimecmp or -1 if error + */ +inline int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, unsigned long long time) +{ return cpu->vtable->mtimecmp_set(cpu, time); } + +/*! @brief Get a reference to RTC timer interrupt controller + * + * Get a reference to the interrupt controller for the real-time clock interrupt. + * The controller returned by this function must be initialized before any interrupts + * are registered or enabled with it. + * + * @param cpu The CPU device handle + * @return A pointer to the timer interrupt handle + */ +inline struct metal_interrupt* metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->tmr_controller_interrupt(cpu); } + +/*! @brief Get the RTC timer interrupt id + * + * Get the interrupt ID of the real-time clock interrupt + * + * @param cpu The CPU device handle + * @return The timer interrupt ID + */ +inline int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu) +{ return cpu->vtable->get_tmr_interrupt_id(cpu); } + +/*! @brief Get a reference to the software interrupt controller + * + * Get a reference to the interrupt controller for the software/inter-process + * interrupt. The controller returned by this function must be initialized before + * any interrupts are registered or enabled with it. + * + * @param cpu The CPU device handle + * @return A pointer to the software interrupt handle + */ +inline struct metal_interrupt* metal_cpu_software_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->sw_controller_interrupt(cpu); } + +/*! @brief Get the software interrupt id + * + * Get the interrupt ID for the software/inter-process interrupt + * + * @param cpu The CPU device handle + * @return the software interrupt ID + */ +inline int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu) +{ return cpu->vtable->get_sw_interrupt_id(cpu); } + +/*! + * @brief Set the inter-process interrupt for a hart + * + * Trigger a software/inter-process interrupt for a hart. The CPU interrupt + * controller for the CPU handle passed to this function must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param hartid The CPU hart ID to be interrupted + * @return 0 upon success + */ +inline int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->set_sw_ipi(cpu, hartid); } + +/*! + * @brief Clear the inter-process interrupt for a hart + * + * Clear the software/inter-process interrupt for a hart. The CPU interrupt + * controller for the CPU handle passed to this function must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param hartid The CPU hart ID to clear + * @return 0 upon success + */ +inline int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->clear_sw_ipi(cpu, hartid); } + +/*! + * @brief Get the value of MSIP for the given hart + * + * Get the value of the machine software interrupt pending bit for + * the given hart. The CPU interrupt controller for the CPU handle passed + * as argument to this function must be initialized before this function + * is called. + * + * @param cpu the CPU device handle + * @param hartid The CPU hart to read + * @return 0 upon success + */ +inline int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid) +{ return cpu->vtable->get_msip(cpu, hartid); } + +/*! + * @brief Get the interrupt controller for the CPU + * + * Get the CPU interrupt controller. The controller returned by this + * function must be initialized before any interrupts are registered + * or enabled and before any exception handlers are registered with + * this CPU. + * + * @param cpu The CPU device handle + * @return The handle for the CPU interrupt controller + */ +inline struct metal_interrupt* metal_cpu_interrupt_controller(struct metal_cpu *cpu) +{ return cpu->vtable->controller_interrupt(cpu); } + +/*! + * @brief Register an exception handler + * + * Register an exception handler for the CPU. The CPU interrupt controller must be initialized + * before this function is called. + * + * @param cpu The CPU device handle + * @param ecode The exception code to register a handler for + * @param handler Callback function for the exception handler + * @return 0 upon success + */ +inline int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler) +{ return cpu->vtable->exception_register(cpu, ecode, handler); } + +/*! + * @brief Get the length of an instruction in bytes + * + * Get the length of an instruction in bytes. + * + * On RISC-V platforms, this is useful for detecting whether an instruction is + * compressed (2 bytes long) or uncompressed (4 bytes long). + * + * This function is useful in conjuction with `metal_cpu_get_exception_pc()` + * and `metal_cpu_set_exception_pc()` in order to cause the exception handler to + * return execution after the faulting instruction. + * + * @param cpu The CPU device handle + * @param epc The address of the instruction to measure + * @return the length of the instruction in bytes + */ +inline int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc) +{ return cpu->vtable->get_ilen(cpu, epc); } + +/*! + * @brief Get the program counter of the current exception. + * + * This function must be called within an exception handler. The behavior is + * undefined outside of an exception handler. + * + * @param cpu The CPU device handle + * @return The value of the program counter at the time of the exception + */ +inline uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu) +{ return cpu->vtable->get_epc(cpu); } + +/*! + * @brief Set the exception program counter + * + * This function must be called within an exception handler. The behavior + * is undefined outside of an exception handler. + * + * This function can be used to cause an exception handler to return execution + * to an address other than the one that caused the exception. + * + * @param cpu the CPU device handle + * @param epc The address to set the exception program counter to + * @return 0 upon success + */ +inline int metal_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t epc) +{ return cpu->vtable->set_epc(cpu, epc); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-clock.h new file mode 100644 index 000000000..2647c5981 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-clock.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__FIXED_CLOCK_H +#define METAL__DRIVERS__FIXED_CLOCK_H + +struct __metal_driver_fixed_clock; + +#include +#include + +struct __metal_driver_vtable_fixed_clock { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_fixed_clock) + +struct __metal_driver_fixed_clock { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-factor-clock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-factor-clock.h new file mode 100644 index 000000000..936ce8d77 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/fixed-factor-clock.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__FIXED_FACTOR_CLOCK_H +#define METAL__DRIVERS__FIXED_FACTOR_CLOCK_H + +struct __metal_driver_fixed_factor_clock; + +#include +#include + +struct __metal_driver_vtable_fixed_factor_clock { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_fixed_factor_clock) + +struct __metal_driver_fixed_factor_clock { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_clint0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_clint0.h new file mode 100644 index 000000000..08d571e1c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_clint0.h @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_CLINT0_H +#define METAL__DRIVERS__RISCV_CLINT0_H + +#include +#include + +struct __metal_driver_vtable_riscv_clint0 { + struct metal_interrupt_vtable clint_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_clint0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_riscv_clint0 { + struct metal_interrupt controller; + int init_done; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_cpu.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_cpu.h new file mode 100644 index 000000000..eb1e5b8ca --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_cpu.h @@ -0,0 +1,203 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_CPU_H +#define METAL__DRIVERS__RISCV_CPU_H + +#include +#include +#include + +#define METAL_MAX_CORES 8 +#define METAL_MAX_MI 32 /* Per ISA MCause interrupts 32+ are Reserved */ +#define METAL_MAX_ME 12 /* Per ISA Exception codes 12+ are Reserved */ +#define METAL_DEFAULT_RTC_FREQ 32768 + +#define METAL_DISABLE 0 +#define METAL_ENABLE 1 + +#define METAL_ISA_A_EXTENSIONS 0x0001 +#define METAL_ISA_C_EXTENSIONS 0x0004 +#define METAL_ISA_D_EXTENSIONS 0x0008 +#define METAL_ISA_E_EXTENSIONS 0x0010 +#define METAL_ISA_F_EXTENSIONS 0x0020 +#define METAL_ISA_G_EXTENSIONS 0x0040 +#define METAL_ISA_I_EXTENSIONS 0x0100 +#define METAL_ISA_M_EXTENSIONS 0x1000 +#define METAL_ISA_N_EXTENSIONS 0x2000 +#define METAL_ISA_Q_EXTENSIONS 0x10000 +#define METAL_ISA_S_EXTENSIONS 0x40000 +#define METAL_ISA_U_EXTENSIONS 0x100000 +#define METAL_ISA_V_EXTENSIONS 0x200000 +#define METAL_ISA_XL32_EXTENSIONS 0x40000000UL +#define METAL_ISA_XL64_EXTENSIONS 0x8000000000000000UL +#define METAL_ISA_XL128_EXTENSIONS 0xC000000000000000UL + +#define METAL_MTVEC_DIRECT 0x00 +#define METAL_MTVEC_VECTORED 0x01 +#define METAL_MTVEC_CLIC 0x02 +#define METAL_MTVEC_CLIC_VECTORED 0x03 +#define METAL_MTVEC_CLIC_RESERVED 0x3C +#define METAL_MTVEC_MASK 0x3F +#if __riscv_xlen == 32 +#define METAL_MCAUSE_INTR 0x80000000UL +#define METAL_MCAUSE_CAUSE 0x000003FFUL +#else +#define METAL_MCAUSE_INTR 0x8000000000000000UL +#define METAL_MCAUSE_CAUSE 0x00000000000003FFUL +#endif +#define METAL_MCAUSE_MINHV 0x40000000UL +#define METAL_MCAUSE_MPP 0x30000000UL +#define METAL_MCAUSE_MPIE 0x08000000UL +#define METAL_MCAUSE_MPIL 0x00FF0000UL +#define METAL_MSTATUS_MIE 0x00000008UL +#define METAL_MSTATUS_MPIE 0x00000080UL +#define METAL_MSTATUS_MPP 0x00001800UL +#define METAL_MSTATUS_FS_INIT 0x00002000UL +#define METAL_MSTATUS_FS_CLEAN 0x00004000UL +#define METAL_MSTATUS_FS_DIRTY 0x00006000UL +#define METAL_MSTATUS_MPRV 0x00020000UL +#define METAL_MSTATUS_MXR 0x00080000UL +#define METAL_MINTSTATUS_MIL 0xFF000000UL +#define METAL_MINTSTATUS_SIL 0x0000FF00UL +#define METAL_MINTSTATUS_UIL 0x000000FFUL + +#define METAL_LOCAL_INTR(X) (16 + X) +#define METAL_MCAUSE_EVAL(cause) (cause & METAL_MCAUSE_INTR) +#define METAL_INTERRUPT(cause) (METAL_MCAUSE_EVAL(cause) ? 1 : 0) +#define METAL_EXCEPTION(cause) (METAL_MCAUSE_EVAL(cause) ? 0 : 1) +#define METAL_SW_INTR_EXCEPTION (METAL_MCAUSE_INTR + 3) +#define METAL_TMR_INTR_EXCEPTION (METAL_MCAUSE_INTR + 7) +#define METAL_EXT_INTR_EXCEPTION (METAL_MCAUSE_INTR + 11) +#define METAL_LOCAL_INTR_EXCEPTION(X) (METAL_MCAUSE_INTR + METAL_LOCAL_INTR(X)) +#define METAL_LOCAL_INTR_RESERVE0 1 +#define METAL_LOCAL_INTR_RESERVE1 2 +#define METAL_LOCAL_INTR_RESERVE2 4 +#define METAL_LOCAL_INTERRUPT_SW 8 /* Bit3 0x008 */ +#define METAL_LOCAL_INTR_RESERVE4 16 +#define METAL_LOCAL_INTR_RESERVE5 32 +#define METAL_LOCAL_INTR_RESERVE6 64 +#define METAL_LOCAL_INTERRUPT_TMR 128 /* Bit7 0x080 */ +#define METAL_LOCAL_INTR_RESERVE8 256 +#define METAL_LOCAL_INTR_RESERVE9 512 +#define METAL_LOCAL_INTR_RESERVE10 1024 +#define METAL_LOCAL_INTERRUPT_EXT 2048 /* Bit11 0x800 */ +/* Bit12 to Bit15 are Reserved */ +#define METAL_LOCAL_INTERRUPT(X) (0x10000 << X) /* Bit16+ Start of Custom Local Interrupt */ +#define METAL_MIE_INTERRUPT METAL_MSTATUS_MIE + +typedef enum { + METAL_MACHINE_PRIVILEGE_MODE, + METAL_SUPERVISOR_PRIVILEGE_MODE, + METAL_USER_PRIVILEGE_MODE, +} metal_privilege_mode_e; + +typedef enum { + METAL_INTERRUPT_ID_BASE, + METAL_INTERRUPT_ID_SW = (METAL_INTERRUPT_ID_BASE + 3), + METAL_INTERRUPT_ID_TMR = (METAL_INTERRUPT_ID_BASE + 7), + METAL_INTERRUPT_ID_EXT = (METAL_INTERRUPT_ID_BASE + 11), + METAL_INTERRUPT_ID_LC0 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(0)), + METAL_INTERRUPT_ID_LC1 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(1)), + METAL_INTERRUPT_ID_LC2 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(2)), + METAL_INTERRUPT_ID_LC3 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(3)), + METAL_INTERRUPT_ID_LC4 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(4)), + METAL_INTERRUPT_ID_LC5 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(5)), + METAL_INTERRUPT_ID_LC6 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(6)), + METAL_INTERRUPT_ID_LC7 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(7)), + METAL_INTERRUPT_ID_LC8 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(8)), + METAL_INTERRUPT_ID_LC9 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(9)), + METAL_INTERRUPT_ID_LC10 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(10)), + METAL_INTERRUPT_ID_LC11 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(11)), + METAL_INTERRUPT_ID_LC12 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(12)), + METAL_INTERRUPT_ID_LC13 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(13)), + METAL_INTERRUPT_ID_LC14 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(14)), + METAL_INTERRUPT_ID_LC15 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(15)), + METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GL0 = METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GLMX = (METAL_MCAUSE_CAUSE + 1), +} metal_interrupt_id_e; + +typedef enum { + METAL_IAM_EXCEPTION_CODE, /* Instruction address misaligned */ + METAL_IAF_EXCEPTION_CODE, /* Instruction access faultd */ + METAL_II_EXCEPTION_CODE, /* Illegal instruction */ + METAL_BREAK_EXCEPTION_CODE, /* Breakpoint */ + METAL_LAM_EXCEPTION_CODE, /* Load address misaligned */ + METAL_LAF_EXCEPTION_CODE, /* Load access fault */ + METAL_SAMOAM_EXCEPTION_CODE, /* Store/AMO address misaligned */ + METAL_SAMOAF_EXCEPTION_CODE, /* Store/AMO access fault */ + METAL_ECALL_U_EXCEPTION_CODE, /* Environment call from U-mode */ + METAL_R9_EXCEPTION_CODE, /* Reserved */ + METAL_R10_EXCEPTION_CODE, /* Reserved */ + METAL_ECALL_M_EXCEPTION_CODE, /* Environment call from M-mode */ + METAL_MAX_EXCEPTION_CODE, +} metal_exception_code_e; + +typedef enum { + METAL_TIMER_MTIME_GET = 1, + METAL_SOFTWARE_IPI_CLEAR, + METAL_SOFTWARE_IPI_SET, + METAL_SOFTWARE_MSIP_GET, + METAL_MAX_INTERRUPT_GET, + METAL_INDEX_INTERRUPT_GET, +} metal_interrup_cmd_e; + +typedef struct __metal_interrupt_data { + long long pad : 64; + metal_interrupt_handler_t handler; + void *sub_int; + void *exint_data; +} __metal_interrupt_data; + +/* CPU interrupt controller */ + +uintptr_t __metal_myhart_id(void); + +struct __metal_driver_interrupt_controller_vtable { + void (*interrupt_init)(struct metal_interrupt *controller); + int (*interrupt_register)(struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, void *priv_data); + int (*interrupt_enable)(struct metal_interrupt *controller, int id); + int (*interrupt_disable)(struct metal_interrupt *controller, int id); + int (*command_request)(struct metal_interrupt *intr, int cmd, void *data); +}; + +struct __metal_driver_vtable_riscv_cpu_intc { + struct metal_interrupt_vtable controller_vtable; +}; + + +void __metal_interrupt_global_enable(void); +void __metal_interrupt_global_disable(void); +void __metal_controller_interrupt_vector(metal_vector_mode mode, void *vec_table); +inline int __metal_controller_interrupt_is_selective_vectored (void) +{ + uintptr_t val; + + asm volatile ("csrr %0, mtvec" : "=r"(val)); + return ((val & METAL_MTVEC_CLIC_VECTORED) == METAL_MTVEC_CLIC); +} + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_cpu_intc) + +struct __metal_driver_riscv_cpu_intc { + struct metal_interrupt controller; + int init_done; + uintptr_t metal_mtvec_table[METAL_MAX_MI]; + __metal_interrupt_data metal_int_table[METAL_MAX_MI]; + metal_exception_handler_t metal_exception_table[METAL_MAX_ME]; +}; + +/* CPU driver*/ +struct __metal_driver_vtable_cpu { + struct metal_cpu_vtable cpu_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_cpu) + +struct __metal_driver_cpu { + struct metal_cpu cpu; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_plic0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_plic0.h new file mode 100644 index 000000000..159ee6d69 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/riscv_plic0.h @@ -0,0 +1,31 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_PLIC0_H +#define METAL__DRIVERS__RISCV_PLIC0_H + +#include +#include + +#define METAL_PLIC_SOURCE_MASK 0x1F +#define METAL_PLIC_SOURCE_SHIFT 5 +#define METAL_PLIC_SOURCE_PRIORITY_SHIFT 2 +#define METAL_PLIC_SOURCE_PENDING_SHIFT 0 + +struct __metal_driver_vtable_riscv_plic0 { + struct metal_interrupt_vtable plic_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_plic0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_riscv_plic0 { + struct metal_interrupt controller; + int init_done; + metal_interrupt_handler_t metal_exint_table[__METAL_PLIC_SUBINTERRUPTS]; + __metal_interrupt_data metal_exdata_table[__METAL_PLIC_SUBINTERRUPTS]; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_clic0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_clic0.h new file mode 100644 index 000000000..db9674625 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_clic0.h @@ -0,0 +1,42 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_CLIC0_H +#define METAL__DRIVERS__SIFIVE_CLIC0_H + +#include +#include + +#define METAL_CLIC_MAX_NMBITS 2 +#define METAL_CLIC_MAX_NLBITS 8 +#define METAL_CLIC_MAX_NVBITS 1 + +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MMODE 0x00 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE1 0x20 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE2 0x40 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK 0x60 +#define METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK 0x1E +#define METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK 0x01 + +#define METAL_CLIC_ICTRL_SMODE1_MASK 0x7F /* b8 set imply M-mode */ +#define METAL_CLIC_ICTRL_SMODE2_MASK 0x3F /* b8 set M-mode, b7 clear U-mode */ + +#define METAL_MAX_INTERRUPT_LEVEL ((1 << METAL_CLIC_MAX_NLBITS) - 1) + +struct __metal_driver_vtable_sifive_clic0 { + struct metal_interrupt_vtable clic_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_clic0) + +#define __METAL_MACHINE_MACROS +#include +struct __metal_driver_sifive_clic0 { + struct metal_interrupt controller; + int init_done; + metal_interrupt_handler_t metal_mtvt_table[__METAL_CLIC_SUBINTERRUPTS]; + __metal_interrupt_data metal_exint_table[__METAL_CLIC_SUBINTERRUPTS]; +}; +#undef __METAL_MACHINE_MACROS + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfrosc.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfrosc.h new file mode 100644 index 000000000..d311f0cf2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfrosc.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H + +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_hfrosc { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfrosc) + +struct __metal_driver_sifive_fe310_g000_hfrosc { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfxosc.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfxosc.h new file mode 100644 index 000000000..b86926fba --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_hfxosc.h @@ -0,0 +1,20 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_HFXOSC_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_HFXOSC_H + +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_hfxosc { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfxosc) + +struct __metal_driver_sifive_fe310_g000_hfxosc { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_pll.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_pll.h new file mode 100644 index 000000000..67f818f7b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_pll.h @@ -0,0 +1,26 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_PLL_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_PLL_H + +struct __metal_driver_sifive_fe310_g000_pll; + +#include +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_pll { + void (*init)(struct __metal_driver_sifive_fe310_g000_pll *pll); + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_pll) + +struct __metal_driver_sifive_fe310_g000_pll { + struct metal_clock clock; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_prci.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_prci.h new file mode 100644 index 000000000..87c9ca985 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fe310-g000_prci.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_PRCI_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_PRCI_H + +#include +#include + +struct __metal_driver_sifive_fe310_g000_prci; + +struct __metal_driver_vtable_sifive_fe310_g000_prci { + long (*get_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset); + long (*set_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset, long value); +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_prci) + +struct __metal_driver_sifive_fe310_g000_prci { +}; + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fu540-c000_l2.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fu540-c000_l2.h new file mode 100644 index 000000000..d338c2964 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_fu540-c000_l2.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FU540_C000_L2_H +#define METAL__DRIVERS__SIFIVE_FU540_C000_L2_H + +struct __metal_driver_sifive_fu540_c000_l2; + +#include +#include + +struct __metal_driver_vtable_sifive_fu540_c000_l2 { + struct __metal_cache_vtable cache; +}; + +//_RB___METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fu540_c000_l2) + +struct __metal_driver_sifive_fu540_c000_l2 { + struct metal_cache cache; +}; + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_global-external-interrupts0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_global-external-interrupts0.h new file mode 100644 index 000000000..9e6f2faf6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_global-external-interrupts0.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0_H +#define METAL__DRIVERS__SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0_H + +#include +#include + +struct __metal_driver_vtable_sifive_global_external_interrupts0 { + struct metal_interrupt_vtable global0_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_global_external_interrupts0) + +struct __metal_driver_sifive_global_external_interrupts0 { + struct metal_interrupt irc; + int init_done; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-buttons.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-buttons.h new file mode 100644 index 000000000..a0caeaba8 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-buttons.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H +#define METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_button { + struct metal_button_vtable button_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_button) + +struct __metal_driver_sifive_gpio_button { + struct metal_button button; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-leds.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-leds.h new file mode 100644 index 000000000..a8dacf116 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-leds.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_LEDS_H +#define METAL__DRIVERS__SIFIVE_GPIO_LEDS_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_led { + struct metal_led_vtable led_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_led) + +struct __metal_driver_sifive_gpio_led { + struct metal_led led; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-switches.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-switches.h new file mode 100644 index 000000000..c9c7839e9 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio-switches.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H +#define METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_switch { + struct metal_switch_vtable switch_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_switch) + +struct __metal_driver_sifive_gpio_switch { + struct metal_switch flip; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio0.h new file mode 100644 index 000000000..cc56dc722 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_gpio0.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_GPIO0_H +#define METAL__DRIVERS__SIFIVE_GPIO0_H + +#include +#include + +struct __metal_driver_vtable_sifive_gpio0 { + const struct __metal_gpio_vtable gpio; +}; + +//struct __metal_driver_sifive_gpio0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_gpio0) + +struct __metal_driver_sifive_gpio0 { + struct metal_gpio gpio; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_local-external-interrupts0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_local-external-interrupts0.h new file mode 100644 index 000000000..aa8d63078 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_local-external-interrupts0.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_EXTERNAL_INTERRUPTS0_H +#define METAL__DRIVERS__SIFIVE_EXTERNAL_INTERRUPTS0_H + +#include +#include + +struct __metal_driver_vtable_sifive_local_external_interrupts0 { + struct metal_interrupt_vtable local0_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_local_external_interrupts0) + +struct __metal_driver_sifive_local_external_interrupts0 { + struct metal_interrupt irc; + int init_done; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_spi0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_spi0.h new file mode 100644 index 000000000..90d4c831e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_spi0.h @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_SPI0_H +#define METAL__DRIVERS__SIFIVE_SPI0_H + +#include +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_spi0 { + const struct metal_spi_vtable spi; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_spi0) + +struct __metal_driver_sifive_spi0 { + struct metal_spi spi; + unsigned long baud_rate; +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_test0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_test0.h new file mode 100644 index 000000000..e87db2c83 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_test0.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_TEST0_H +#define METAL__DRIVERS__SIFIVE_TEST0_H + +#include +#include + +struct __metal_driver_vtable_sifive_test0 { + const struct __metal_shutdown_vtable shutdown; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_test0) + +struct __metal_driver_sifive_test0 { + struct __metal_shutdown shutdown; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_uart0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_uart0.h new file mode 100644 index 000000000..11d954002 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/drivers/sifive_uart0.h @@ -0,0 +1,28 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_UART0_H +#define METAL__DRIVERS__SIFIVE_UART0_H + +#include +#include +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_uart0 { + const struct metal_uart_vtable uart; +}; + +struct __metal_driver_sifive_uart0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_uart0) + +struct __metal_driver_sifive_uart0 { + struct metal_uart uart; + unsigned long baud_rate; +}; + + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/gpio.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/gpio.h new file mode 100644 index 000000000..513687dd7 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/gpio.h @@ -0,0 +1,151 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__GPIO_H +#define METAL__GPIO_H + +#include + +/*! + * @file gpio.h + * @brief API for manipulating general-purpose input/output + */ + +struct metal_gpio; + +struct __metal_gpio_vtable { + int (*disable_input)(struct metal_gpio *, long pins); + long (*output)(struct metal_gpio *); + int (*enable_output)(struct metal_gpio *, long pins); + int (*output_set)(struct metal_gpio *, long value); + int (*output_clear)(struct metal_gpio *, long value); + int (*output_toggle)(struct metal_gpio *, long value); + int (*enable_io)(struct metal_gpio *, long pins, long dest); +}; + +/*! + * @struct metal_gpio + * @brief The handle for a GPIO interface + */ +struct metal_gpio { + const struct __metal_gpio_vtable *vtable; +}; + +/*! + * @brief Get a GPIO device handle + * @param device_num The GPIO device index + * @return The GPIO device handle, or NULL if there is no device at that index + */ +struct metal_gpio *metal_gpio_get_device(int device_num); + +/*! + * @brief Disable input on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the input is successfully disabled + */ +inline int metal_gpio_disable_input(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->disable_input(gpio, (1 << pin)); +} + +/*! + * @brief Enable output on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the output is successfully enabled + */ +inline int metal_gpio_enable_output(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->enable_output(gpio, (1 << pin)); +} + +/*! + * @brief Set the output value of a GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @param value The value to set the pin to + * @return 0 if the output is successfully set + */ +inline int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value) { + if(!gpio) { + return 1; + } + + if(value == 0) { + return gpio->vtable->output_clear(gpio, (1 << pin)); + } else { + return gpio->vtable->output_set(gpio, (1 << pin)); + } +} + +/*! + * @brief Get the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return The value of the GPIO pin + */ +inline int metal_gpio_get_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 0; + } + + long value = gpio->vtable->output(gpio); + + if(value & (1 << pin)) { + return 1; + } else { + return 0; + } +} + +/*! + * @brief Clears the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the pin is successfully cleared + */ +inline int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->output_clear(gpio, (1 << pin)); +} + +/*! + * @brief Toggles the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the pin is successfully toggled + */ +inline int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin) { + if(!gpio) { + return 1; + } + + return gpio->vtable->output_toggle(gpio, (1 << pin)); +} + +/*! + * @brief Enables and sets the pinmux for a GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The bitmask for the pin to enable pinmux on + * @param io_function The IO function to set + * @return 0 if the pinmux is successfully set + */ +inline int metal_gpio_enable_pinmux(struct metal_gpio *gpio, int pin, int io_function) { + if(!gpio) { + return 1; + } + + return gpio->vtable->enable_io(gpio, (1 << pin), (io_function << pin)); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/interrupt.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/interrupt.h new file mode 100644 index 000000000..43f587aca --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/interrupt.h @@ -0,0 +1,134 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__INTERRUPT_H +#define METAL__INTERRUPT_H + +/*! @file interrupt.h + * @brief API for registering and manipulating interrupts + */ + +#include + +/*! + * @brief Possible mode of interrupts to operate + */ +typedef enum metal_vector_mode_ { + METAL_DIRECT_MODE = 0, + METAL_VECTOR_MODE = 1, + METAL_SELECTIVE_VECTOR_MODE = 2, + METAL_HARDWARE_VECTOR_MODE = 3 +} metal_vector_mode; + +/*! + * @brief Function signature for interrupt callback handlers + */ +typedef void (*metal_interrupt_handler_t) (int, void *); + +struct metal_interrupt; + +struct metal_interrupt_vtable { + void (*interrupt_init)(struct metal_interrupt *controller); + int (*interrupt_register)(struct metal_interrupt *controller, int id, + metal_interrupt_handler_t isr, void *priv_data); + int (*interrupt_enable)(struct metal_interrupt *controller, int id); + int (*interrupt_disable)(struct metal_interrupt *controller, int id); + int (*interrupt_vector_enable)(struct metal_interrupt *controller, + int id, metal_vector_mode mode); + int (*interrupt_vector_disable)(struct metal_interrupt *controller, int id); + int (*command_request)(struct metal_interrupt *controller, int cmd, void *data); + int (*mtimecmp_set)(struct metal_interrupt *controller, int hartid, unsigned long long time); +}; + +/*! + * @brief A handle for an interrupt + */ +struct metal_interrupt { + const struct metal_interrupt_vtable *vtable; +}; + +/*! + * @brief Initialize a given interrupt controller + * + * Initialize a given interrupt controller. This function must be called + * before any interrupts are registered or enabled with the handler. It + * is invalid to initialize an interrupt controller more than once. + * + * @param controller The handle for the interrupt controller + */ +inline void metal_interrupt_init(struct metal_interrupt *controller) +{ + return controller->vtable->interrupt_init(controller); +} + + +/*! + * @brief Register an interrupt handler + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to register + * @param handler The interrupt handler callback + * @param priv_data Private data for the interrupt handler + * @return 0 upon success + */ +inline int metal_interrupt_register_handler(struct metal_interrupt *controller, + int id, + metal_interrupt_handler_t handler, + void *priv_data) +{ + return controller->vtable->interrupt_register(controller, id, handler, priv_data); +} + +/*! + * @brief Enable an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @return 0 upon success + */ +inline int metal_interrupt_enable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_enable(controller, id); +} + +/*! + * @brief Disable an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to disable + * @return 0 upon success + */ +inline int metal_interrupt_disable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_disable(controller, id); +} + +/*! + * @brief Enable an interrupt vector + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @param mode The interrupt mode type to enable + * @return 0 upon success + */ +inline int metal_interrupt_vector_enable(struct metal_interrupt *controller, + int id, metal_vector_mode mode) +{ + return controller->vtable->interrupt_vector_enable(controller, id, mode); +} + +/*! + * @brief Disable an interrupt vector + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to disable + * @return 0 upon success + */ +inline int metal_interrupt_vector_disable(struct metal_interrupt *controller, int id) +{ + return controller->vtable->interrupt_vector_disable(controller, id); +} + +/* Utilities function to controll, manages devices via a given interrupt controller */ +inline int _metal_interrupt_command_request(struct metal_interrupt *controller, + int cmd, void *data) +{ + return controller->vtable->command_request(controller, cmd, data); +} + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/io.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/io.h new file mode 100644 index 000000000..450054142 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/io.h @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__IO_H +#define METAL__IO_H + +/* This macro enforces that the compiler will not elide the given access. */ +#define __METAL_ACCESS_ONCE(x) (*(typeof(*x) volatile *)(x)) + +/* Allows users to specify arbitrary fences. */ +#define __METAL_IO_FENCE(pred, succ) __asm__ volatile ("fence " #pred "," #succ ::: "memory"); + +/* Types that explicitly describe an address as being used for memory-mapped + * IO. These should only be accessed via __METAL_ACCESS_ONCE. */ +typedef unsigned char __metal_io_u8; +typedef unsigned short __metal_io_u16; +typedef unsigned int __metal_io_u32; +#if __riscv_xlen >= 64 +typedef unsigned long __metal_io_u64; +#endif + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/itim.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/itim.h new file mode 100644 index 000000000..1a2a05b8b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/itim.h @@ -0,0 +1,21 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__ITIM_H +#define METAL__ITIM_H + +/*! @file itim.h + * + * API for manipulating ITIM allocation + */ + + +/*! @def METAL_PLACE_IN_ITIM + * @brief Link a function into the ITIM + * + * Link a function into the ITIM (Instruction Tightly Integrated + * Memory) if the ITIM is present on the target device. + */ +#define METAL_PLACE_IN_ITIM __attribute__((section(".itim"))) + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/led.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/led.h new file mode 100644 index 000000000..a430b84c2 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/led.h @@ -0,0 +1,68 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__LED_H +#define METAL__LED_H + +/*! + * @file led.h + * @brief API for manipulating LEDs + */ + +struct metal_led; + +struct metal_led_vtable { + int (*led_exist)(struct metal_led *led, char *label); + void (*led_enable)(struct metal_led *led); + void (*led_on)(struct metal_led *led); + void (*led_off)(struct metal_led *led); + void (*led_toggle)(struct metal_led *led); +}; + +/*! + * @brief A handle for an LED + */ +struct metal_led { + const struct metal_led_vtable *vtable; +}; + +/*! + * @brief Get a handle for an LED + * @param label The DeviceTree label for the desired LED + * @return A handle to the LED, or NULL if none is found for the requested label + */ +struct metal_led* metal_led_get(char *label); + +/*! + * @brief Get a handle for a channel of an RGB LED + * @param label The DeviceTree label for the desired LED + * @param color The color for the LED in the DeviceTree + * @return A handle to the LED, or NULL if none is found for the requested label and color + */ +struct metal_led* metal_led_get_rgb(char *label, char *color); + +/*! + * @brief Enable an LED + * @param led The handle for the LED + */ +inline void metal_led_enable(struct metal_led *led) { led->vtable->led_enable(led); } + +/*! + * @brief Turn an LED on + * @param led The handle for the LED + */ +inline void metal_led_on(struct metal_led *led) { led->vtable->led_on(led); } + +/*! + * @brief Turn an LED off + * @param led The handle for the LED + */ +inline void metal_led_off(struct metal_led *led) { led->vtable->led_off(led); } + +/*! + * @brief Toggle the on/off state of an LED + * @param led The handle for the LED + */ +inline void metal_led_toggle(struct metal_led *led) { led->vtable->led_toggle(led); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/lock.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/lock.h new file mode 100644 index 000000000..d863aa96e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/lock.h @@ -0,0 +1,127 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__LOCK_H +#define METAL__LOCK_H + +#include +#include + +/*! + * @file lock.h + * @brief An API for creating and using a software lock/mutex + */ + +/* TODO: How can we make the exception code platform-independant? */ +#define _METAL_STORE_AMO_ACCESS_FAULT 7 + +/*! + * @def METAL_LOCK_DECLARE + * @brief Declare a lock + * + * Locks must be declared with METAL_LOCK_DECLARE to ensure that the lock + * is linked into a memory region which supports atomic memory operations. + */ +#define METAL_LOCK_DECLARE(name) \ + __attribute__((section(".data.locks"))) \ + struct metal_lock name + +/*! + * @brief A handle for a lock + */ +struct metal_lock { + int _state; +}; + +/*! + * @brief Initialize a lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully initialized. A non-zero code indicates failure. + * + * If the lock cannot be initialized, attempts to take or give the lock + * will result in a Store/AMO access fault. + */ +inline int metal_lock_init(struct metal_lock *lock) { +#ifdef __riscv_atomic + /* Get a handle for the memory which holds the lock state */ + struct metal_memory *lock_mem = metal_get_memory_from_address((uintptr_t) &(lock->_state)); + if(!lock_mem) { + return 1; + } + + /* If the memory doesn't support atomics, report an error */ + if(!metal_memory_supports_atomics(lock_mem)) { + return 2; + } + + lock->_state = 0; + + return 0; +#else + return 3; +#endif +} + +/*! + * @brief Take a lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully taken + * + * If the lock initialization failed, attempts to take a lock will result in + * a Store/AMO access fault. + */ +inline int metal_lock_take(struct metal_lock *lock) { +#ifdef __riscv_atomic + int old = 1; + int new = 1; + + while(old != 0) { + __asm__ volatile("amoswap.w.aq %[old], %[new], (%[state])" + : [old] "=r" (old) + : [new] "r" (new), [state] "r" (&(lock->_state)) + : "memory"); + } + + return 0; +#else + /* Store the memory address in mtval like a normal store/amo access fault */ + __asm__ ("csrw mtval, %[state]" + :: [state] "r" (&(lock->_state))); + + /* Trigger a Store/AMO access fault */ + _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); + + /* If execution returns, indicate failure */ + return 1; +#endif +} + +/*! + * @brief Give back a held lock + * @param lock The handle for a lock + * @return 0 if the lock is successfully given + * + * If the lock initialization failed, attempts to give a lock will result in + * a Store/AMO access fault. + */ +inline int metal_lock_give(struct metal_lock *lock) { +#ifdef __riscv_atomic + __asm__ volatile("amoswap.w.rl x0, x0, (%[state])" + :: [state] "r" (&(lock->_state)) + : "memory"); + + return 0; +#else + /* Store the memory address in mtval like a normal store/amo access fault */ + __asm__ ("csrw mtval, %[state]" + :: [state] "r" (&(lock->_state))); + + /* Trigger a Store/AMO access fault */ + _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); + + /* If execution returns, indicate failure */ + return 1; +#endif +} + +#endif /* METAL__LOCK_H */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/memory.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/memory.h new file mode 100644 index 000000000..b62d8b25a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/memory.h @@ -0,0 +1,81 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__MEMORY_H +#define METAL__MEMORY_H + +#include +#include + +/*! + * @file memory.h + * + * @brief API for enumerating memory blocks + */ + +struct _metal_memory_attributes { + int R : 1; + int W : 1; + int X : 1; + int C : 1; + int A : 1; +}; + +/*! + * @brief A handle for a memory block + */ +struct metal_memory { + const uintptr_t _base_address; + const size_t _size; + const struct _metal_memory_attributes _attrs; +}; + +/*! + * @brief Get the memory block which services the given address + * + * Given a physical memory address, get a handle for the memory block to which + * that address is mapped. + * + * @param address The address to query + * @return The memory block handle, or NULL if the address is not mapped to a memory block + */ +struct metal_memory *metal_get_memory_from_address(const uintptr_t address); + +/*! + * @brief Get the base address for a memory block + * @param memory The handle for the memory block + * @return The base address of the memory block + */ +inline uintptr_t metal_memory_get_base_address(const struct metal_memory *memory) { + return memory->_base_address; +} + +/*! + * @brief Get the size of a memory block + * @param memory The handle for the memory block + * @return The size of the memory block + */ +inline size_t metal_memory_get_size(const struct metal_memory *memory) { + return memory->_size; +} + +/*! + * @brief Query if a memory block supports atomic operations + * @param memory The handle for the memory block + * @return nonzero if the memory block supports atomic operations + */ +inline int metal_memory_supports_atomics(const struct metal_memory *memory) { + return memory->_attrs.A; +} + +/*! + * @brief Query if a memory block is cacheable + * @param memory The handle for the memory block + * @return nonzero if the memory block is cachable + */ +inline int metal_memory_is_cachable(const struct metal_memory *memory) { + return memory->_attrs.C; +} + +#endif /* METAL__MEMORY_H */ + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/pmp.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/pmp.h new file mode 100644 index 000000000..9121b10a1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/pmp.h @@ -0,0 +1,204 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__PMP_H +#define METAL__PMP_H + +/*! + * @file metal/pmp.h + * + * @brief API for Configuring Physical Memory Protection on RISC-V Cores + * + * The Physical Memory Protection (PMP) interface on RISC-V cores + * is a form of memory protection unit which allows for a finite number + * of physical memory regions to be configured with certain access + * permissions. + * + * Additional information about the use and configuration rules for PMPs + * can be found by reading the RISC-V Privileged Architecture Specification. + */ + +#include +#include + +struct metal_pmp; + +/*! + * @brief Set of available PMP addressing modes + */ +enum metal_pmp_address_mode { + /*! @brief Disable the PMP region */ + METAL_PMP_OFF = 0, + /*! @brief Use Top-of-Range mode */ + METAL_PMP_TOR = 1, + /*! @brief Use naturally-aligned 4-byte region mode */ + METAL_PMP_NA4 = 2, + /*! @brief Use naturally-aligned power-of-two mode */ + METAL_PMP_NAPOT = 3 +}; + +/*! + * @brief Configuration for a PMP region + */ +struct metal_pmp_config { + /*! @brief Sets whether reads to the PMP region succeed */ + int R : 1; + /*! @brief Sets whether writes to the PMP region succeed */ + int W : 1; + /*! @brief Sets whether the PMP region is executable */ + int X : 1; + + /*! @brief Sets the addressing mode of the PMP region */ + enum metal_pmp_address_mode A : 2; + + int _pad : 2; + + /*! @brief Sets whether the PMP region is locked */ + enum metal_pmp_locked { + METAL_PMP_UNLOCKED = 0, + METAL_PMP_LOCKED = 1 + } L : 1; +}; + +/*! + * @brief A handle for the PMP device + */ +struct metal_pmp { + /* The minimum granularity of the PMP region. Set by metal_pmp_init */ + uintptr_t _granularity[METAL_MAX_CORES]; +}; + +/*! + * @brief Get the PMP device handle + */ +struct metal_pmp *metal_pmp_get_device(void); + +/*! + * @brief Initialize the PMP + * @param pmp The PMP device handle to be initialized + * + * The PMP initialization routine is optional and may be called as many times + * as is desired. The effect of the initialization routine is to attempt to set + * all regions to unlocked and disabled, as well as to clear the X, W, and R + * bits. Only the pmp configuration of the hart which executes the routine will + * be affected. + * + * If any regions are fused to preset values by the implementation or locked, + * those PMP regions will silently remain uninitialized. + */ +void metal_pmp_init(struct metal_pmp *pmp); + +/*! + * @brief Configure a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to configure + * @param config The desired configuration of the PMP region + * @param address The desired address of the PMP region + * @return 0 upon success + */ +int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config config, size_t address); + +/*! + * @brief Get the configuration for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @param config Variable to store the PMP region configuration + * @param address Variable to store the PMP region address + * @return 0 if the region is read successfully + */ +int metal_pmp_get_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config *config, size_t *address); + +/*! + * @brief Lock a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to lock + * @return 0 if the region is successfully locked + */ +int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the address for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param address The desired address of the PMP region + * @return 0 if the address is successfully set + */ +int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address); + +/*! + * @brief Get the address of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return The address of the PMP region, or 0 if the region could not be read + */ +size_t metal_pmp_get_address(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the addressing mode of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param mode The PMP addressing mode to set + * @return 0 if the addressing mode is successfully set + */ +int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum metal_pmp_address_mode mode); + +/*! + * @brief Get the addressing mode of a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return The address mode of the PMP region + */ +enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the executable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param X The desired value of the executable bit + * @return 0 if the executable bit is successfully set + */ +int metal_pmp_set_executable(struct metal_pmp *pmp, unsigned int region, int X); + +/*! + * @brief Get the executable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the executable bit + */ +int metal_pmp_get_executable(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the writable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param W The desired value of the writable bit + * @return 0 if the writable bit is successfully set + */ +int metal_pmp_set_writeable(struct metal_pmp *pmp, unsigned int region, int W); + +/*! + * @brief Get the writable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the writable bit + */ +int metal_pmp_get_writeable(struct metal_pmp *pmp, unsigned int region); + +/*! + * @brief Set the readable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to set + * @param R The desired value of the readable bit + * @return 0 if the readable bit is successfully set + */ +int metal_pmp_set_readable(struct metal_pmp *pmp, unsigned int region, int R); + +/*! + * @brief Set the readable bit for a PMP region + * @param pmp The PMP device handle + * @param region The PMP region to read + * @return the value of the readable bit + */ +int metal_pmp_get_readable(struct metal_pmp *pmp, unsigned int region); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/privilege.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/privilege.h new file mode 100644 index 000000000..c5212e5d1 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/privilege.h @@ -0,0 +1,122 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__PRIVILEGE_H +#define METAL__PRIVILEGE_H + +/*! + * @file metal/privilege.h + * + * @brief API for manipulating the privilege mode of a RISC-V system + * + * Additional information about privilege modes on RISC-V systems can be found + * by reading the RISC-V Privileged Architecture Specification v1.10. + */ + +#include + +enum metal_privilege_mode { + METAL_PRIVILEGE_USER = 0, + METAL_PRIVILEGE_SUPERVISOR = 1, + METAL_PRIVELEGE_MACHINE = 3, +}; + +#if __riscv_xlen == 32 +typedef uint32_t metal_xreg_t; +#elif __riscv_xlen == 64 +typedef uint64_t metal_xreg_t; +#endif + +#if __riscv_flen == 32 +typedef uint32_t metal_freg_t; +#elif __riscv_flen == 64 +typedef uint64_t metal_freg_t; +#endif + +struct metal_register_file { + metal_xreg_t ra; + metal_xreg_t sp; + metal_xreg_t gp; + metal_xreg_t tp; + + metal_xreg_t t0; + metal_xreg_t t1; + metal_xreg_t t2; + + metal_xreg_t s0; + metal_xreg_t s1; + + metal_xreg_t a0; + metal_xreg_t a1; + metal_xreg_t a2; + metal_xreg_t a3; + metal_xreg_t a4; + metal_xreg_t a5; +#ifndef __riscv_32e + metal_xreg_t a6; + metal_xreg_t a7; + + metal_xreg_t s2; + metal_xreg_t s3; + metal_xreg_t s4; + metal_xreg_t s5; + metal_xreg_t s6; + metal_xreg_t s7; + metal_xreg_t s8; + metal_xreg_t s9; + metal_xreg_t s10; + metal_xreg_t s11; + + metal_xreg_t t3; + metal_xreg_t t4; + metal_xreg_t t5; + metal_xreg_t t6; +#endif /* __riscv_32e */ + +#ifdef __riscv_flen + metal_freg_t ft0; + metal_freg_t ft1; + metal_freg_t ft2; + metal_freg_t ft3; + metal_freg_t ft4; + metal_freg_t ft5; + metal_freg_t ft6; + metal_freg_t ft7; + + metal_freg_t fs0; + metal_freg_t fs1; + + metal_freg_t fa0; + metal_freg_t fa1; + metal_freg_t fa2; + metal_freg_t fa3; + metal_freg_t fa4; + metal_freg_t fa5; + metal_freg_t fa6; + metal_freg_t fa7; + + metal_freg_t fs2; + metal_freg_t fs3; + metal_freg_t fs4; + metal_freg_t fs5; + metal_freg_t fs6; + metal_freg_t fs7; + metal_freg_t fs8; + metal_freg_t fs9; + metal_freg_t fs10; + metal_freg_t fs11; + + metal_freg_t ft8; + metal_freg_t ft9; + metal_freg_t ft10; + metal_freg_t ft11; +#endif /* __riscv_flen */ +}; + +typedef void (*metal_privilege_entry_point_t)(); + +void metal_privilege_drop_to_mode(enum metal_privilege_mode mode, + struct metal_register_file regfile, + metal_privilege_entry_point_t entry_point); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/shutdown.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/shutdown.h new file mode 100644 index 000000000..3bebfa742 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/shutdown.h @@ -0,0 +1,36 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SHUTDOWN_H +#define METAL__SHUTDOWN_H + +/*! + * @file shutdown.h + * @brief API for shutting down a machine + */ + +struct __metal_shutdown; + +struct __metal_shutdown_vtable { + void (*exit)(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); +}; + +struct __metal_shutdown { + const struct __metal_shutdown_vtable *vtable; +}; + +inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); +inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) { sd->vtable->exit(sd, code); } + +/*! + * @brief The public METAL shutdown interface + * + * Shuts down the machine, if the machine enables an interface for + * shutting down. When no interface is provided, will cause the machine + * to spin indefinitely. + * + * @param code The return code to set. 0 indicates program success. + */ +void metal_shutdown(int code) __attribute__((noreturn)); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/spi.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/spi.h new file mode 100644 index 000000000..b011fe3ce --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/spi.h @@ -0,0 +1,78 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SPI_H +#define METAL__SPI_H + +struct metal_spi; + +/*! @brief The configuration for a SPI transfer */ +struct metal_spi_config { + /*! @brief The protocol for the SPI transfer */ + enum { + METAL_SPI_SINGLE, + METAL_SPI_DUAL, + METAL_SPI_QUAD + } protocol; + + /*! @brief The polarity of the SPI transfer, equivalent to CPOL */ + unsigned int polarity : 1; + /*! @brief The phase of the SPI transfer, equivalent to CPHA */ + unsigned int phase : 1; + /*! @brief The endianness of the SPI transfer */ + unsigned int little_endian : 1; + /*! @brief The active state of the chip select line */ + unsigned int cs_active_high : 1; + /*! @brief The chip select ID to activate for the SPI transfer */ + unsigned int csid; +}; + +struct metal_spi_vtable { + void (*init)(struct metal_spi *spi, int baud_rate); + int (*transfer)(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf); + int (*get_baud_rate)(struct metal_spi *spi); + int (*set_baud_rate)(struct metal_spi *spi, int baud_rate); +}; + +/*! @brief A handle for a SPI device */ +struct metal_spi { + const struct metal_spi_vtable *vtable; +}; + +/*! @brief Get a handle for a SPI device + * @param device_num The index of the desired SPI device + * @return A handle to the SPI device, or NULL if the device does not exist*/ +struct metal_spi *metal_spi_get_device(int device_num); + +/*! @brief Initialize a SPI device with a certain baud rate + * @param spi The handle for the SPI device to initialize + * @param baud_rate The baud rate to set the SPI device to + */ +inline void metal_spi_init(struct metal_spi *spi, int baud_rate) { spi->vtable->init(spi, baud_rate); } + +/*! @brief Perform a SPI transfer + * @param spi The handle for the SPI device to perform the transfer + * @param config The configuration for the SPI transfer. + * @param len The number of bytes to transfer + * @param tx_buf The buffer to send over the SPI bus. Must be len bytes long. If NULL, the SPI will transfer the value 0. + * @param rx_buf The buffer to receive data into. Must be len bytes long. If NULL, the SPI will ignore received bytes. + * @return 0 if the transfer succeeds + */ +inline int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf) { + return spi->vtable->transfer(spi, config, len, tx_buf, rx_buf); +} + +/*! @brief Get the current baud rate of the SPI device + * @param spi The handle for the SPI device + * @return The baud rate in Hz + */ +inline int metal_spi_get_baud_rate(struct metal_spi *spi) { return spi->vtable->get_baud_rate(spi); } + +/*! @brief Set the current baud rate of the SPI device + * @param spi The handle for the SPI device + * @param baud_rate The desired baud rate of the SPI device + * @return 0 if the baud rate is successfully changed + */ +inline int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate) { return spi->vtable->set_baud_rate(spi, baud_rate); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/switch.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/switch.h new file mode 100644 index 000000000..d1c35bc93 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/switch.h @@ -0,0 +1,51 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SWITCH_H +#define METAL__SWITCH_H + +/*! + * @file switch.h + * @brief API for reading toggle switches + */ + +#include + +struct metal_switch; + +struct metal_switch_vtable { + int (*switch_exist)(struct metal_switch *sw, char *label); + struct metal_interrupt* (*interrupt_controller)(struct metal_switch *sw); + int (*get_interrupt_id)(struct metal_switch *sw); +}; + +/*! + * @brief A handle for a switch + */ +struct metal_switch { + const struct metal_switch_vtable *vtable; +}; + +/*! + * @brief Get a handle for a switch + * @param label The DeviceTree label for the desired switch + * @return A handle to the switch, or NULL if none is found for the requested label + */ +struct metal_switch* metal_switch_get(char *label); + +/*! + * @brief Get the interrupt controller for a switch + * @param sw The handle for the switch + * @return The interrupt controller handle + */ +inline struct metal_interrupt* + metal_switch_interrupt_controller(struct metal_switch *sw) { return sw->vtable->interrupt_controller(sw); } + +/*! + * @brief Get the interrupt id for a switch + * @param sw The handle for the switch + * @return The interrupt ID for the switch + */ +inline int metal_switch_get_interrupt_id(struct metal_switch *sw) { return sw->vtable->get_interrupt_id(sw); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/timer.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/timer.h new file mode 100644 index 000000000..eeae1f60b --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/timer.h @@ -0,0 +1,36 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__TIMER_H +#define METAL__TIMER_H + +/*! + * @file timer.h + * @brief API for reading and manipulating the machine timer + */ + +/*! + * @brief Read the machine cycle count + * @param hartid The hart ID to read the cycle count of + * @param cyclecount The variable to hold the value + * @return 0 upon success + */ +int metal_timer_get_cyclecount(int hartid, unsigned long long *cyclecount); + +/*! + * @brief Get the machine timebase frequency + * @param hartid The hart ID to read the timebase of + * @param timebase The variable to hold the value + * @return 0 upon success + */ +int metal_timer_get_timebase_frequency(int hartid, unsigned long long *timebase); + +/*! + * @brief Set the machine timer tick interval in seconds + * @param hartid The hart ID to read the timebase of + * @param second The number of seconds to set the tick interval to + * @return 0 upon success + */ +int metal_timer_set_tick(int hartid, int second); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/tty.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/tty.h new file mode 100644 index 000000000..d2583e3be --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/tty.h @@ -0,0 +1,23 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__TTY_H +#define METAL__TTY_H + +/*! + * @file tty.h + * @brief API for emulated serial teriminals + */ + +/*! + * @brief Write a character to the default output device + * + * Write a character to the default output device, which for most + * targets is the UART serial port. + * + * @param c The character to write to the terminal + * @return 0 on success, or -1 on failure. + */ +int metal_tty_putc(unsigned char c); + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/uart.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/uart.h new file mode 100644 index 000000000..611792a6c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/metal/uart.h @@ -0,0 +1,94 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__UART_H +#define METAL__UART_H + +/*! + * @file uart.h + * @brief API for UART serial ports + */ + +#include + +struct metal_uart; + +struct metal_uart_vtable { + void (*init)(struct metal_uart *uart, int baud_rate); + int (*putc)(struct metal_uart *uart, unsigned char c); + int (*getc)(struct metal_uart *uart, unsigned char *c); + int (*get_baud_rate)(struct metal_uart *uart); + int (*set_baud_rate)(struct metal_uart *uart, int baud_rate); + struct metal_interrupt* (*controller_interrupt)(struct metal_uart *uart); + int (*get_interrupt_id)(struct metal_uart *uart); +}; + +/*! + * @brief Handle for a UART serial device + */ +struct metal_uart { + const struct metal_uart_vtable *vtable; +}; + +/*! + * @brief Initialize UART device + + * Initialize the UART device described by the UART handle. This function must be called before any + * other method on the UART can be invoked. It is invalid to initialize a UART more than once. + * + * @param uart The UART device handle + * @param baud_rate the baud rate to set the UART to + */ +inline void metal_uart_init(struct metal_uart *uart, int baud_rate) { return uart->vtable->init(uart, baud_rate); } + +/*! + * @brief Output a character over the UART + * @param uart The UART device handle + * @param c The character to send over the UART + * @return 0 upon success + */ +inline int metal_uart_putc(struct metal_uart *uart, unsigned char c) { return uart->vtable->putc(uart, c); } + +/*! + * @brief Read a character sent over the UART + * @param uart The UART device handle + * @param c The varible to hold the read character + * @return 0 upon success + */ +inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c) { return uart->vtable->getc(uart, c); } + +/*! + * @brief Get the baud rate of the UART peripheral + * @param uart The UART device handle + * @return The current baud rate of the UART + */ +inline int metal_uart_get_baud_rate(struct metal_uart *uart) { return uart->vtable->get_baud_rate(uart); } + +/*! + * @brief Set the baud rate of the UART peripheral + * @param uart The UART device handle + * @param baud_rate The baud rate to configure + * @return the new baud rate of the UART + */ +inline int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate) { return uart->vtable->set_baud_rate(uart, baud_rate); } + +/*! + * @brief Get the interrupt controller of the UART peripheral + * + * Get the interrupt controller for the UART peripheral. The interrupt + * controller must be initialized before any interrupts can be registered + * or enabled with it. + * + * @param uart The UART device handle + * @return The handle for the UART interrupt controller + */ +inline struct metal_interrupt* metal_uart_interrupt_controller(struct metal_uart *uart) { return uart->vtable->controller_interrupt(uart); } + +/*! + * @brief Get the interrupt ID of the UART controller + * @param uart The UART device handle + * @return The UART interrupt id + */ +inline int metal_uart_get_interrupt_id(struct metal_uart *uart) { return uart->vtable->get_interrupt_id(uart); } + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/button.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/button.c new file mode 100644 index 000000000..649388b3c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/button.c @@ -0,0 +1,27 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +struct metal_button* metal_button_get (char *label) +{ + int i; + struct metal_button *button; + + if ((__METAL_DT_MAX_BUTTONS == 0) || (label == NULL)) { + return NULL; + } + + for (i = 0; i < __METAL_DT_MAX_BUTTONS; i++) { + button = (struct metal_button*)__metal_button_table[i]; + if (button->vtable->button_exist(button, label)) { + return button; + } + } + return NULL; +} + +extern inline struct metal_interrupt* + metal_button_interrupt_controller(struct metal_button *button); +extern inline int metal_button_get_interrupt_id(struct metal_button *button); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cache.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cache.c new file mode 100644 index 000000000..2f0c9fa69 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cache.c @@ -0,0 +1,8 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +extern inline void metal_cache_init(struct metal_cache *cache, int ways); +extern inline int metal_cache_get_enabled_ways(struct metal_cache *cache); +extern inline int metal_cache_set_enabled_ways(struct metal_cache *cache, int ways); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/clock.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/clock.c new file mode 100644 index 000000000..3b6b8a751 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/clock.c @@ -0,0 +1,9 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +extern inline long metal_clock_get_rate_hz(const struct metal_clock *clk); +extern inline long metal_clock_set_rate_hz(struct metal_clock *clk, long hz); +extern inline void metal_clock_register_post_rate_change_callback(struct metal_clock *clk, metal_clock_post_rate_change_callback cb, void *priv); +extern inline void metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, metal_clock_pre_rate_change_callback cb, void *priv); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cpu.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cpu.c new file mode 100644 index 000000000..2c415a846 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/cpu.c @@ -0,0 +1,59 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +struct metal_cpu* metal_cpu_get(int hartid) +{ + if (hartid < __METAL_DT_MAX_HARTS) { + return (struct metal_cpu *)__metal_cpu_table[hartid]; + } + return NULL; +} + +int metal_cpu_get_current_hartid() +{ +#ifdef __riscv + int mhartid; + asm volatile("csrr %0, mhartid" : "=r" (mhartid)); + return mhartid; +#endif +} + +int metal_cpu_get_num_harts() +{ + return __METAL_DT_MAX_HARTS; +} + +extern inline unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu); + +extern inline unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu); + +extern inline unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu); + +extern inline int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, unsigned long long time); + +extern inline struct metal_interrupt* metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu); + +extern inline int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu); + +extern inline struct metal_interrupt* metal_cpu_software_interrupt_controller(struct metal_cpu *cpu); + +extern inline int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu); + +extern inline int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid); + +extern inline int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid); + +extern inline int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid); + +extern inline struct metal_interrupt* metal_cpu_interrupt_controller(struct metal_cpu *cpu); + +extern inline int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler); + +extern inline int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc); + +extern inline uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu); + +extern inline int metal_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t epc); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-clock.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-clock.c new file mode 100644 index 000000000..a1219e01e --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-clock.c @@ -0,0 +1,27 @@ +/* Copyright 2018 SiFive, Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_FIXED_CLOCK + +#include +#include +#include + +long __metal_driver_fixed_clock_get_rate_hz(const struct metal_clock *gclk) +{ + return __metal_driver_fixed_clock_rate(gclk); +} + +long __metal_driver_fixed_clock_set_rate_hz(struct metal_clock *gclk, long target_hz) +{ + return __metal_driver_fixed_clock_get_rate_hz(gclk); +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_fixed_clock) = { + .clock.get_rate_hz = __metal_driver_fixed_clock_get_rate_hz, + .clock.set_rate_hz = __metal_driver_fixed_clock_set_rate_hz, +}; + +#endif /* METAL_FIXED_CLOCK */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-factor-clock.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-factor-clock.c new file mode 100644 index 000000000..2e0624652 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/fixed-factor-clock.c @@ -0,0 +1,32 @@ +/* Copyright 2018 SiFive, Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_FIXED_FACTOR_CLOCK + +#include +#include +#include + +long __metal_driver_fixed_factor_clock_get_rate_hz(const struct metal_clock *gclk) +{ + struct metal_clock *parent = __metal_driver_fixed_factor_clock_parent(gclk); + long parent_rate = 1; + if(parent) { + parent_rate = parent->vtable->get_rate_hz(parent); + } + + return __metal_driver_fixed_factor_clock_mult(gclk) * parent_rate / __metal_driver_fixed_factor_clock_div(gclk); +} + +long __metal_driver_fixed_factor_clock_set_rate_hz(struct metal_clock *gclk, long target_hz) +{ + return __metal_driver_fixed_factor_clock_get_rate_hz(gclk); +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_fixed_factor_clock) = { + .clock.get_rate_hz = __metal_driver_fixed_factor_clock_get_rate_hz, + .clock.set_rate_hz = __metal_driver_fixed_factor_clock_set_rate_hz, +}; +#endif /* METAL_FIXED_FACTOR_CLOCK */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/inline.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/inline.c new file mode 100644 index 000000000..50c0c5c21 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/inline.c @@ -0,0 +1,5 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_clint0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_clint0.c new file mode 100644 index 000000000..f1814d365 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_clint0.c @@ -0,0 +1,218 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_RISCV_CLINT0 + +#include +#include +#include +#include + +unsigned long long __metal_clint0_mtime_get (struct __metal_driver_riscv_clint0 *clint) +{ + __metal_io_u32 lo, hi; + unsigned long control_base = __metal_driver_sifive_clint0_control_base(&clint->controller); + + /* Guard against rollover when reading */ + do { + hi = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_RISCV_CLINT0_MTIME + 4)); + lo = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_RISCV_CLINT0_MTIME)); + } while (__METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_RISCV_CLINT0_MTIME + 4)) != hi); + + return (((unsigned long long)hi) << 32) | lo; +} + +int __metal_driver_riscv_clint0_mtimecmp_set(struct metal_interrupt *controller, + int hartid, + unsigned long long time) +{ + struct __metal_driver_riscv_clint0 *clint = + (struct __metal_driver_riscv_clint0 *)(controller); + unsigned long control_base = __metal_driver_sifive_clint0_control_base(&clint->controller); + /* Per spec, the RISC-V MTIME/MTIMECMP registers are 64 bit, + * and are NOT internally latched for multiword transfers. + * Need to be careful about sequencing to avoid triggering + * spurious interrupts: For that set the high word to a max + * value first. + */ + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_RISCV_CLINT0_MTIMECMP_BASE + 4)) = 0xFFFFFFFF; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_RISCV_CLINT0_MTIMECMP_BASE)) = (__metal_io_u32)time; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_RISCV_CLINT0_MTIMECMP_BASE + 4)) = (__metal_io_u32)(time >> 32); + return 0; +} + +static struct metal_interrupt *_get_cpu_intc() +{ + int hartid = 0; + __asm__ volatile("csrr %[hartid], mhartid" + : [hartid] "=r" (hartid) :: "memory"); + + struct metal_cpu *cpu = metal_cpu_get(hartid); + + return metal_cpu_interrupt_controller(cpu); +} + +void __metal_driver_riscv_clint0_init (struct metal_interrupt *controller) +{ + int num_interrupts = __metal_driver_sifive_clint0_num_interrupts(controller); + struct __metal_driver_riscv_clint0 *clint = + (struct __metal_driver_riscv_clint0 *)(controller); + + if ( !clint->init_done ) { + /* Register its interrupts with with parent controller, aka sw and timerto its default isr */ + for (int i = 0; i < num_interrupts; i++) { + struct metal_interrupt *intc = __metal_driver_sifive_clint0_interrupt_parents(controller, i); + int line = __metal_driver_sifive_clint0_interrupt_lines(controller, i); + intc->vtable->interrupt_register(intc, line, NULL, controller); + } + clint->init_done = 1; + } +} + +int __metal_driver_riscv_clint0_register (struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + int rc = -1; + + struct metal_interrupt *intc = NULL; + struct metal_interrupt *cpu_intc = _get_cpu_intc(); + int num_interrupts = __metal_driver_sifive_clint0_num_interrupts(controller); + + for(int i = 0; i < num_interrupts; i++) { + int line = __metal_driver_sifive_clint0_interrupt_lines(controller, i); + intc = __metal_driver_sifive_clint0_interrupt_parents(controller, i); + if (cpu_intc == intc && id == line) { + break; + } + intc = NULL; + } + + /* Register its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_register(intc, id, isr, priv); + } + return rc; +} + +int __metal_driver_riscv_clint0_enable (struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if ( id ) { + struct metal_interrupt *intc = NULL; + struct metal_interrupt *cpu_intc = _get_cpu_intc(); + int num_interrupts = __metal_driver_sifive_clint0_num_interrupts(controller); + + for(int i = 0; i < num_interrupts; i++) { + int line = __metal_driver_sifive_clint0_interrupt_lines(controller, i); + intc = __metal_driver_sifive_clint0_interrupt_parents(controller, i); + if(cpu_intc == intc && id == line) { + break; + } + intc = NULL; + } + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_enable(intc, id); + } + } +} + +int __metal_driver_riscv_clint0_disable (struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if ( id ) { + struct metal_interrupt *intc = NULL; + struct metal_interrupt *cpu_intc = _get_cpu_intc(); + int num_interrupts = __metal_driver_sifive_clint0_num_interrupts(controller); + + for(int i = 0; i < num_interrupts; i++) { + int line = __metal_driver_sifive_clint0_interrupt_lines(controller, i); + intc = __metal_driver_sifive_clint0_interrupt_parents(controller, i); + if(cpu_intc == intc && id == line) { + break; + } + intc = NULL; + } + + /* Disable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_disable(intc, id); + } + } +} + +int __metal_driver_riscv_clint0_command_request (struct metal_interrupt *controller, + int command, void *data) +{ + int hartid; + int rc = -1; + struct __metal_driver_riscv_clint0 *clint = + (struct __metal_driver_riscv_clint0 *)(controller); + unsigned long control_base = __metal_driver_sifive_clint0_control_base(controller); + + switch (command) { + case METAL_TIMER_MTIME_GET: + if (data) { + *(unsigned long long *)data = __metal_clint0_mtime_get(clint); + rc = 0; + } + break; + case METAL_SOFTWARE_IPI_CLEAR: + if (data) { + hartid = *(int *)data; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))) = METAL_DISABLE; + rc = 0; + } + break; + case METAL_SOFTWARE_IPI_SET: + if (data) { + hartid = *(int *)data; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))) = METAL_ENABLE; + /* Callers of this function assume it's blocking, in the sense that + * the IPI is guarnteed to have been delivered before the function + * returns. We can't really guarnteed it's delivered, but we can + * read back the control register after writing it in at least an + * attempt to provide some semblence of ordering here. The fence + * ensures the read is order after the write -- it wouldn't be + * necessary under RVWMO because this is the same address, but we + * don't have an IO memory model so I'm being a bit overkill here. + */ + __METAL_IO_FENCE(o,i); + rc = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))); + rc = 0; + } + break; + case METAL_SOFTWARE_MSIP_GET: + rc = 0; + if (data) { + hartid = *(int *)data; + rc = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))); + } + break; + default: + break; + } + + return rc; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_riscv_clint0) = { + .clint_vtable.interrupt_init = __metal_driver_riscv_clint0_init, + .clint_vtable.interrupt_register = __metal_driver_riscv_clint0_register, + .clint_vtable.interrupt_enable = __metal_driver_riscv_clint0_enable, + .clint_vtable.interrupt_disable = __metal_driver_riscv_clint0_disable, + .clint_vtable.command_request = __metal_driver_riscv_clint0_command_request, + .clint_vtable.mtimecmp_set = __metal_driver_riscv_clint0_mtimecmp_set, +}; + +#endif /* METAL_RISCV_CLINT0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_cpu.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_cpu.c new file mode 100644 index 000000000..88175eb18 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_cpu.c @@ -0,0 +1,690 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include +#include + +unsigned long long __metal_driver_cpu_mtime_get(struct metal_cpu *cpu); +int __metal_driver_cpu_mtimecmp_set(struct metal_cpu *cpu, unsigned long long time); + +struct metal_cpu *__metal_driver_cpu_get(int hartid) +{ + if (hartid < __METAL_DT_MAX_HARTS) { + return &(__metal_cpu_table[hartid]->cpu); + } + return (struct metal_cpu *)NULL; +} + +uintptr_t __metal_myhart_id (void) +{ + uintptr_t myhart; + asm volatile ("csrr %0, mhartid" : "=r"(myhart)); + return myhart; +} + +void __metal_zero_memory (unsigned char *base, unsigned int size) +{ + volatile unsigned char *ptr; + for (ptr = base; ptr < (base + size); ptr++){ + *ptr = 0; + } +} + +void __metal_interrupt_global_enable (void) { + uintptr_t m; + asm volatile ("csrrs %0, mstatus, %1" : "=r"(m) : "r"(METAL_MIE_INTERRUPT)); +} + +void __metal_interrupt_global_disable (void) { + uintptr_t m; + asm volatile ("csrrc %0, mstatus, %1" : "=r"(m) : "r"(METAL_MIE_INTERRUPT)); +} + +void __metal_interrupt_software_enable (void) { + uintptr_t m; + asm volatile ("csrrs %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_SW)); +} + +void __metal_interrupt_software_disable (void) { + uintptr_t m; + asm volatile ("csrrc %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_SW)); +} + +void __metal_interrupt_timer_enable (void) { + uintptr_t m; + asm volatile ("csrrs %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_TMR)); +} + +void __metal_interrupt_timer_disable (void) { + uintptr_t m; + asm volatile ("csrrc %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_TMR)); +} + +void __metal_interrupt_external_enable (void) { + uintptr_t m; + asm volatile ("csrrs %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_EXT)); +} + +void __metal_interrupt_external_disable (void) { + unsigned long m; + asm volatile ("csrrc %0, mie, %1" : "=r"(m) : "r"(METAL_LOCAL_INTERRUPT_EXT)); +} + +void __metal_interrupt_local_enable (int id) { + uintptr_t b = 1 << id; + uintptr_t m; + asm volatile ("csrrs %0, mie, %1" : "=r"(m) : "r"(b)); +} + +void __metal_interrupt_local_disable (int id) { + uintptr_t b = 1 << id; + uintptr_t m; + asm volatile ("csrrc %0, mie, %1" : "=r"(m) : "r"(b)); +} + +void __metal_default_exception_handler (struct metal_cpu *cpu, int ecode) { + metal_shutdown(100); +} + +void __metal_default_interrupt_handler (int id, void *priv) { + metal_shutdown(200); +} + +void __metal_default_sw_handler (int id, void *priv) { + uintptr_t mcause; + struct __metal_driver_riscv_cpu_intc *intc; + struct __metal_driver_cpu *cpu = __metal_cpu_table[__metal_myhart_id()]; + + asm volatile ("csrr %0, mcause" : "=r"(mcause)); + if ( cpu ) { + intc = (struct __metal_driver_riscv_cpu_intc *) + __metal_driver_cpu_interrupt_controller((struct metal_cpu *)cpu); + intc->metal_exception_table[mcause & METAL_MCAUSE_CAUSE]((struct metal_cpu *)cpu, id); + } +} + +void __metal_default_timer_handler (int id, void *priv) { + struct metal_cpu *cpu = __metal_driver_cpu_get(__metal_myhart_id()); + unsigned long long time = __metal_driver_cpu_mtime_get(cpu); + + /* Set a 10 cycle timer */ + __metal_driver_cpu_mtimecmp_set(cpu, time + 10); +} + +void __metal_exception_handler(void) __attribute__((interrupt, aligned(128))); +void __metal_exception_handler (void) { + int id; + void *priv; + uintptr_t mcause, mepc, mtval, mtvec; + struct __metal_driver_riscv_cpu_intc *intc; + struct __metal_driver_cpu *cpu = __metal_cpu_table[__metal_myhart_id()]; + + asm volatile ("csrr %0, mcause" : "=r"(mcause)); + asm volatile ("csrr %0, mepc" : "=r"(mepc)); + asm volatile ("csrr %0, mtval" : "=r"(mtval)); + asm volatile ("csrr %0, mtvec" : "=r"(mtvec)); + + if ( cpu ) { + intc = (struct __metal_driver_riscv_cpu_intc *) + __metal_driver_cpu_interrupt_controller((struct metal_cpu *)cpu); + id = mcause & METAL_MCAUSE_CAUSE; + if (mcause & METAL_MCAUSE_INTR) { + if ((id < METAL_INTERRUPT_ID_LC0) || + ((mtvec & METAL_MTVEC_MASK) == METAL_MTVEC_DIRECT)) { + priv = intc->metal_int_table[id].exint_data; + intc->metal_int_table[id].handler(id, priv); + return; + } + if ((mtvec & METAL_MTVEC_MASK) == METAL_MTVEC_CLIC) { + uintptr_t mtvt; + metal_interrupt_handler_t mtvt_handler; + + asm volatile ("csrr %0, mtvt" : "=r"(mtvt)); + priv = intc->metal_int_table[METAL_INTERRUPT_ID_SW].sub_int; + mtvt_handler = (metal_interrupt_handler_t)mtvt; + mtvt_handler(id, priv); + return; + } + } else { + intc->metal_exception_table[id]((struct metal_cpu *)cpu, id); + } + } +} + +void __metal_controller_interrupt_vector (metal_vector_mode mode, void *vec_table) +{ + uintptr_t trap_entry, val; + + asm volatile ("csrr %0, mtvec" : "=r"(val)); + val &= ~(METAL_MTVEC_CLIC_VECTORED | METAL_MTVEC_CLIC_RESERVED); + trap_entry = (uintptr_t)vec_table; + + switch (mode) { + case METAL_SELECTIVE_VECTOR_MODE: + asm volatile ("csrw mtvt, %0" :: "r"(trap_entry | METAL_MTVEC_CLIC)); + asm volatile ("csrw mtvec, %0" :: "r"(val | METAL_MTVEC_CLIC)); + break; + case METAL_HARDWARE_VECTOR_MODE: + asm volatile ("csrw mtvt, %0" :: "r"(trap_entry | METAL_MTVEC_CLIC_VECTORED)); + asm volatile ("csrw mtvec, %0" :: "r"(val | METAL_MTVEC_CLIC_VECTORED)); + break; + case METAL_VECTOR_MODE: + asm volatile ("csrw mtvec, %0" :: "r"(trap_entry | METAL_MTVEC_VECTORED)); + break; + case METAL_DIRECT_MODE: + asm volatile ("csrw mtvec, %0" :: "r"(trap_entry & ~METAL_MTVEC_CLIC_VECTORED)); + break; + } +} + +int __metal_valid_interrupt_id (int id) +{ + switch (id) { + case METAL_INTERRUPT_ID_SW: + case METAL_INTERRUPT_ID_TMR: + case METAL_INTERRUPT_ID_EXT: + case METAL_INTERRUPT_ID_LC0: + case METAL_INTERRUPT_ID_LC1: + case METAL_INTERRUPT_ID_LC2: + case METAL_INTERRUPT_ID_LC3: + case METAL_INTERRUPT_ID_LC4: + case METAL_INTERRUPT_ID_LC5: + case METAL_INTERRUPT_ID_LC6: + case METAL_INTERRUPT_ID_LC7: + case METAL_INTERRUPT_ID_LC8: + case METAL_INTERRUPT_ID_LC9: + case METAL_INTERRUPT_ID_LC10: + case METAL_INTERRUPT_ID_LC11: + case METAL_INTERRUPT_ID_LC12: + case METAL_INTERRUPT_ID_LC13: + case METAL_INTERRUPT_ID_LC14: + case METAL_INTERRUPT_ID_LC15: + return 1; + default: + break; + } + + return 0; +} + + +int __metal_local_interrupt_enable (struct metal_interrupt *controller, + metal_interrupt_id_e id, int enable) +{ + int rc = 0; + + if ( !controller) { + return -1; + } + + switch (id) { + case METAL_INTERRUPT_ID_BASE: + if (enable) { + __metal_interrupt_global_enable(); + } else { + __metal_interrupt_global_disable(); + } + break; + case METAL_INTERRUPT_ID_SW: + if (enable) { + __metal_interrupt_software_enable(); + } else { + __metal_interrupt_software_disable(); + } + break; + case METAL_INTERRUPT_ID_TMR: + if (enable) { + __metal_interrupt_timer_enable(); + } else { + __metal_interrupt_timer_disable(); + } + break; + case METAL_INTERRUPT_ID_EXT: + if (enable) { + __metal_interrupt_external_enable(); + } else { + __metal_interrupt_external_disable(); + } + break; + case METAL_INTERRUPT_ID_LC0: + case METAL_INTERRUPT_ID_LC1: + case METAL_INTERRUPT_ID_LC2: + case METAL_INTERRUPT_ID_LC3: + case METAL_INTERRUPT_ID_LC4: + case METAL_INTERRUPT_ID_LC5: + case METAL_INTERRUPT_ID_LC6: + case METAL_INTERRUPT_ID_LC7: + case METAL_INTERRUPT_ID_LC8: + case METAL_INTERRUPT_ID_LC9: + case METAL_INTERRUPT_ID_LC10: + case METAL_INTERRUPT_ID_LC11: + case METAL_INTERRUPT_ID_LC12: + case METAL_INTERRUPT_ID_LC13: + case METAL_INTERRUPT_ID_LC14: + case METAL_INTERRUPT_ID_LC15: + if (enable) { + __metal_interrupt_local_enable(id); + } else { + __metal_interrupt_local_disable(id); + } + break; + defaut: + rc = -1; + } + return rc; +} + +int __metal_exception_register (struct metal_interrupt *controller, + int ecode, metal_exception_handler_t isr) +{ + struct __metal_driver_riscv_cpu_intc *intc = (void *)(controller); + + if ((ecode < METAL_MAX_EXCEPTION_CODE) && isr) { + intc->metal_exception_table[ecode] = isr; + return 0; + } + return -1; +} + +void __metal_driver_riscv_cpu_controller_interrupt_init (struct metal_interrupt *controller) +{ + struct __metal_driver_riscv_cpu_intc *intc = (void *)(controller); + uintptr_t val; + + if ( !intc->init_done ) { + /* Disable and clear all interrupt sources */ + asm volatile ("csrc mie, %0" :: "r"(-1)); + asm volatile ("csrc mip, %0" :: "r"(-1)); + + /* Read the misa CSR to determine if the delegation registers exist */ + uintptr_t misa; + asm volatile ("csrr %0, misa" : "=r" (misa)); + + /* The delegation CSRs exist if user mode interrupts (N extension) or + * supervisor mode (S extension) are supported */ + if((misa & METAL_ISA_N_EXTENSIONS) || (misa & METAL_ISA_S_EXTENSIONS)) { + /* Disable interrupt and exception delegation */ + asm volatile ("csrc mideleg, %0" :: "r"(-1)); + asm volatile ("csrc medeleg, %0" :: "r"(-1)); + } + + /* The satp CSR exists if supervisor mode (S extension) is supported */ + if(misa & METAL_ISA_S_EXTENSIONS) { + /* Clear the entire CSR to make sure that satp.MODE = 0 */ + asm volatile ("csrc satp, %0" :: "r"(-1)); + } + + /* Default to use direct interrupt, setup sw cb table*/ + for (int i = 0; i < METAL_MAX_MI; i++) { + intc->metal_int_table[i].handler = NULL; + intc->metal_int_table[i].sub_int = NULL; + intc->metal_int_table[i].exint_data = NULL; + } + for (int i = 0; i < METAL_MAX_ME; i++) { + intc->metal_exception_table[i] = __metal_default_exception_handler; + } + __metal_controller_interrupt_vector(METAL_DIRECT_MODE, &__metal_exception_handler); + asm volatile ("csrr %0, misa" : "=r"(val)); + if (val & (METAL_ISA_D_EXTENSIONS | METAL_ISA_F_EXTENSIONS | METAL_ISA_Q_EXTENSIONS)) { + /* Floating point architecture, so turn on FP register saving*/ + asm volatile ("csrr %0, mstatus" : "=r"(val)); + asm volatile ("csrw mstatus, %0" :: "r"(val | METAL_MSTATUS_FS_INIT)); + } + intc->init_done = 1; + } +} + +int __metal_driver_riscv_cpu_controller_interrupt_register(struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + int rc = 0; + struct __metal_driver_riscv_cpu_intc *intc = (void *)(controller); + + if ( !__metal_valid_interrupt_id(id) ) { + return -11; + } + + if (isr) { + intc->metal_int_table[id].handler = isr; + intc->metal_int_table[id].exint_data = priv; + } else { + switch (id) { + case METAL_INTERRUPT_ID_SW: + intc->metal_int_table[id].handler = __metal_default_sw_handler; + intc->metal_int_table[id].sub_int = priv; + break; + case METAL_INTERRUPT_ID_TMR: + intc->metal_int_table[id].handler = __metal_default_timer_handler; + intc->metal_int_table[id].sub_int = priv; + break; + case METAL_INTERRUPT_ID_EXT: + case METAL_INTERRUPT_ID_LC0: + case METAL_INTERRUPT_ID_LC1: + case METAL_INTERRUPT_ID_LC2: + case METAL_INTERRUPT_ID_LC3: + case METAL_INTERRUPT_ID_LC4: + case METAL_INTERRUPT_ID_LC5: + case METAL_INTERRUPT_ID_LC6: + case METAL_INTERRUPT_ID_LC7: + case METAL_INTERRUPT_ID_LC8: + case METAL_INTERRUPT_ID_LC9: + case METAL_INTERRUPT_ID_LC10: + case METAL_INTERRUPT_ID_LC11: + case METAL_INTERRUPT_ID_LC12: + case METAL_INTERRUPT_ID_LC13: + case METAL_INTERRUPT_ID_LC14: + case METAL_INTERRUPT_ID_LC15: + intc->metal_int_table[id].handler = __metal_default_interrupt_handler; + intc->metal_int_table[id].sub_int = priv; + break; + defaut: + rc = -12; + } + } + return rc; +} + +int __metal_driver_riscv_cpu_controller_interrupt_enable (struct metal_interrupt *controller, + int id) +{ + return __metal_local_interrupt_enable(controller, id, METAL_ENABLE); +} + +int __metal_driver_riscv_cpu_controller_interrupt_disable (struct metal_interrupt *controller, + int id) +{ + return __metal_local_interrupt_enable(controller, id, METAL_DISABLE); +} + +int __metal_driver_riscv_cpu_controller_interrupt_enable_vector(struct metal_interrupt *controller, + int id, metal_vector_mode mode) +{ + struct __metal_driver_riscv_cpu_intc *intc = (void *)(controller); + + if (id == METAL_INTERRUPT_ID_BASE) { + if (mode == METAL_DIRECT_MODE) { + __metal_controller_interrupt_vector(mode, &__metal_exception_handler); + return 0; + } + if (mode == METAL_VECTOR_MODE) { + __metal_controller_interrupt_vector(mode, &intc->metal_mtvec_table); + return 0; + } + } + return -1; +} + +int __metal_driver_riscv_cpu_controller_interrupt_disable_vector(struct metal_interrupt *controller, + int id) +{ + struct __metal_driver_riscv_cpu_intc *intc = (void *)(controller); + + if (id == METAL_INTERRUPT_ID_BASE) { + __metal_controller_interrupt_vector(METAL_DIRECT_MODE, &__metal_exception_handler); + return 0; + } + return -1; +} + +int __metal_driver_riscv_cpu_controller_command_request (struct metal_interrupt *controller, + int cmd, void *data) +{ + /* NOP for now, unless local interrupt lines the like of clic, clint, plic */ + return 0; +} + +extern inline int __metal_controller_interrupt_is_selective_vectored(void); + +/* CPU driver !!! */ + +unsigned long long __metal_driver_cpu_timer_get(struct metal_cpu *cpu) +{ + unsigned long long val = 0; + +#if __riscv_xlen == 32 + unsigned long hi, hi1, lo; + + asm volatile ("csrr %0, mcycleh" : "=r"(hi)); + asm volatile ("csrr %0, mcycle" : "=r"(lo)); + asm volatile ("csrr %0, mcycleh" : "=r"(hi1)); + if (hi == hi1) { + val = ((unsigned long long)hi << 32) | lo; + } +#else + asm volatile ("csrr %0, mcycle" : "=r"(val)); +#endif + + return val; +} + +unsigned long long __metal_driver_cpu_timebase_get(struct metal_cpu *cpu) +{ + int timebase; + if (!cpu) { + return 0; + } + + timebase = __metal_driver_cpu_timebase((struct metal_cpu *)cpu); + return timebase; +} + +unsigned long long __metal_driver_cpu_mtime_get (struct metal_cpu *cpu) +{ + unsigned long long time = 0; + struct metal_interrupt *tmr_intc; + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + struct __metal_driver_cpu *_cpu = (void *)cpu; + + if (intc) { + tmr_intc = intc->metal_int_table[METAL_INTERRUPT_ID_TMR].sub_int; + if (tmr_intc) { + tmr_intc->vtable->command_request(tmr_intc, + METAL_TIMER_MTIME_GET, &time); + } + } + return time; +} + +int __metal_driver_cpu_mtimecmp_set (struct metal_cpu *cpu, unsigned long long time) +{ + int rc = -1; + struct metal_interrupt *tmr_intc; + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + struct __metal_driver_cpu *_cpu = (void *)cpu; + + if (intc) { + tmr_intc = intc->metal_int_table[METAL_INTERRUPT_ID_TMR].sub_int; + if (tmr_intc) { + rc = tmr_intc->vtable->mtimecmp_set(tmr_intc, + __metal_driver_cpu_hartid(cpu), + time); + } + } + return rc; +} + +struct metal_interrupt * +__metal_driver_cpu_timer_controller_interrupt(struct metal_cpu *cpu) +{ +#ifdef __METAL_DT_RISCV_CLINT0_HANDLE + return __METAL_DT_RISCV_CLINT0_HANDLE; +#else +#ifdef __METAL_DT_SIFIVE_CLIC0_HANDLE + return __METAL_DT_SIFIVE_CLIC0_HANDLE; +#else +#warning "There is no interrupt controller for Timer interrupt" + return NULL; +#endif +#endif +} + +int __metal_driver_cpu_get_timer_interrupt_id(struct metal_cpu *cpu) +{ + return METAL_INTERRUPT_ID_TMR; +} + +struct metal_interrupt * +__metal_driver_cpu_sw_controller_interrupt(struct metal_cpu *cpu) +{ +#ifdef __METAL_DT_RISCV_CLINT0_HANDLE + return __METAL_DT_RISCV_CLINT0_HANDLE; +#else +#ifdef __METAL_DT_SIFIVE_CLIC0_HANDLE + return __METAL_DT_SIFIVE_CLIC0_HANDLE; +#else +#warning "There is no interrupt controller for Software interrupt" + return NULL; +#endif +#endif +} + +int __metal_driver_cpu_get_sw_interrupt_id(struct metal_cpu *cpu) +{ + return METAL_INTERRUPT_ID_SW; +} + +int __metal_driver_cpu_set_sw_ipi (struct metal_cpu *cpu, int hartid) +{ + int rc = -1; + struct metal_interrupt *sw_intc; + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + struct __metal_driver_cpu *_cpu = (void *)cpu; + + if (intc) { + sw_intc = intc->metal_int_table[METAL_INTERRUPT_ID_SW].sub_int; + if (sw_intc) { + rc = sw_intc->vtable->command_request(sw_intc, + METAL_SOFTWARE_IPI_SET, &hartid); + } + } + return rc; +} + +int __metal_driver_cpu_clear_sw_ipi (struct metal_cpu *cpu, int hartid) +{ + int rc = -1; + struct metal_interrupt *sw_intc; + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + struct __metal_driver_cpu *_cpu = (void *)cpu; + + if (intc) { + sw_intc = intc->metal_int_table[METAL_INTERRUPT_ID_SW].sub_int; + if (sw_intc) { + rc = sw_intc->vtable->command_request(sw_intc, + METAL_SOFTWARE_IPI_CLEAR, &hartid); + } + } + return rc; +} + +int __metal_driver_cpu_get_msip (struct metal_cpu *cpu, int hartid) +{ + int rc = 0; + struct metal_interrupt *sw_intc; + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + struct __metal_driver_cpu *_cpu = (void *)cpu; + + if (intc) { + sw_intc = intc->metal_int_table[METAL_INTERRUPT_ID_SW].sub_int; + if (sw_intc) { + rc = sw_intc->vtable->command_request(sw_intc, + METAL_SOFTWARE_MSIP_GET, &hartid); + } + } + return rc; +} + +struct metal_interrupt * +__metal_driver_cpu_controller_interrupt(struct metal_cpu *cpu) +{ + return __metal_driver_cpu_interrupt_controller(cpu); +} + +int __metal_driver_cpu_enable_interrupt(struct metal_cpu *cpu, void *priv) +{ + if ( __metal_driver_cpu_interrupt_controller(cpu) ) { + /* Only support machine mode for now */ + __metal_interrupt_global_enable(); + return 0; + } + return -1; +} + +int __metal_driver_cpu_disable_interrupt(struct metal_cpu *cpu, void *priv) +{ + if ( __metal_driver_cpu_interrupt_controller(cpu) ) { + /* Only support machine mode for now */ + __metal_interrupt_global_disable(); + return 0; + } + return -1; +} + +int __metal_driver_cpu_exception_register(struct metal_cpu *cpu, int ecode, + metal_exception_handler_t isr) +{ + struct __metal_driver_riscv_cpu_intc *intc = + (struct __metal_driver_riscv_cpu_intc *)__metal_driver_cpu_interrupt_controller(cpu); + + if (intc) { + return __metal_exception_register((struct metal_interrupt *)intc, ecode, isr); + } + return -1; +} + +int __metal_driver_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc) +{ + /* Per ISA compressed instruction has last two bits of opcode set */ + return (*(unsigned short*)epc & 3) ? 4 : 2; +} + +uintptr_t __metal_driver_cpu_get_exception_pc(struct metal_cpu *cpu) +{ + uintptr_t mepc; + asm volatile ("csrr %0, mepc" : "=r"(mepc)); + return mepc; +} + +int __metal_driver_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t mepc) +{ + asm volatile ("csrw mepc, %0" :: "r"(mepc)); + return 0; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_riscv_cpu_intc) = { + .controller_vtable.interrupt_init = __metal_driver_riscv_cpu_controller_interrupt_init, + .controller_vtable.interrupt_register = __metal_driver_riscv_cpu_controller_interrupt_register, + .controller_vtable.interrupt_enable = __metal_driver_riscv_cpu_controller_interrupt_enable, + .controller_vtable.interrupt_disable = __metal_driver_riscv_cpu_controller_interrupt_disable, + .controller_vtable.interrupt_vector_enable = __metal_driver_riscv_cpu_controller_interrupt_enable_vector, + .controller_vtable.interrupt_vector_disable = __metal_driver_riscv_cpu_controller_interrupt_disable_vector, + .controller_vtable.command_request = __metal_driver_riscv_cpu_controller_command_request, +}; + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_cpu) = { + .cpu_vtable.timer_get = __metal_driver_cpu_timer_get, + .cpu_vtable.timebase_get = __metal_driver_cpu_timebase_get, + .cpu_vtable.mtime_get = __metal_driver_cpu_mtime_get, + .cpu_vtable.mtimecmp_set = __metal_driver_cpu_mtimecmp_set, + .cpu_vtable.tmr_controller_interrupt = __metal_driver_cpu_timer_controller_interrupt, + .cpu_vtable.get_tmr_interrupt_id = __metal_driver_cpu_get_timer_interrupt_id, + .cpu_vtable.sw_controller_interrupt = __metal_driver_cpu_sw_controller_interrupt, + .cpu_vtable.get_sw_interrupt_id = __metal_driver_cpu_get_sw_interrupt_id, + .cpu_vtable.set_sw_ipi = __metal_driver_cpu_set_sw_ipi, + .cpu_vtable.clear_sw_ipi = __metal_driver_cpu_clear_sw_ipi, + .cpu_vtable.get_msip = __metal_driver_cpu_get_msip, + .cpu_vtable.controller_interrupt = __metal_driver_cpu_controller_interrupt, + .cpu_vtable.exception_register = __metal_driver_cpu_exception_register, + .cpu_vtable.get_ilen = __metal_driver_cpu_get_instruction_length, + .cpu_vtable.get_epc = __metal_driver_cpu_get_exception_pc, + .cpu_vtable.set_epc = __metal_driver_cpu_set_exception_pc, +}; + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_plic0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_plic0.c new file mode 100644 index 000000000..ed9782450 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/riscv_plic0.c @@ -0,0 +1,172 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_RISCV_PLIC0 + +#include +#include +#include +#include + +unsigned int __metal_plic0_claim_interrupt (struct __metal_driver_riscv_plic0 *plic) +{ + unsigned long control_base = __metal_driver_sifive_plic0_control_base((struct metal_interrupt *)plic); + return __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_CLAIM)); +} + +void __metal_plic0_complete_interrupt(struct __metal_driver_riscv_plic0 *plic, + unsigned int id) +{ + unsigned long control_base = __metal_driver_sifive_plic0_control_base((struct metal_interrupt *)plic); + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_CLAIM)) = id; +} + +void __metal_plic0_set_threshold(struct __metal_driver_riscv_plic0 *plic, + unsigned int threshold) +{ + unsigned long control_base = __metal_driver_sifive_plic0_control_base((struct metal_interrupt *)plic); + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_THRESHOLD)) = threshold; +} + +void __metal_plic0_set_priority(struct __metal_driver_riscv_plic0 *plic, + int id, unsigned int priority) +{ + unsigned long control_base = __metal_driver_sifive_plic0_control_base((struct metal_interrupt *)plic); + int max_priority = __metal_driver_sifive_plic0_max_priority((struct metal_interrupt *)plic); + if ( (max_priority) && (priority < max_priority) ) { + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_PRIORITY_BASE + + (id << METAL_PLIC_SOURCE_PRIORITY_SHIFT))) = priority; + } +} + +void __metal_plic0_enable(struct __metal_driver_riscv_plic0 *plic, int id, int enable) +{ + unsigned int current; + unsigned long hartid = __metal_myhart_id(); + unsigned long control_base = __metal_driver_sifive_plic0_control_base((struct metal_interrupt *)plic); + + current = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_ENABLE_BASE + + (id >> METAL_PLIC_SOURCE_SHIFT) * 4)); + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + METAL_RISCV_PLIC0_ENABLE_BASE + + ((id >> METAL_PLIC_SOURCE_SHIFT) * 4))) = + enable ? (current | (1 << (id & METAL_PLIC_SOURCE_MASK))) + : (current & ~(1 << (id & METAL_PLIC_SOURCE_MASK))); +} + +void __metal_plic0_default_handler (int id, void *priv) { + metal_shutdown(300); +} + +void __metal_plic0_handler (int id, void *priv) +{ + struct __metal_driver_riscv_plic0 *plic = priv; + unsigned int idx = __metal_plic0_claim_interrupt(plic); + int num_interrupts = __metal_driver_sifive_plic0_num_interrupts((struct metal_interrupt *)plic); + + if ( (idx < num_interrupts) && (plic->metal_exint_table[idx]) ) { + plic->metal_exint_table[idx](idx, + plic->metal_exdata_table[idx].exint_data); + } + + __metal_plic0_complete_interrupt(plic, idx); +} + +void __metal_driver_riscv_plic0_init (struct metal_interrupt *controller) +{ + struct __metal_driver_riscv_plic0 *plic = (void *)(controller); + + if ( !plic->init_done ) { + int num_interrupts, line; + struct metal_interrupt *intc; + + for(int parent = 0; parent < __METAL_PLIC_NUM_PARENTS; parent++) { + num_interrupts = __metal_driver_sifive_plic0_num_interrupts(controller); + intc = __metal_driver_sifive_plic0_interrupt_parents(controller, parent); + line = __metal_driver_sifive_plic0_interrupt_lines(controller, parent); + + /* Initialize ist parent controller, aka cpu_intc. */ + intc->vtable->interrupt_init(intc); + + for (int i = 0; i < num_interrupts; i++) { + __metal_plic0_enable(plic, i, METAL_DISABLE); + __metal_plic0_set_priority(plic, i, 0); + plic->metal_exint_table[i] = NULL; + plic->metal_exdata_table[i].sub_int = NULL; + plic->metal_exdata_table[i].exint_data = NULL; + } + + __metal_plic0_set_threshold(plic, 0); + + /* Register plic (ext) interrupt with with parent controller */ + intc->vtable->interrupt_register(intc, line, NULL, plic); + /* Register plic handler for dispatching its device interrupts */ + intc->vtable->interrupt_register(intc, line, __metal_plic0_handler, plic); + /* Enable plic (ext) interrupt with with parent controller */ + intc->vtable->interrupt_enable(intc, line); + } + plic->init_done = 1; + } +} + +int __metal_driver_riscv_plic0_register (struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + struct __metal_driver_riscv_plic0 *plic = (void *)(controller); + + if (id >= __metal_driver_sifive_plic0_num_interrupts(controller)) { + return -1; + } + + if (isr) { + __metal_plic0_set_priority(plic ,id, 2); + plic->metal_exint_table[id] = isr; + plic->metal_exdata_table[id].exint_data = priv; + } else { + __metal_plic0_set_priority(plic, id, 1); + plic->metal_exint_table[id] = __metal_plic0_default_handler; + plic->metal_exdata_table[id].sub_int = priv; + } + + return 0; +} + +int __metal_driver_riscv_plic0_enable (struct metal_interrupt *controller, int id) +{ + struct __metal_driver_riscv_plic0 *plic = (void *)(controller); + + if (id >= __metal_driver_sifive_plic0_num_interrupts(controller)) { + return -1; + } + + __metal_plic0_enable(plic, id, METAL_ENABLE); + return 0; +} + +int __metal_driver_riscv_plic0_disable (struct metal_interrupt *controller, int id) +{ + struct __metal_driver_riscv_plic0 *plic = (void *)(controller); + + if (id >= __metal_driver_sifive_plic0_num_interrupts(controller)) { + return -1; + } + __metal_plic0_enable(plic, id, METAL_DISABLE); + return 0; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_riscv_plic0) = { + .plic_vtable.interrupt_init = __metal_driver_riscv_plic0_init, + .plic_vtable.interrupt_register = __metal_driver_riscv_plic0_register, + .plic_vtable.interrupt_enable = __metal_driver_riscv_plic0_enable, + .plic_vtable.interrupt_disable = __metal_driver_riscv_plic0_disable, +}; + +#endif /* METAL_RISCV_PLIC0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_clic0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_clic0.c new file mode 100644 index 000000000..3f213847d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_clic0.c @@ -0,0 +1,564 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_CLIC0 + +#include +#include +#include +#include +#include + +typedef enum metal_priv_mode_ { + METAL_PRIV_M_MODE = 0, + METAL_PRIV_MU_MODE = 1, + METAL_PRIV_MSU_MODE = 2 +} metal_priv_mode; + +typedef enum metal_clic_vector_{ + METAL_CLIC_NONVECTOR = 0, + METAL_CLIC_VECTORED = 1 +} metal_clic_vector; + +struct __metal_clic_cfg { + unsigned char : 1, + nmbits : 2, + nlbits : 4, + nvbit : 1; +}; + +const struct __metal_clic_cfg __metal_clic_defaultcfg = { + .nmbits = METAL_PRIV_M_MODE, + .nlbits = 0, + .nvbit = METAL_CLIC_NONVECTOR + }; + +struct __metal_clic_cfg __metal_clic0_configuration (struct __metal_driver_sifive_clic0 *clic, + struct __metal_clic_cfg *cfg) +{ + volatile unsigned char val; + struct __metal_clic_cfg cliccfg; + uintptr_t hartid = __metal_myhart_id(); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + + if ( cfg ) { + val = cfg->nmbits << 5 | cfg->nlbits << 1 | cfg->nvbit; + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICCFG)) = val; + } + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICCFG)); + cliccfg.nmbits = (val & METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK) >> 5; + cliccfg.nlbits = (val & METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK) >> 1; + cliccfg.nvbit = val & METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK; + return cliccfg; +} + +int __metal_clic0_interrupt_set_mode (struct __metal_driver_sifive_clic0 *clic, int id, int mode) +{ + uint8_t mask, val; + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + + if (mode >= (cfg.nmbits << 1)) { + /* Do nothing, mode request same or exceed what configured in CLIC */ + return 0; + } + + /* Mask out nmbits and retain other values */ + mask = ((uint8_t)(-1)) >> cfg.nmbits; + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)) & mask; + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)) = val | (mode << (8 - cfg.nmbits)); + return 0; +} + +int __metal_clic0_interrupt_set_level (struct __metal_driver_sifive_clic0 *clic, int id, int level) +{ + uint8_t mask, nmmask, nlmask, val; + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + + /* Drop the LSBs that don't fit in nlbits */ + level = level >> (METAL_CLIC_MAX_NLBITS - cfg.nlbits); + + nmmask = ~( ((uint8_t)(-1)) >> (cfg.nmbits) ); + nlmask = ((uint8_t)(-1)) >> (cfg.nmbits + cfg.nlbits); + mask = ~(nlmask | nmmask); + + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)) = __METAL_SET_FIELD(val, mask, level); + return 0; +} + +int __metal_clic0_interrupt_get_level (struct __metal_driver_sifive_clic0 *clic, int id) +{ + int level; + uint8_t mask, val, freebits, nlbits; + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_intbits = __metal_driver_sifive_clic0_num_intbits((struct metal_interrupt *)clic); + + if ((cfg.nmbits + cfg.nlbits) >= num_intbits) { + nlbits = num_intbits - cfg.nmbits; + } else { + nlbits = cfg.nlbits; + } + + mask = ((1 << nlbits) - 1) << (8 - (cfg.nmbits + nlbits)); + freebits = ((1 << METAL_CLIC_MAX_NLBITS) - 1) >> nlbits; + + if (mask == 0) { + level = (1 << METAL_CLIC_MAX_NLBITS) - 1; + } else { + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + val = __METAL_GET_FIELD(val, mask); + level = (val << (METAL_CLIC_MAX_NLBITS - nlbits)) | freebits; + } + + return level; +} + +int __metal_clic0_interrupt_set_priority (struct __metal_driver_sifive_clic0 *clic, int id, int priority) +{ + uint8_t mask, npmask, val, npbits; + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_intbits = __metal_driver_sifive_clic0_num_intbits((struct metal_interrupt *)clic); + + if ((cfg.nmbits + cfg.nlbits) < num_intbits) { + npbits = num_intbits - (cfg.nmbits + cfg.nlbits); + priority = priority >> (8 - npbits); + + mask = ((uint8_t)(-1)) >> (cfg.nmbits + cfg.nlbits + npbits); + npmask = ~(((uint8_t)(-1)) >> (cfg.nmbits + cfg.nlbits)); + mask = ~(mask | npmask); + + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)) = __METAL_SET_FIELD(val, mask, priority); + } + return 0; +} + +int __metal_clic0_interrupt_get_priority (struct __metal_driver_sifive_clic0 *clic, int id) +{ + int priority; + uint8_t mask, val, freebits, nlbits; + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_intbits = __metal_driver_sifive_clic0_num_intbits((struct metal_interrupt *)clic); + + if ((cfg.nmbits + cfg.nlbits) >= num_intbits) { + nlbits = num_intbits - cfg.nmbits; + } else { + nlbits = cfg.nlbits; + } + + mask = ((1 << nlbits) - 1) << (8 - (cfg.nmbits + nlbits)); + freebits = ((1 << METAL_CLIC_MAX_NLBITS) - 1) >> nlbits; + + if (mask == 0) { + priority = (1 << METAL_CLIC_MAX_NLBITS) - 1; + } else { + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + priority = __METAL_GET_FIELD(val, freebits); + } + return priority; +} + +int __metal_clic0_interrupt_set_vector (struct __metal_driver_sifive_clic0 *clic, int id, int enable) +{ + uint8_t mask, val; + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_intbits = __metal_driver_sifive_clic0_num_intbits((struct metal_interrupt *)clic); + + mask = 1 << (8 - num_intbits); + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + /* Ensure its value is 1 bit wide */ + enable &= 0x1; + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)) = __METAL_SET_FIELD(val, mask, enable); + return 0; +} + +int __metal_clic0_interrupt_is_vectored (struct __metal_driver_sifive_clic0 *clic, int id) +{ + uint8_t mask, val; + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_intbits = __metal_driver_sifive_clic0_num_intbits((struct metal_interrupt *)clic); + + mask = 1 << (8 - num_intbits); + val = __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTCTL_BASE + id)); + return __METAL_GET_FIELD(val, mask); +} + +int __metal_clic0_interrupt_enable (struct __metal_driver_sifive_clic0 *clic, int id) +{ + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if (id >= num_subinterrupts) { + return -1; + } + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIE_BASE + id)) = METAL_ENABLE; + return 0; +} + +int __metal_clic0_interrupt_disable (struct __metal_driver_sifive_clic0 *clic, int id) +{ + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if (id >= num_subinterrupts) { + return -1; + } + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIE_BASE + id)) = METAL_DISABLE; + return 0; +} + +int __metal_clic0_interrupt_is_enabled (struct __metal_driver_sifive_clic0 *clic, int id) +{ + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if (id >= num_subinterrupts) { + return 0; + } + return __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIE_BASE + id)); +} + +int __metal_clic0_interrupt_is_pending (struct __metal_driver_sifive_clic0 *clic, int id) +{ + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if (id >= num_subinterrupts) { + return 0; + } + return __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIP_BASE + id)); +} + +int __metal_clic0_interrupt_set (struct __metal_driver_sifive_clic0 *clic, int id) +{ + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if ((id >= METAL_INTERRUPT_ID_LC0) && (id < num_subinterrupts)) { + } + return 0; +} + +int __metal_clic0_interrupt_clear (struct __metal_driver_sifive_clic0 *clic, int id) +{ + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + if ((id >= METAL_INTERRUPT_ID_LC0) && (id < num_subinterrupts)) { + } + return 0; +} + +void __metal_clic0_configure_privilege (struct __metal_driver_sifive_clic0 *clic, metal_priv_mode priv) +{ + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + + cfg.nmbits = priv; + __metal_clic0_configuration(clic, &cfg); +} + +void __metal_clic0_configure_level (struct __metal_driver_sifive_clic0 *clic, int level) +{ + struct __metal_clic_cfg cfg = __metal_clic0_configuration(clic, NULL); + + cfg.nlbits = level; + __metal_clic0_configuration(clic, &cfg); +} + +unsigned long long __metal_clic0_mtime_get (struct __metal_driver_sifive_clic0 *clic) +{ + __metal_io_u32 lo, hi; + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + + /* Guard against rollover when reading */ + do { + hi = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_SIFIVE_CLIC0_MTIME + 4)); + lo = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_SIFIVE_CLIC0_MTIME)); + } while (__METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + METAL_SIFIVE_CLIC0_MTIME + 4)) != hi); + + return (((unsigned long long)hi) << 32) | lo; +} + +int __metal_driver_sifive_clic0_mtimecmp_set(struct metal_interrupt *controller, + int hartid, + unsigned long long time) +{ + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + + unsigned long control_base = __metal_driver_sifive_clic0_control_base((struct metal_interrupt *)clic); + /* Per spec, the RISC-V MTIME/MTIMECMP registers are 64 bit, + * and are NOT internally latched for multiword transfers. + * Need to be careful about sequencing to avoid triggering + * spurious interrupts: For that set the high word to a max + * value first. + */ + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_SIFIVE_CLIC0_MTIMECMP_BASE + 4)) = 0xFFFFFFFF; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_SIFIVE_CLIC0_MTIMECMP_BASE)) = (__metal_io_u32)time; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + (8 * hartid) + METAL_SIFIVE_CLIC0_MTIMECMP_BASE + 4)) = (__metal_io_u32)(time >> 32); + return 0; +} + +void __metal_clic0_handler(int id, void *priv) __attribute__((aligned(64))); +void __metal_clic0_handler (int id, void *priv) +{ + int idx; + struct __metal_driver_sifive_clic0 *clic = priv; + int num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts((struct metal_interrupt *)clic); + + idx = id - METAL_INTERRUPT_ID_LC0; + if ( (idx < num_subinterrupts) && (clic->metal_mtvt_table[idx]) ) { + clic->metal_mtvt_table[idx](id, clic->metal_exint_table[idx].exint_data); + } +} + +void __metal_clic0_default_handler (int id, void *priv) { + metal_shutdown(300); +} + +void __metal_driver_sifive_clic0_init (struct metal_interrupt *controller) +{ + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + + if ( !clic->init_done ) { + int level, max_levels, line, num_interrupts, num_subinterrupts; + struct __metal_clic_cfg cfg = __metal_clic_defaultcfg; + struct metal_interrupt *intc = + __metal_driver_sifive_clic0_interrupt_parent(controller); + + /* Initialize ist parent controller, aka cpu_intc. */ + intc->vtable->interrupt_init(intc); + __metal_controller_interrupt_vector(METAL_SELECTIVE_VECTOR_MODE, + &__metal_clic0_handler); + + /* + * Register its interrupts with with parent controller, + * aka sw, timer and ext to its default isr + */ + num_interrupts = __metal_driver_sifive_clic0_num_interrupts(controller); + for (int i = 0; i < num_interrupts; i++) { + line = __metal_driver_sifive_clic0_interrupt_lines(controller, i); + intc->vtable->interrupt_register(intc, line, NULL, clic); + } + + /* Default CLIC mode to per dts */ + max_levels = __metal_driver_sifive_clic0_max_levels(controller); + cfg.nlbits = (max_levels > METAL_CLIC_MAX_NLBITS) ? + METAL_CLIC_MAX_NLBITS : max_levels; + __metal_clic0_configuration(clic, &cfg); + + level = (1 << cfg.nlbits) - 1; + num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts(controller); + for (int i = 0; i < num_subinterrupts; i++) { + clic->metal_mtvt_table[i] = NULL; + clic->metal_exint_table[i].sub_int = NULL; + clic->metal_exint_table[i].exint_data = NULL; + __metal_clic0_interrupt_disable(clic, i); + __metal_clic0_interrupt_set_level(clic, i, level); + } + clic->init_done = 1; + } +} + +int __metal_driver_sifive_clic0_register (struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + int rc = -1; + int num_subinterrupts; + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + struct metal_interrupt *intc = + __metal_driver_sifive_clic0_interrupt_parent(controller); + + /* Register its interrupts with parent controller */ + if ( id < METAL_INTERRUPT_ID_LC0) { + return intc->vtable->interrupt_register(intc, id, isr, priv); + } + + /* + * CLIC (sub-interrupts) devices interrupts start at 16 but offset from 0 + * Reset the IDs to reflects this. + */ + id -= METAL_INTERRUPT_ID_LC0; + num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts(controller); + if (id < num_subinterrupts) { + if ( isr) { + clic->metal_mtvt_table[id] = isr; + clic->metal_exint_table[id].exint_data = priv; + } else { + clic->metal_mtvt_table[id] = __metal_clic0_default_handler; + clic->metal_exint_table[id].sub_int = priv; + } + rc = 0; + } + return rc; +} + +int __metal_driver_sifive_clic0_enable (struct metal_interrupt *controller, int id) +{ + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + return __metal_clic0_interrupt_enable(clic, id); +} + +int __metal_driver_sifive_clic0_disable (struct metal_interrupt *controller, int id) +{ + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + return __metal_clic0_interrupt_disable(clic, id); +} + +int __metal_driver_sifive_clic0_enable_interrupt_vector(struct metal_interrupt *controller, + int id, metal_vector_mode mode) +{ + int num_subinterrupts; + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + + if (id == METAL_INTERRUPT_ID_BASE) { + if (mode == METAL_SELECTIVE_VECTOR_MODE) { + __metal_controller_interrupt_vector(mode, &__metal_clic0_handler); + return 0; + } + if (mode == METAL_HARDWARE_VECTOR_MODE) { + __metal_controller_interrupt_vector(mode, &clic->metal_mtvt_table); + return 0; + } + } + num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts(controller); + if ((id >= METAL_INTERRUPT_ID_LC0) && (id < num_subinterrupts)) { + if ((mode == METAL_SELECTIVE_VECTOR_MODE) && + __metal_controller_interrupt_is_selective_vectored()) { + __metal_clic0_interrupt_set_vector(clic, id, METAL_ENABLE); + return 0; + } + + } + return -1; +} + +int __metal_driver_sifive_clic0_disable_interrupt_vector(struct metal_interrupt *controller, int id) +{ + int num_subinterrupts; + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + + if (id == METAL_INTERRUPT_ID_BASE) { + __metal_controller_interrupt_vector(METAL_SELECTIVE_VECTOR_MODE, &__metal_clic0_handler); + return 0; + } + num_subinterrupts = __metal_driver_sifive_clic0_num_subinterrupts(controller); + if ((id >= METAL_INTERRUPT_ID_LC0) && (id < num_subinterrupts)) { + if (__metal_controller_interrupt_is_selective_vectored()) { + __metal_clic0_interrupt_set_vector(clic, id, METAL_DISABLE); + return 0; + } + } + return -1; +} + +int __metal_driver_sifive_clic0_command_request (struct metal_interrupt *controller, + int command, void *data) +{ + int hartid; + int rc = -1; + struct __metal_driver_sifive_clic0 *clic = + (struct __metal_driver_sifive_clic0 *)(controller); + unsigned long control_base = __metal_driver_sifive_clic0_control_base(controller); + + switch (command) { + case METAL_TIMER_MTIME_GET: + if (data) { + *(unsigned long long *)data = __metal_clic0_mtime_get(clic); + rc = 0; + } + break; + case METAL_SOFTWARE_IPI_CLEAR: + if (data) { + hartid = *(int *)data; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))) = METAL_DISABLE; + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIP_BASE)) = METAL_DISABLE; + rc = 0; + } + break; + case METAL_SOFTWARE_IPI_SET: + if (data) { + hartid = *(int *)data; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))) = METAL_ENABLE; + __METAL_ACCESS_ONCE((__metal_io_u8 *)(control_base + + METAL_SIFIVE_CLIC0_MMODE_APERTURE + + METAL_SIFIVE_CLIC0_CLICINTIP_BASE)) = METAL_ENABLE; + rc = 0; + } + break; + case METAL_SOFTWARE_MSIP_GET: + rc = 0; + if (data) { + hartid = *(int *)data; + rc = __METAL_ACCESS_ONCE((__metal_io_u32 *)(control_base + + (hartid * 4))); + } + break; + default: + break; + } + + return rc; +} +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_clic0) = { + .clic_vtable.interrupt_init = __metal_driver_sifive_clic0_init, + .clic_vtable.interrupt_register = __metal_driver_sifive_clic0_register, + .clic_vtable.interrupt_enable = __metal_driver_sifive_clic0_enable, + .clic_vtable.interrupt_disable = __metal_driver_sifive_clic0_disable, + .clic_vtable.interrupt_vector_enable = __metal_driver_sifive_clic0_enable_interrupt_vector, + .clic_vtable.interrupt_vector_disable = __metal_driver_sifive_clic0_disable_interrupt_vector, + .clic_vtable.command_request = __metal_driver_sifive_clic0_command_request, + .clic_vtable.mtimecmp_set = __metal_driver_sifive_clic0_mtimecmp_set, +}; + +#endif /* METAL_SIFIVE_CLIC0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfrosc.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfrosc.c new file mode 100644 index 000000000..14ce2fae6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfrosc.c @@ -0,0 +1,42 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_FE310_G000_HFROSC + +#include +#include + +#define CONFIG_DIVIDER 0x0000003FUL +#define CONFIG_TRIM 0x001F0000UL +#define CONFIG_ENABLE 0x40000000UL +#define CONFIG_READY 0x80000000UL + +long __metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz(const struct metal_clock *clock) +{ + struct metal_clock *ref = __metal_driver_sifive_fe310_g000_hfrosc_ref(clock); + long config_offset = __metal_driver_sifive_fe310_g000_hfrosc_config_offset(clock); + struct __metal_driver_sifive_fe310_g000_prci *config_base = + __metal_driver_sifive_fe310_g000_hfrosc_config_base(clock); + const struct __metal_driver_vtable_sifive_fe310_g000_prci *vtable = + __metal_driver_sifive_fe310_g000_prci_vtable(); + long cfg = vtable->get_reg(config_base, config_offset); + + if (cfg & CONFIG_ENABLE == 0) + return -1; + if (cfg & CONFIG_READY == 0) + return -1; + return metal_clock_get_rate_hz(ref) / ((cfg & CONFIG_DIVIDER) + 1); +} + +long __metal_driver_sifive_fe310_g000_hfrosc_set_rate_hz(struct metal_clock *clock, long rate) +{ + return __metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz(clock); +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfrosc) = { + .clock.get_rate_hz = &__metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz, + .clock.set_rate_hz = &__metal_driver_sifive_fe310_g000_hfrosc_set_rate_hz, +}; +#endif /* METAL_SIFIVE_FE310_G000_HFROSC */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfxosc.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfxosc.c new file mode 100644 index 000000000..dbe467487 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_hfxosc.c @@ -0,0 +1,41 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_FE310_G000_HFXOSC + +#include +#include + +#define CONFIG_ENABLE 0x40000000UL +#define CONFIG_READY 0x80000000UL + +long __metal_driver_sifive_fe310_g000_hfxosc_get_rate_hz(const struct metal_clock *clock) +{ + struct metal_clock *ref = __metal_driver_sifive_fe310_g000_hfxosc_ref(clock); + long config_offset = __metal_driver_sifive_fe310_g000_hfxosc_config_offset(clock); + struct __metal_driver_sifive_fe310_g000_prci *config_base = + __metal_driver_sifive_fe310_g000_hfxosc_config_base(clock); + const struct __metal_driver_vtable_sifive_fe310_g000_prci *vtable = + __metal_driver_sifive_fe310_g000_prci_vtable(); + long cfg = vtable->get_reg(config_base, config_offset); + + if (cfg & CONFIG_ENABLE == 0) + return -1; + if (cfg & CONFIG_READY == 0) + return -1; + return metal_clock_get_rate_hz(ref); +} + +long __metal_driver_sifive_fe310_g000_hfxosc_set_rate_hz(struct metal_clock *clock, long rate) +{ + return __metal_driver_sifive_fe310_g000_hfxosc_get_rate_hz(clock); +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfxosc) = { + .clock.get_rate_hz = __metal_driver_sifive_fe310_g000_hfxosc_get_rate_hz, + .clock.set_rate_hz = __metal_driver_sifive_fe310_g000_hfxosc_set_rate_hz, +}; + +#endif /* METAL_SIFIVE_FE310_G000_HFXOSC */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_pll.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_pll.c new file mode 100644 index 000000000..c91328565 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_pll.c @@ -0,0 +1,360 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_FE310_G000_PLL + +#include +#include + +#include +#include +#include + +#define PLL_R 0x00000007UL +#define PLL_F 0x000003F0UL +#define PLL_Q 0x00000C00UL +#define PLL_SEL 0x00010000UL +#define PLL_REFSEL 0x00020000UL +#define PLL_BYPASS 0x00040000UL +#define PLL_LOCK 0x80000000UL + +#define DIV_DIV 0x0000003FUL +#define DIV_1 0x00000100UL + +#define PLL_R_SHIFT(r) ((r << 0) & PLL_R) +#define PLL_F_SHIFT(f) ((f << 4) & PLL_F) +#define PLL_Q_SHIFT(q) ((q << 10) & PLL_Q) +#define PLL_DIV_SHIFT(d) ((d << 0) & DIV_DIV) + +struct pll_config_t { + unsigned long multiplier; + unsigned long divisor; + unsigned long min_input_rate; + unsigned long max_input_rate; + unsigned long r; + unsigned long f; + unsigned long q; + long d; /* < 0 if disabled */ +}; + +static const struct pll_config_t pll_configs[] = { + /* + * multiplier + * ^ divisor + * | ^ min_input_rate + * | | ^ max_input_rate + * | | | ^ r + * | | | | ^ f + * | | | | | ^ q + * | | | | | | ^ d + * | | | | | | | ^ + * | | | | | | | | */ + { 1, 32, 12000000, 24000000, 1, 31, 3, 63}, + { 1, 32, 24000000, 48000000, 3, 31, 2, 63}, + { 1, 16, 6000000, 12000000, 0, 31, 3, 63}, + { 1, 16, 12000000, 24000000, 1, 31, 2, 63}, + { 1, 16, 24000000, 48000000, 3, 31, 2, 31}, + { 1, 8, 6000000, 12000000, 0, 31, 3, 31}, + { 1, 8, 12000000, 24000000, 1, 31, 2, 31}, + { 1, 8, 24000000, 48000000, 3, 31, 2, 15}, + { 1, 4, 6000000, 12000000, 0, 31, 3, 15}, + { 1, 4, 12000000, 24000000, 1, 31, 2, 15}, + { 1, 4, 24000000, 48000000, 3, 31, 2, 7}, + { 1, 2, 6000000, 12000000, 0, 31, 2, 15}, + { 1, 2, 12000000, 24000000, 1, 31, 1, 15}, + { 1, 2, 24000000, 48000000, 3, 31, 1, 7}, + { 2, 1, 6000000, 12000000, 0, 31, 1, 7}, + { 2, 1, 12000000, 24000000, 1, 31, 1, 3}, + { 2, 1, 24000000, 48000000, 3, 31, 3, -1}, + { 4, 1, 6000000, 12000000, 0, 31, 3, 0}, + { 4, 1, 12000000, 24000000, 1, 31, 3, -1}, + { 4, 1, 24000000, 48000000, 3, 31, 2, -1}, + { 6, 1, 6000000, 10666666, 0, 35, 1, 2}, + { 6, 1, 10666666, 12000000, 0, 23, 3, -1}, + { 6, 1, 12000000, 16000000, 1, 47, 3, -1}, + { 6, 1, 16000000, 18000000, 1, 23, 2, -1}, + { 6, 1, 18000000, 21333333, 2, 35, 2, -1}, + { 8, 1, 6000000, 12000000, 0, 31, 3, -1}, + { 8, 1, 12000000, 24000000, 1, 31, 2, -1}, + { 8, 1, 24000000, 48000000, 3, 31, 1, -1}, + {10, 1, 6000000, 9600000, 0, 39, 3, -1}, + {10, 1, 9600000, 12000000, 0, 19, 2, -1}, + {10, 1, 12000000, 19200000, 1, 39, 2, -1}, + {10, 1, 19200000, 24000000, 1, 19, 1, -1}, + {10, 1, 24000000, 38400000, 3, 39, 1, -1}, + {12, 1, 6000000, 8000000, 0, 47, 3, -1}, + {12, 1, 8000000, 12000000, 0, 23, 2, -1}, + {12, 1, 12000000, 16000000, 1, 47, 2, -1}, + {12, 1, 16000000, 24000000, 1, 23, 1, -1}, + {12, 1, 24000000, 30000000, 3, 47, 1, -1}, + {12, 1, 30000000, 32000000, 3, 47, 1, -1}, + {14, 1, 6000000, 6857142, 0, 55, 3, -1}, + {14, 1, 6857143, 12000000, 0, 27, 2, -1}, + {14, 1, 12000000, 13714285, 1, 55, 2, -1}, + {14, 1, 13714286, 24000000, 1, 27, 1, -1}, + {14, 1, 24000000, 27428571, 3, 55, 1, -1}, + {16, 1, 6000000, 12000000, 0, 31, 2, -1}, + {16, 1, 12000000, 24000000, 1, 31, 1, -1}, + {18, 1, 6000000, 10666666, 0, 35, 2, -1}, + {18, 1, 10666667, 12000000, 0, 17, 1, -1}, + {18, 1, 12000000, 21333333, 1, 35, 1, -1}, + {20, 1, 6000000, 9600000, 0, 39, 2, -1}, + {20, 1, 9600000, 12000000, 0, 19, 1, -1}, + {20, 1, 12000000, 19200000, 1, 39, 1, -1}, + {22, 1, 6000000, 8727272, 0, 43, 2, -1}, + {22, 1, 8727273, 12000000, 0, 21, 1, -1}, + {22, 1, 12000000, 17454545, 1, 43, 1, -1}, + {24, 1, 6000000, 8000000, 0, 47, 2, -1}, + {24, 1, 8000000, 12000000, 0, 23, 1, -1}, + {24, 1, 12000000, 16000000, 1, 47, 1, -1}, + {26, 1, 6000000, 7384615, 0, 51, 2, -1}, + {26, 1, 7384616, 12000000, 0, 25, 1, -1}, + {26, 1, 12000000, 14768230, 1, 51, 1, -1}, + {28, 1, 6000000, 6857142, 0, 55, 2, -1}, + {28, 1, 6857143, 12000000, 0, 27, 1, -1}, + {28, 1, 12000000, 13714285, 1, 55, 1, -1}, + {30, 1, 6000000, 6400000, 0, 59, 2, -1}, + {30, 1, 6400000, 12000000, 0, 29, 1, -1}, + {30, 1, 12000000, 12800000, 1, 59, 1, -1}, + {32, 1, 6000000, 12000000, 0, 31, 1, -1} +}; + +#define PLL_CONFIG_NOT_VALID -1 + +void __metal_driver_sifive_fe310_g000_pll_init(struct __metal_driver_sifive_fe310_g000_pll *pll); + +/* Given the rate of the PLL input frequency and a PLL configuration, what + * will the resulting PLL output frequency be? + * Arguments: + * - pll_input_rate the PLL input frequency in hertz + * - config the PLL configuration + * Returns: + * - PLL_CONFIG_NOT_VALID if the configuration is not valid for the input frequency + * - the output frequency, in hertz */ +static long get_pll_config_freq(long pll_input_rate, const struct pll_config_t *config) +{ + if(pll_input_rate < config->min_input_rate || pll_input_rate > config->max_input_rate) + return PLL_CONFIG_NOT_VALID; + + return pll_input_rate * config->multiplier / config->divisor; +} + +#ifdef __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE + +static void metal_sifive_fe310_g000_pll_init(void) __attribute__((constructor)); +static void metal_sifive_fe310_g000_pll_init(void) { + long init_rate = __metal_driver_sifive_fe310_g000_pll_init_rate(); + /* If the PLL init_rate is zero, don't initialize the PLL */ + if(init_rate != 0) + __metal_driver_sifive_fe310_g000_pll_init(__METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE); +} + +#endif /* __METAL_DT_SIFIVE_FE310_G000__PLL_HANDLE */ + +void __metal_driver_sifive_fe310_g000_pll_init(struct __metal_driver_sifive_fe310_g000_pll *pll) { + struct metal_clock *pllref = __metal_driver_sifive_fe310_g000_pll_pllref(&(pll->clock)); + long init_rate = __metal_driver_sifive_fe310_g000_pll_init_rate(); + long config_offset = __metal_driver_sifive_fe310_g000_pll_config_offset(); + long base = __metal_driver_sifive_fe310_g000_prci_base(); + + __metal_io_u32 *pllcfg = (__metal_io_u32 *) (base + config_offset); + + /* If the PLL clock has had a _pre_rate_change_callback configured, call it */ + if(pll->clock._pre_rate_change_callback != NULL) + pll->clock._pre_rate_change_callback(pll->clock._pre_rate_change_callback_priv); + + /* If we're running off of the PLL, switch off before we start configuring it*/ + if((__METAL_ACCESS_ONCE(pllcfg) & PLL_SEL) == 0) + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_SEL); + + /* Make sure we're running off of the external oscillator for stability */ + if(pllref != NULL) + __METAL_ACCESS_ONCE(pllcfg) |= PLL_REFSEL; + + /* Configure the PLL to run at the requested init frequency. + * Using the vtable instead of the user API because we want to control + * when the callbacks occur. */ + pll->clock.vtable->set_rate_hz(&(pll->clock), init_rate); + + /* If the PLL clock has had a rate_change_callback configured, call it */ + if(pll->clock._post_rate_change_callback != NULL) + pll->clock._post_rate_change_callback(pll->clock._post_rate_change_callback_priv); +} + +long __metal_driver_sifive_fe310_g000_pll_get_rate_hz(const struct metal_clock *clock) +{ + struct metal_clock *pllref = __metal_driver_sifive_fe310_g000_pll_pllref(clock); + struct metal_clock *pllsel0 = __metal_driver_sifive_fe310_g000_pll_pllsel0(clock); + long config_offset = __metal_driver_sifive_fe310_g000_pll_config_offset(clock); + struct __metal_driver_sifive_fe310_g000_prci *config_base = + __metal_driver_sifive_fe310_g000_pll_config_base(clock); + long divider_offset = __metal_driver_sifive_fe310_g000_pll_divider_offset(clock); + struct __metal_driver_sifive_fe310_g000_prci *divider_base = + __metal_driver_sifive_fe310_g000_pll_divider_base(clock); + const struct __metal_driver_vtable_sifive_fe310_g000_prci *vtable = + __metal_driver_sifive_fe310_g000_prci_vtable(); + + long cfg = vtable->get_reg(config_base, config_offset); + long div = vtable->get_reg(divider_base, divider_offset); + + /* At the end of the PLL there's one big mux: it either selects the HFROSC + * (bypassing the PLL entirely) or uses the PLL. */ + if (__METAL_GET_FIELD(cfg, PLL_SEL) == 0) + return metal_clock_get_rate_hz(pllsel0); + + /* There's a clock mux before the PLL that selects between the HFROSC adn + * the HFXOSC as the PLL's input clock. */ + long ref_hz = metal_clock_get_rate_hz(__METAL_GET_FIELD(cfg, PLL_REFSEL) ? pllref : pllsel0); + + /* It's possible to bypass the PLL, which is an internal bpyass. This + * still obays the PLL's input clock mu. */ + if (__METAL_GET_FIELD(cfg, PLL_BYPASS)) + return ref_hz; + + /* Logically the PLL is a three stage div-mul-div. */ + long div_r = __METAL_GET_FIELD(cfg, PLL_R) + 1; + long mul_f = 2 * (__METAL_GET_FIELD(cfg, PLL_F) + 1); + if (__METAL_GET_FIELD(cfg, PLL_Q) == 0) + return -1; + long div_q = 1 << __METAL_GET_FIELD(cfg, PLL_Q); + + /* In addition to the dividers inherent in the PLL, there's an additional + * clock divider that lives after the PLL and lets us pick a more + * interesting range of frequencies. */ + long pllout = (((ref_hz / div_r) * mul_f) / div_q); + if (__METAL_GET_FIELD(div, DIV_1)) + return pllout; + + return pllout / (2 * (__METAL_GET_FIELD(div, DIV_DIV) + 1)); +} + +/* Find a valid configuration for the PLL which is closest to the desired + * output frequency. + * Arguments: + * - ref_hz PLL input frequency + * - rate desired PLL output frequency + * Returns: + * -1 if no valid configuration is available + * the index into pll_configs of a valid configuration */ +static int find_closest_config(long ref_hz, long rate) +{ + int closest_index = -1; + long closest_diff = LONG_MAX; + + /* We're probably trying for a fast output frequency, so start from + * the high end of the configs. */ + for(int i = (sizeof(pll_configs) / sizeof(pll_configs[0])) - 1; i >= 0; i--) + { + long config_freq = get_pll_config_freq(ref_hz, &(pll_configs[i])); + if(config_freq != PLL_CONFIG_NOT_VALID) + { + long freq_diff = abs(config_freq - rate); + if(freq_diff < closest_diff) + { + closest_index = i; + closest_diff = freq_diff; + } + } + } + + return closest_index; +} + +/* Configure the PLL and wait for it to lock */ +static void configure_pll(__metal_io_u32 *pllcfg, __metal_io_u32 *plloutdiv, const struct pll_config_t *config) +{ + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_R); + __METAL_ACCESS_ONCE(pllcfg) |= PLL_R_SHIFT(config->r); + + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_F); + __METAL_ACCESS_ONCE(pllcfg) |= PLL_F_SHIFT(config->f); + + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_Q); + __METAL_ACCESS_ONCE(pllcfg) |= PLL_Q_SHIFT(config->q); + + if(config->d < 0) + { + /* disable final divider */ + __METAL_ACCESS_ONCE(plloutdiv) |= DIV_1; + + __METAL_ACCESS_ONCE(plloutdiv) &= ~(DIV_DIV); + __METAL_ACCESS_ONCE(plloutdiv) |= PLL_DIV_SHIFT(1); + } + else + { + __METAL_ACCESS_ONCE(plloutdiv) &= ~(DIV_1); + + __METAL_ACCESS_ONCE(plloutdiv) &= ~(DIV_DIV); + __METAL_ACCESS_ONCE(plloutdiv) |= PLL_DIV_SHIFT(config->d); + } + + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_BYPASS); + + /* Wait for PLL to lock */ + while((__METAL_ACCESS_ONCE(pllcfg) & PLL_LOCK) == 0) ; +} + +long __metal_driver_sifive_fe310_g000_pll_set_rate_hz(struct metal_clock *clock, long rate) +{ + struct metal_clock *pllref = __metal_driver_sifive_fe310_g000_pll_pllref(clock); + struct metal_clock *pllsel0 = __metal_driver_sifive_fe310_g000_pll_pllsel0(clock); + long config_offset = __metal_driver_sifive_fe310_g000_pll_config_offset(clock); + long divider_offset = __metal_driver_sifive_fe310_g000_pll_divider_offset(clock); + long base = __metal_driver_sifive_fe310_g000_prci_base(); + + __metal_io_u32 *pllcfg = (__metal_io_u32 *) (base + config_offset); + __metal_io_u32 *plloutdiv = (__metal_io_u32 *) (base + divider_offset); + + /* We can't modify the PLL if coreclk is driven by it, so switch it off */ + if (__METAL_ACCESS_ONCE(pllcfg) & PLL_SEL) + __METAL_ACCESS_ONCE(pllcfg) &= ~(PLL_SEL); + + /* There's a clock mux before the PLL that selects between the HFROSC and + * the HFXOSC as the PLL's input clock. */ + long ref_hz = metal_clock_get_rate_hz(__METAL_ACCESS_ONCE(pllcfg) & PLL_REFSEL ? pllref : pllsel0); + + /* if the desired rate is within 75%-125% of the input clock, bypass the PLL */ + if((ref_hz * 3 / 4) <= rate && (ref_hz * 5 / 4) >= rate) + { + __METAL_ACCESS_ONCE(pllcfg) |= PLL_BYPASS; + } + else + { + int config_index = find_closest_config(ref_hz, rate); + if(config_index != -1) + { + configure_pll(pllcfg, plloutdiv, &(pll_configs[config_index])); + } + else + { + /* unable to find a valid configuration */ + __METAL_ACCESS_ONCE(pllcfg) |= PLL_BYPASS; + } + } + + /* Enable the PLL */ + __METAL_ACCESS_ONCE(pllcfg) |= PLL_SEL; + + return __metal_driver_sifive_fe310_g000_pll_get_rate_hz(clock); +} + +#ifdef __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE +static void use_hfxosc(void) __attribute__((constructor)); +static void use_hfxosc(void) +{ + long init_rate = __metal_driver_sifive_fe310_g000_pll_init_rate(); + metal_clock_set_rate_hz( + &__METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE->clock, init_rate + ); +} +#endif + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_pll) = { + .init = __metal_driver_sifive_fe310_g000_pll_init, + .clock.get_rate_hz = __metal_driver_sifive_fe310_g000_pll_get_rate_hz, + .clock.set_rate_hz = __metal_driver_sifive_fe310_g000_pll_set_rate_hz, +}; + +#endif /* METAL_SIFIVE_FE310_G000_PLL */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_prci.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_prci.c new file mode 100644 index 000000000..4b402a27a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fe310-g000_prci.c @@ -0,0 +1,26 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_FE310_G000_PRCI + +#include +#include + +long __metal_driver_sifive_fe310_g000_prci_get_reg(const struct __metal_driver_sifive_fe310_g000_prci *prci, long offset) { + unsigned long base = __metal_driver_sifive_fe310_g000_prci_base(); + return __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + offset)); +} + +long __metal_driver_sifive_fe310_g000_prci_set_reg(const struct __metal_driver_sifive_fe310_g000_prci *prci, long offset, long value) { + unsigned long base = __metal_driver_sifive_fe310_g000_prci_base(); + return __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + offset)) = value; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_prci) = { + .get_reg = __metal_driver_sifive_fe310_g000_prci_get_reg, + .set_reg = __metal_driver_sifive_fe310_g000_prci_set_reg, +}; + +#endif /* METAL_SIFIVE_FE310_G000_PRCI */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fu540-c000_l2.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fu540-c000_l2.c new file mode 100644 index 000000000..5e66b6cda --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_fu540-c000_l2.c @@ -0,0 +1,81 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +#define L2_CONFIG_WAYS_SHIFT 8 +#define L2_CONFIG_WAYS_MASK (0xFF << L2_CONFIG_WAYS_SHIFT) + +#ifdef CONFIG_SIFIVE_FU540_C000_L2 + +static void metal_driver_sifive_fu540_c000_l2_init(void) __attribute__((constructor)); +static void metal_driver_sifive_fu540_c000_l2_init(void) +{ +#ifdef __METAL_DT_SIFIVE_FU540_C000_L2_HANDLE + /* Get the handle for the L2 cache controller */ + struct __metal_driver_sifive_fu540_c000_l2 *l2 = __METAL_DT_SIFIVE_FU540_C000_L2_HANDLE; + if(!l2) { + return; + } + + /* Get the number of available ways per bank */ + uint32_t ways = __METAL_ACCESS_ONCE((__metal_io_u32 *)(l2->control_base + SIFIVE_FU540_C000_L2_CONFIG)); + ways = ((ways & L2_CONFIG_WAYS_MASK) >> L2_CONFIG_WAYS_SHIFT); + + /* Enable all the ways */ + __metal_driver_sifive_fu540_c000_l2_init(l2, ways); +#endif +} + +void __metal_driver_sifive_fu540_c000_l2_init(struct metal_cache *l2, int ways) +{ + metal_cache_set_enabled_ways(l2, ways); +} + +int __metal_driver_sifive_fu540_c000_l2_get_enabled_ways(struct metal_cache *cache) +{ + struct __metal_driver_sifive_fu540_c000_l2 *l2 = (struct __metal_driver_sifive_fu540_c000_l2 *) cache; + if(!l2) { + return -1; + } + + uint32_t way_enable = __METAL_ACCESS_ONCE((__metal_io_u32 *)(l2->control_base + SIFIVE_FU540_C000_L2_WAYENABLE)); + + /* The stored number is the index, so add one */ + return (0xFF & way_enable) + 1; +} + +int __metal_driver_sifive_fu540_c000_l2_set_enabled_ways(struct metal_cache *cache, int ways) +{ + struct __metal_driver_sifive_fu540_c000_l2 *l2 = (struct __metal_driver_sifive_fu540_c000_l2 *) cache; + if(!l2) { + return -1; + } + + /* We can't decrease the number of enabled ways */ + if(metal_cache_get_enabled_ways(cache) > ways) { + return -2; + } + + /* The stored value is the index, so subtract one */ + uint32_t value = 0xFF & (ways - 1); + + /* Set the number of enabled ways */ + __METAL_ACCESS_ONCE((__metal_io_u32 *)(l2->control_base + SIFIVE_FU540_C000_L2_WAYENABLE)) = value; + + /* Make sure the number of ways was set correctly */ + if(metal_cache_get_enabled_ways(cache) != ways) { + return -3; + } + + return 0; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fu540_c000_l2) = { + .cache.init = __metal_driver_sifive_fu540_c000_l2_init, + .cache.get_enabled_ways = __metal_driver_sifive_fu540_c000_l2_get_enabled_ways, + .cache.set_enabled_ways = __metal_driver_sifive_fu540_c000_l2_set_enabled_ways, +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_global-external-interrupts0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_global-external-interrupts0.c new file mode 100644 index 000000000..59f6fbe48 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_global-external-interrupts0.c @@ -0,0 +1,120 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0 + +#include +#include +#include +#include + +void __metal_driver_sifive_global_external_interrupt_init(struct metal_interrupt *controller) +{ + struct __metal_driver_sifive_global_external_interrupts0 *global0; + + global0 = (struct __metal_driver_sifive_global_external_interrupts0 *)(controller); + if ( !global0->init_done ) { + struct metal_interrupt *intc = + __metal_driver_sifive_global_external_interrupts0_interrupt_parent(controller); + + if (intc) { + intc->vtable->interrupt_init(intc); + /* Register its interrupts with with parent controller */ + for (int i = 0; + i < __metal_driver_sifive_global_external_interrupts0_num_interrupts(controller); + i++) { + intc->vtable->interrupt_register(intc, + __metal_driver_sifive_global_external_interrupts0_interrupt_lines(controller, i), + NULL, controller); + } + global0->init_done = 1; + } + } +} + +int __metal_driver_sifive_global_external_interrupt_register(struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_global_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_register(intc, id, isr, priv); + } + } + return rc; +} + +int __metal_driver_sifive_global_external_interrupt_enable(struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_global_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_enable(intc, id); + } + } + return rc; +} + +int __metal_driver_sifive_global_external_interrupt_disable(struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_global_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_disable(intc, id); + } + } + return rc; +} + +int __metal_driver_sifive_global_external_command_request (struct metal_interrupt *controller, + int command, void *data) +{ + int idx; + int rc = -1; + + switch (command) { + case METAL_MAX_INTERRUPT_GET: + rc = __metal_driver_sifive_global_external_interrupts0_num_interrupts(controller); + break; + case METAL_INDEX_INTERRUPT_GET: + rc = 0; + if (data) { + idx = *(int *)data; + rc = __metal_driver_sifive_global_external_interrupts0_interrupt_lines(controller, idx); + } + break; + default: + break; + } + + return rc; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_global_external_interrupts0) = { + .global0_vtable.interrupt_init = __metal_driver_sifive_global_external_interrupt_init, + .global0_vtable.interrupt_register = __metal_driver_sifive_global_external_interrupt_register, + .global0_vtable.interrupt_enable = __metal_driver_sifive_global_external_interrupt_enable, + .global0_vtable.interrupt_disable = __metal_driver_sifive_global_external_interrupt_disable, + .global0_vtable.command_request = __metal_driver_sifive_global_external_command_request, +}; + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-buttons.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-buttons.c new file mode 100644 index 000000000..fbb6c92a7 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-buttons.c @@ -0,0 +1,55 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_GPIO_BUTTONS + +#include +#include +#include +#include + +int __metal_driver_button_exist (struct metal_button *button, char *label) +{ + if (strcmp(__metal_driver_sifive_gpio_button_label(button), label) == 0) { + return 1; + } + return 0; +} + +struct metal_interrupt * +__metal_driver_button_interrupt_controller(struct metal_button *button) +{ + return __metal_driver_sifive_gpio_button_interrupt_controller(button); +} + +int __metal_driver_button_get_interrupt_id(struct metal_button *button) +{ + int irq, max_irq; + struct metal_interrupt *irc; + + irq = __metal_driver_sifive_gpio_button_interrupt_line(button); + irc = __metal_driver_sifive_gpio_button_interrupt_controller(button); + + if (irc != NULL) { + max_irq = _metal_interrupt_command_request(irc, + METAL_MAX_INTERRUPT_GET, + NULL); + + if (irq < max_irq) { + return _metal_interrupt_command_request(irc, + METAL_INDEX_INTERRUPT_GET, + (void *)&irq); + } + } + return METAL_INTERRUPT_ID_LCMX; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_button) = { + .button_vtable.button_exist = __metal_driver_button_exist, + .button_vtable.interrupt_controller = __metal_driver_button_interrupt_controller, + .button_vtable.get_interrupt_id = __metal_driver_button_get_interrupt_id, +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-leds.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-leds.c new file mode 100644 index 000000000..68f72d5bd --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-leds.c @@ -0,0 +1,83 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_GPIO_LEDS + +#include +#include +#include +#include + +int __metal_driver_led_exist (struct metal_led *led, char *label) +{ + if (strcmp(__metal_driver_sifive_gpio_led_label(led), label) == 0) { + return 1; + } + return 0; +} + +void __metal_driver_led_enable (struct metal_led *led) +{ + int pin; + struct metal_gpio *gpio; + + pin = __metal_driver_sifive_gpio_led_pin(led); + gpio = __metal_driver_sifive_gpio_led_gpio(led); + + if (gpio != NULL) { + /* Configure LED as output */ + metal_gpio_disable_input((struct metal_gpio *) gpio, pin); + metal_gpio_enable_output((struct metal_gpio *) gpio, pin); + } +} + +void __metal_driver_led_on (struct metal_led *led) +{ + int pin; + struct metal_gpio *gpio; + + pin = __metal_driver_sifive_gpio_led_pin(led); + gpio = __metal_driver_sifive_gpio_led_gpio(led); + + if (gpio != NULL) { + metal_gpio_set_pin((struct metal_gpio *) gpio, pin, 1); + } +} + +void __metal_driver_led_off (struct metal_led *led) +{ + int pin; + struct metal_gpio *gpio; + + pin = __metal_driver_sifive_gpio_led_pin(led); + gpio = __metal_driver_sifive_gpio_led_gpio(led); + + if (gpio != NULL) { + metal_gpio_set_pin((struct metal_gpio *) gpio, pin, 0); + } +} + +void __metal_driver_led_toggle (struct metal_led *led) +{ + int pin; + struct metal_gpio *gpio; + + pin = __metal_driver_sifive_gpio_led_pin(led); + gpio = __metal_driver_sifive_gpio_led_gpio(led); + + if (gpio != NULL) { + metal_gpio_toggle_pin((struct metal_gpio *) gpio, pin); + } +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_led) = { + .led_vtable.led_exist = __metal_driver_led_exist, + .led_vtable.led_enable = __metal_driver_led_enable, + .led_vtable.led_on = __metal_driver_led_on, + .led_vtable.led_off = __metal_driver_led_off, + .led_vtable.led_toggle = __metal_driver_led_toggle, +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-switches.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-switches.c new file mode 100644 index 000000000..b9302529d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio-switches.c @@ -0,0 +1,54 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_GPIO_SWITCHES + +#include +#include +#include +#include + +int __metal_driver_switch_exist (struct metal_switch *flip, char *label) +{ + if (strcmp(__metal_driver_sifive_gpio_switch_label(flip), label) == 0) { + return 1; + } + return 0; +} + +struct metal_interrupt * +__metal_driver_switch_interrupt_controller(struct metal_switch *flip) +{ + return __metal_driver_sifive_gpio_switch_interrupt_controller(flip); +} + +int __metal_driver_switch_get_interrupt_id(struct metal_switch *flip) +{ + int irq, max_irq; + struct metal_interrupt *irc; + + irq = __metal_driver_sifive_gpio_switch_interrupt_line(flip); + irc = __metal_driver_sifive_gpio_switch_interrupt_controller(flip); + if (irc != NULL) { + max_irq = _metal_interrupt_command_request(irc, + METAL_MAX_INTERRUPT_GET, + NULL); + + if (irq < max_irq) { + return _metal_interrupt_command_request(irc, + METAL_INDEX_INTERRUPT_GET, + (void *)&irq); + } + } + return METAL_INTERRUPT_ID_LCMX; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_switch) = { + .switch_vtable.switch_exist = __metal_driver_switch_exist, + .switch_vtable.interrupt_controller = __metal_driver_switch_interrupt_controller, + .switch_vtable.get_interrupt_id = __metal_driver_switch_get_interrupt_id, +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio0.c new file mode 100644 index 000000000..55ff458bf --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_gpio0.c @@ -0,0 +1,85 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_GPIO0 + +#include +#include +#include + +int __metal_driver_sifive_gpio0_disable_input(struct metal_gpio *ggpio, long source) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_INPUT_EN)) &= ~source; + + return 0; +} + +long __metal_driver_sifive_gpio0_output(struct metal_gpio *ggpio) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + return __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_PORT)); +} + +int __metal_driver_sifive_gpio0_enable_output(struct metal_gpio *ggpio, long source) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_OUTPUT_EN)) |= source; + + return 0; +} + +int __metal_driver_sifive_gpio0_output_set(struct metal_gpio *ggpio, long value) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_PORT)) |= value; + + return 0; +} + +int __metal_driver_sifive_gpio0_output_clear(struct metal_gpio *ggpio, long value) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_PORT)) &= ~value; + + return 0; +} + +int __metal_driver_sifive_gpio0_output_toggle(struct metal_gpio *ggpio, long value) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_PORT)) = + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_PORT)) ^ value; + + return 0; +} + +int __metal_driver_sifive_gpio0_enable_io(struct metal_gpio *ggpio, long source, long dest) +{ + long base = __metal_driver_sifive_gpio0_base(ggpio); + + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_IOF_SEL)) &= ~source; + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_GPIO0_IOF_EN)) |= dest; + + return 0; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_gpio0) = { + .gpio.disable_input = __metal_driver_sifive_gpio0_disable_input, + .gpio.output = __metal_driver_sifive_gpio0_output, + .gpio.enable_output = __metal_driver_sifive_gpio0_enable_output, + .gpio.output_set = __metal_driver_sifive_gpio0_output_set, + .gpio.output_clear = __metal_driver_sifive_gpio0_output_clear, + .gpio.output_toggle = __metal_driver_sifive_gpio0_output_toggle, + .gpio.enable_io = __metal_driver_sifive_gpio0_enable_io, +}; + +#endif /* METAL_SIFIVE_GPIO0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_local-external-interrupts0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_local-external-interrupts0.c new file mode 100644 index 000000000..d205957ad --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_local-external-interrupts0.c @@ -0,0 +1,117 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 + +#include +#include +#include + +void __metal_driver_sifive_local_external_interrupt_init(struct metal_interrupt *controller) +{ + struct __metal_driver_sifive_local_external_interrupts0 *local0; + + local0 = (struct __metal_driver_sifive_local_external_interrupts0 *)(controller); + if ( !local0->init_done ) { + struct metal_interrupt *intc = + __metal_driver_sifive_local_external_interrupts0_interrupt_parent(controller); + + if (intc) { + /* Register its interruptswith with parent controller, aka all external to default isr */ + for (int i = 0; + i < __metal_driver_sifive_local_external_interrupts0_num_interrupts(controller); + i++) { + intc->vtable->interrupt_register(intc, + __metal_driver_sifive_local_external_interrupts0_interrupt_lines(controller, i), + NULL, controller); + } + local0->init_done = 1; + } + } +} + +int __metal_driver_sifive_local_external_interrupt_register(struct metal_interrupt *controller, + int id, metal_interrupt_handler_t isr, + void *priv) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_local_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_register(intc, id, isr, priv); + } + } + return rc; +} + +int __metal_driver_sifive_local_external_interrupt_enable(struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_local_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_enable(intc, id); + } + } + return rc; +} + +int __metal_driver_sifive_local_external_interrupt_disable(struct metal_interrupt *controller, int id) +{ + int rc = -1; + + if (id != 0) { + struct metal_interrupt *intc = + __metal_driver_sifive_local_external_interrupts0_interrupt_parent(controller); + + /* Enable its interrupts with parent controller */ + if (intc) { + rc = intc->vtable->interrupt_disable(intc, id); + } + } + return rc; +} + +int __metal_driver_sifive_local_external_command_request (struct metal_interrupt *controller, + int command, void *data) +{ + int idx; + int rc = -1; + + switch (command) { + case METAL_MAX_INTERRUPT_GET: + rc = __metal_driver_sifive_local_external_interrupts0_num_interrupts(controller); + break; + case METAL_INDEX_INTERRUPT_GET: + rc = 0; + if (data) { + idx = *(int *)data; + rc = __metal_driver_sifive_local_external_interrupts0_interrupt_lines(controller, idx); + } + break; + default: + break; + } + + return rc; +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_local_external_interrupts0) = { + .local0_vtable.interrupt_init = __metal_driver_sifive_local_external_interrupt_init, + .local0_vtable.interrupt_register = __metal_driver_sifive_local_external_interrupt_register, + .local0_vtable.interrupt_enable = __metal_driver_sifive_local_external_interrupt_enable, + .local0_vtable.interrupt_disable = __metal_driver_sifive_local_external_interrupt_disable, + .local0_vtable.command_request = __metal_driver_sifive_local_external_command_request, +}; + +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_spi0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_spi0.c new file mode 100644 index 000000000..fd9bc5e91 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_spi0.c @@ -0,0 +1,277 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_SPI0 +#include +#include +#include +#include + +/* Register fields */ +#define METAL_SPI_SCKDIV_MASK 0xFFF + +#define METAL_SPI_SCKMODE_PHA_SHIFT 0 +#define METAL_SPI_SCKMODE_POL_SHIFT 1 + +#define METAL_SPI_CSMODE_MASK 3 +#define METAL_SPI_CSMODE_AUTO 0 +#define METAL_SPI_CSMODE_HOLD 2 +#define METAL_SPI_CSMODE_OFF 3 + +#define METAL_SPI_PROTO_MASK 3 +#define METAL_SPI_PROTO_SINGLE 0 +#define METAL_SPI_PROTO_DUAL 1 +#define METAL_SPI_PROTO_QUAD 2 + +#define METAL_SPI_ENDIAN_LSB 4 + +#define METAL_SPI_DISABLE_RX 8 + +#define METAL_SPI_FRAME_LEN_SHIFT 16 +#define METAL_SPI_FRAME_LEN_MASK (0xF << METAL_SPI_FRAME_LEN_SHIFT) + +#define METAL_SPI_TXDATA_FULL (1 << 31) +#define METAL_SPI_RXDATA_EMPTY (1 << 31) +#define METAL_SPI_TXMARK_MASK 7 +#define METAL_SPI_TXWM 1 +#define METAL_SPI_TXRXDATA_MASK (0xFF) + +#define METAL_SPI_INTERVAL_SHIFT 16 + +#define METAL_SPI_CONTROL_IO 0 +#define METAL_SPI_CONTROL_MAPPED 1 + +#define METAL_SPI_REG(offset) (((unsigned long)control_base + offset)) +#define METAL_SPI_REGB(offset) (__METAL_ACCESS_ONCE((__metal_io_u8 *)METAL_SPI_REG(offset))) +#define METAL_SPI_REGW(offset) (__METAL_ACCESS_ONCE((__metal_io_u32 *)METAL_SPI_REG(offset))) + +#define METAL_SPI_RXDATA_TIMEOUT 1 + +static int configure_spi(struct __metal_driver_sifive_spi0 *spi, struct metal_spi_config *config) +{ + long control_base = __metal_driver_sifive_spi0_control_base((struct metal_spi *)spi); + /* Set protocol */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) &= ~(METAL_SPI_PROTO_MASK); + switch(config->protocol) { + case METAL_SPI_SINGLE: + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) |= METAL_SPI_PROTO_SINGLE; + break; + case METAL_SPI_DUAL: + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) |= METAL_SPI_PROTO_DUAL; + break; + case METAL_SPI_QUAD: + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) |= METAL_SPI_PROTO_QUAD; + break; + default: + /* Unsupported value */ + return -1; + } + + /* Set Polarity */ + if(config->polarity) { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKMODE) |= (1 << METAL_SPI_SCKMODE_PHA_SHIFT); + } else { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKMODE) &= ~(1 << METAL_SPI_SCKMODE_PHA_SHIFT); + } + + /* Set Phase */ + if(config->phase) { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKMODE) |= (1 << METAL_SPI_SCKMODE_POL_SHIFT); + } else { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKMODE) &= ~(1 << METAL_SPI_SCKMODE_POL_SHIFT); + } + + /* Set Endianness */ + if(config->little_endian) { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) |= METAL_SPI_ENDIAN_LSB; + } else { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) &= ~(METAL_SPI_ENDIAN_LSB); + } + + /* Always populate receive FIFO */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) &= ~(METAL_SPI_DISABLE_RX); + + /* Set CS Active */ + if(config->cs_active_high) { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSDEF) = 0; + } else { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSDEF) = 1; + } + + /* Set frame length */ + if((METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) & METAL_SPI_FRAME_LEN_MASK) != (8 << METAL_SPI_FRAME_LEN_SHIFT)) { + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) &= ~(METAL_SPI_FRAME_LEN_MASK); + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FMT) |= (8 << METAL_SPI_FRAME_LEN_SHIFT); + } + + /* Set CS line */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSID) = config->csid; + + /* Toggle off memory-mapped SPI flash mode, toggle on programmable IO mode + * It seems that with this line uncommented, the debugger cannot have access + * to the chip at all because it assumes the chip is in memory-mapped mode. + * I have to compile the code with this line commented and launch gdb, + * reset cores, reset $pc, set *((int *) 0x20004060) = 0, (set the flash + * interface control register to programmable I/O mode) and then continue + * Alternative, comment out the "flash" line in openocd.cfg */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_FCTRL) = METAL_SPI_CONTROL_IO; + + return 0; +} + +int __metal_driver_sifive_spi0_transfer(struct metal_spi *gspi, + struct metal_spi_config *config, + size_t len, + char *tx_buf, + char *rx_buf) +{ + struct __metal_driver_sifive_spi0 *spi = (void *)gspi; + long control_base = __metal_driver_sifive_spi0_control_base(gspi); + int rc = 0; + + rc = configure_spi(spi, config); + if(rc != 0) { + return rc; + } + + /* Hold the chip select line for all len transferred */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSMODE) &= ~(METAL_SPI_CSMODE_MASK); + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSMODE) |= METAL_SPI_CSMODE_HOLD; + + unsigned long rxdata; + + /* Declare time_t variables to break out of infinite while loop */ + time_t endwait; + + for(int i = 0; i < len; i++) { + /* Master send bytes to the slave */ + + /* Wait for TXFIFO to not be full */ + while (METAL_SPI_REGW(METAL_SIFIVE_SPI0_TXDATA) & METAL_SPI_TXDATA_FULL); + + /* Transfer byte by modifying the least significant byte in the TXDATA register */ + if (tx_buf) { + METAL_SPI_REGB(METAL_SIFIVE_SPI0_TXDATA) = tx_buf[i]; + } else { + /* Transfer a 0 byte if the sending buffer is NULL */ + METAL_SPI_REGB(METAL_SIFIVE_SPI0_TXDATA) = 0; + } + + /* Master receives bytes from the RX FIFO */ + + /* Wait for RXFIFO to not be empty, but break the nested loops if timeout + * this timeout method needs refining, preferably taking into account + * the device specs */ + endwait = time(NULL) + METAL_SPI_RXDATA_TIMEOUT; + + while ((rxdata = METAL_SPI_REGW(METAL_SIFIVE_SPI0_RXDATA)) & METAL_SPI_RXDATA_EMPTY) { + if (time(NULL) > endwait) { + /* If timeout, deassert the CS */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSMODE) &= ~(METAL_SPI_CSMODE_MASK); + + /* If timeout, return error code 1 immediately */ + return 1; + } + } + + /* Only store the dequeued byte if the receive_buffer is not NULL */ + if (rx_buf) { + rx_buf[i] = (char) (rxdata & METAL_SPI_TXRXDATA_MASK); + } + } + + /* On the last byte, set CSMODE to auto so that the chip select transitions back to high + * The reason that CS pin is not deasserted after transmitting out the byte buffer is timing. + * The code on the host side likely executes faster than the ability of FIFO to send out bytes. + * After the host iterates through the array, fifo is likely not cleared yet. If host deasserts + * the CS pin immediately, the following bytes in the output FIFO will not be sent consecutively. + * There needs to be a better way to handle this. */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_CSMODE) &= ~(METAL_SPI_CSMODE_MASK); + + return 0; +} + +int __metal_driver_sifive_spi0_get_baud_rate(struct metal_spi *gspi) +{ + struct __metal_driver_sifive_spi0 *spi = (void *)gspi; + return spi->baud_rate; +} + +int __metal_driver_sifive_spi0_set_baud_rate(struct metal_spi *gspi, int baud_rate) +{ + long control_base = __metal_driver_sifive_spi0_control_base(gspi); + struct metal_clock *clock = __metal_driver_sifive_spi0_clock(gspi); + struct __metal_driver_sifive_spi0 *spi = (void *)gspi; + + spi->baud_rate = baud_rate; + + if (clock != NULL) { + long clock_rate = clock->vtable->get_rate_hz(clock); + + /* Calculate divider */ + long div = (clock_rate / (2 * baud_rate)) - 1; + + if(div > METAL_SPI_SCKDIV_MASK) { + /* The requested baud rate is lower than we can support at + * the current clock rate */ + return -1; + } + + /* Set divider */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKDIV) &= ~METAL_SPI_SCKDIV_MASK; + METAL_SPI_REGW(METAL_SIFIVE_SPI0_SCKDIV) |= (div & METAL_SPI_SCKDIV_MASK); + } + + return 0; +} + +static void pre_rate_change_callback(void *priv) +{ + long control_base = __metal_driver_sifive_spi0_control_base((struct metal_spi *)priv); + + /* Detect when the TXDATA is empty by setting the transmit watermark count + * to zero and waiting until an interrupt is pending */ + METAL_SPI_REGW(METAL_SIFIVE_SPI0_TXMARK) &= ~(METAL_SPI_TXMARK_MASK); + + while((METAL_SPI_REGW(METAL_SIFIVE_SPI0_IP) & METAL_SPI_TXWM) == 0) ; +} + +static void post_rate_change_callback(void *priv) +{ + struct __metal_driver_sifive_spi0 *spi = priv; + metal_spi_set_baud_rate(&spi->spi, spi->baud_rate); +} + +void __metal_driver_sifive_spi0_init(struct metal_spi *gspi, int baud_rate) +{ + struct __metal_driver_sifive_spi0 *spi = (void *)(gspi); + struct metal_clock *clock = __metal_driver_sifive_spi0_clock(gspi); + struct __metal_driver_sifive_gpio0 *pinmux = __metal_driver_sifive_spi0_pinmux(gspi); + + if(clock != NULL) { + metal_clock_register_pre_rate_change_callback(clock, &pre_rate_change_callback, spi); + metal_clock_register_post_rate_change_callback(clock, &post_rate_change_callback, spi); + } + + metal_spi_set_baud_rate(&(spi->spi), baud_rate); + + if (pinmux != NULL) { + long pinmux_output_selector = __metal_driver_sifive_spi0_pinmux_output_selector(gspi); + long pinmux_source_selector = __metal_driver_sifive_spi0_pinmux_source_selector(gspi); + pinmux->gpio.vtable->enable_io( + (struct metal_gpio *) pinmux, + pinmux_output_selector, + pinmux_source_selector + ); + } +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_spi0) = { + .spi.init = __metal_driver_sifive_spi0_init, + .spi.transfer = __metal_driver_sifive_spi0_transfer, + .spi.get_baud_rate = __metal_driver_sifive_spi0_get_baud_rate, + .spi.set_baud_rate = __metal_driver_sifive_spi0_set_baud_rate, +}; +#endif /* METAL_SIFIVE_SPI0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_test0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_test0.c new file mode 100644 index 000000000..4ef0aa861 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_test0.c @@ -0,0 +1,26 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_TEST0 + +#include +#include +#include +#include + +void __metal_driver_sifive_test0_exit(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); +void __metal_driver_sifive_test0_exit(const struct __metal_shutdown *sd, int code) +{ + long base = __metal_driver_sifive_test0_base(); + uint32_t out = (code << 16) + (code == 0 ? 0x5555 : 0x3333); + while (1) { + __METAL_ACCESS_ONCE((__metal_io_u32 *)(base + METAL_SIFIVE_TEST0_FINISHER_OFFSET)) = out; + } +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_test0) = { + .shutdown.exit = &__metal_driver_sifive_test0_exit, +}; +#endif /* METAL_SIFIVE_TEST0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_uart0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_uart0.c new file mode 100644 index 000000000..46971ec79 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/drivers/sifive_uart0.c @@ -0,0 +1,151 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#ifdef METAL_SIFIVE_UART0 + +#include +#include + +/* TXDATA Fields */ +#define UART_TXEN (1 << 0) +#define UART_TXFULL (1 << 31) + +/* RXDATA Fields */ +#define UART_RXEN (1 << 0) +#define UART_RXEMPTY (1 << 31) + +/* TXCTRL Fields */ +#define UART_NSTOP (1 << 1) +#define UART_TXCNT(count) ((0x7 & count) << 16) + +/* IP Fields */ +#define UART_TXWM (1 << 0) + +#define UART_REG(offset) (((unsigned long)control_base + offset)) +#define UART_REGB(offset) (__METAL_ACCESS_ONCE((__metal_io_u8 *)UART_REG(offset))) +#define UART_REGW(offset) (__METAL_ACCESS_ONCE((__metal_io_u32 *)UART_REG(offset))) + +struct metal_interrupt * +__metal_driver_sifive_uart0_interrupt_controller(struct metal_uart *uart) +{ + return __metal_driver_sifive_uart0_interrupt_parent(uart); +} + +int __metal_driver_sifive_uart0_get_interrupt_id(struct metal_uart *uart) +{ + return (__metal_driver_sifive_uart0_interrupt_line(uart) + METAL_INTERRUPT_ID_GL0); +} + +int __metal_driver_sifive_uart0_putc(struct metal_uart *uart, unsigned char c) +{ + long control_base = __metal_driver_sifive_uart0_control_base(uart); + + while ((UART_REGW(METAL_SIFIVE_UART0_TXDATA) & UART_TXFULL) != 0) { } + UART_REGW(METAL_SIFIVE_UART0_TXDATA) = c; + return 0; +} + +int __metal_driver_sifive_uart0_getc(struct metal_uart *uart, unsigned char *c) +{ + uint32_t ch = UART_RXEMPTY; + long control_base = __metal_driver_sifive_uart0_control_base(uart); + + while (ch & UART_RXEMPTY) { + ch = UART_REGW(METAL_SIFIVE_UART0_RXDATA); + } + *c = ch & 0xff; + return 0; +} + +int __metal_driver_sifive_uart0_get_baud_rate(struct metal_uart *guart) +{ + struct __metal_driver_sifive_uart0 *uart = (void *)guart; + return uart->baud_rate; +} + +int __metal_driver_sifive_uart0_set_baud_rate(struct metal_uart *guart, int baud_rate) +{ + struct __metal_driver_sifive_uart0 *uart = (void *)guart; + long control_base = __metal_driver_sifive_uart0_control_base(guart); + struct metal_clock *clock = __metal_driver_sifive_uart0_clock(guart); + + uart->baud_rate = baud_rate; + + if (clock != NULL) { + long clock_rate = clock->vtable->get_rate_hz(clock); + UART_REGW(METAL_SIFIVE_UART0_DIV) = clock_rate / baud_rate - 1; + UART_REGW(METAL_SIFIVE_UART0_TXCTRL) |= UART_TXEN; + UART_REGW(METAL_SIFIVE_UART0_RXCTRL) |= UART_RXEN; + } + return 0; +} + +static void pre_rate_change_callback(void *priv) +{ + struct __metal_driver_sifive_uart0 *uart = priv; + long control_base = __metal_driver_sifive_uart0_control_base((struct metal_uart *)priv); + struct metal_clock *clock = __metal_driver_sifive_uart0_clock((struct metal_uart *)priv); + + /* Detect when the TXDATA is empty by setting the transmit watermark count + * to one and waiting until an interrupt is pending */ + + UART_REGW(METAL_SIFIVE_UART0_TXCTRL) &= ~(UART_TXCNT(0x7)); + UART_REGW(METAL_SIFIVE_UART0_TXCTRL) |= UART_TXCNT(1); + + while((UART_REGW(METAL_SIFIVE_UART0_IP) & UART_TXWM) == 0) ; + + /* When the TXDATA clears, the UART is still shifting out the last byte. + * Calculate the time we must drain to finish transmitting and then wait + * that long. */ + + long bits_per_symbol = (UART_REGW(METAL_SIFIVE_UART0_TXCTRL) & (1 << 1)) ? 9 : 10; + long clk_freq = clock->vtable->get_rate_hz(clock); + long cycles_to_wait = bits_per_symbol * clk_freq / uart->baud_rate; + + for(volatile long x = 0; x < cycles_to_wait; x++) + asm("nop"); +} + +static void post_rate_change_callback(void *priv) +{ + struct __metal_driver_sifive_uart0 *uart = priv; + metal_uart_set_baud_rate(&uart->uart, uart->baud_rate); +} + +void __metal_driver_sifive_uart0_init(struct metal_uart *guart, int baud_rate) +{ + struct __metal_driver_sifive_uart0 *uart = (void *)(guart); + struct metal_clock *clock = __metal_driver_sifive_uart0_clock(guart); + struct __metal_driver_sifive_gpio0 *pinmux = __metal_driver_sifive_uart0_pinmux(guart); + + if(clock != NULL) { + metal_clock_register_pre_rate_change_callback(clock, &pre_rate_change_callback, guart); + metal_clock_register_post_rate_change_callback(clock, &post_rate_change_callback, guart); + } + + metal_uart_set_baud_rate(&(uart->uart), baud_rate); + + if (pinmux != NULL) { + long pinmux_output_selector = __metal_driver_sifive_uart0_pinmux_output_selector(guart); + long pinmux_source_selector = __metal_driver_sifive_uart0_pinmux_source_selector(guart); + pinmux->gpio.vtable->enable_io( + (struct metal_gpio *) pinmux, + pinmux_output_selector, + pinmux_source_selector + ); + } +} + +__METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_uart0) = { + .uart.init = __metal_driver_sifive_uart0_init, + .uart.putc = __metal_driver_sifive_uart0_putc, + .uart.getc = __metal_driver_sifive_uart0_getc, + .uart.get_baud_rate = __metal_driver_sifive_uart0_get_baud_rate, + .uart.set_baud_rate = __metal_driver_sifive_uart0_set_baud_rate, + .uart.controller_interrupt = __metal_driver_sifive_uart0_interrupt_controller, + .uart.get_interrupt_id = __metal_driver_sifive_uart0_get_interrupt_id, +}; + +#endif /* METAL_SIFIVE_UART0 */ diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/entry.S b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/entry.S new file mode 100644 index 000000000..460735532 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/entry.S @@ -0,0 +1,107 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* This code executes before _start, which is contained inside the C library. + * In embedded systems we want to ensure that _enter, which contains the first + * code to be executed, can be loaded at a specific address. To enable this + * feature we provide the '.text.metal.init.enter' section, which is + * defined to have the first address being where execution should start. */ +.section .text.metal.init.enter +.global _enter + +_enter: + .cfi_startproc + + /* Inform the debugger that there is nowhere to backtrace past _enter. */ + .cfi_undefined ra + + /* The absolute first thing that must happen is configuring the global + * pointer register, which must be done with relaxation disabled because + * it's not valid to obtain the address of any symbol without GP + * configured. The C environment might go ahead and do this again, but + * that's safe as it's a fixed register. */ +.option push +.option norelax + la gp, __global_pointer$ +.option pop + + /* Set up a simple trap vector to catch anything that goes wrong early in + * the boot process. */ + la t0, early_trap_vector + csrw mtvec, t0 + /* enable chicken bit if core is bullet series*/ + la t0, __metal_chicken_bit + beqz t0, 1f + csrwi 0x7C1, 0 +1: + + /* There may be pre-initialization routines inside the MBI code that run in + * C, so here we set up a C environment. First we set up a stack pointer, + * which is left as a weak reference in order to allow initialization + * routines that do not need a stack to be set up to transparently be + * called. */ + .weak __metal_stack_pointer + la sp, __metal_stack_pointer + + /* Check for an initialization routine and call it if one exists, otherwise + * just skip over the call entirely. Note that __metal_initialize isn't + * actually a full C function, as it doesn't end up with the .bss or .data + * segments having been initialized. This is done to avoid putting a + * burden on systems that can be initialized without having a C environment + * set up. */ + .weak __metal_before_start + la ra, __metal_before_start + beqz ra, 1f + jalr ra +1: + + /* At this point we can enter the C runtime's startup file. The arguments + * to this function are designed to match those provided to the SEE, just + * so we don't have to write another ABI. */ + csrr a0, mhartid + li a1, 0 + li a2, 0 + call _start + + /* If we've made it back here then there's probably something wrong. We + * allow the METAL to register a handler here. */ + .weak __metal_after_main + la ra, __metal_after_main + beqz ra, 1f + jalr ra +1: + + /* If that handler returns then there's not a whole lot we can do. Just + * try to make some noise. */ + la t0, 1f + csrw mtvec, t0 +1: + lw t1, 0(x0) + j 1b + + .cfi_endproc + +/* For sanity's sake we set up an early trap vector that just does nothing. If + * you end up here then there's a bug in the early boot code somewhere. */ +.section .text.metal.init.trapvec +.align 2 +early_trap_vector: + .cfi_startproc + csrr t0, mcause + csrr t1, mepc + csrr t2, mtval + j early_trap_vector + .cfi_endproc + +/* The GCC port might not emit a __register_frame_info symbol, which eventually + * results in a weak undefined reference that eventually causes crash when it + * is dereference early in boot. We really shouldn't need to put this here, + * but to deal with what I think is probably a bug in the linker script I'm + * going to leave this in for now. At least it's fairly cheap :) */ +.weak __register_frame_info +.global __register_frame_info +.section .text.metal.init.__register_frame_info +__register_frame_info: + .cfi_startproc + ret + .cfi_endproc diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/gpio.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/gpio.c new file mode 100644 index 000000000..02a6582c9 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/gpio.c @@ -0,0 +1,22 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +extern inline int metal_gpio_disable_input(struct metal_gpio *gpio, int pin); +extern inline int metal_gpio_enable_output(struct metal_gpio *gpio, int pin); +extern inline int metal_gpio_set_pin(struct metal_gpio *, int pin, int value); +extern inline int metal_gpio_get_pin(struct metal_gpio *, int pin); +extern inline int metal_gpio_clear_pin(struct metal_gpio *, int pin); +extern inline int metal_gpio_toggle_pin(struct metal_gpio *, int pin); +extern inline int metal_gpio_enable_pinmux(struct metal_gpio *, int pin, int io_function); + +struct metal_gpio *metal_gpio_get_device(int device_num) +{ + if(device_num > __MEE_DT_MAX_GPIOS) { + return NULL; + } + + return (struct metal_gpio *) __metal_gpio_table[device_num]; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/interrupt.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/interrupt.c new file mode 100644 index 000000000..1b3c6b8de --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/interrupt.c @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +extern inline void metal_interrupt_init(struct metal_interrupt *controller); + +extern inline int metal_interrupt_register_handler(struct metal_interrupt *controller, + int id, + metal_interrupt_handler_t handler, + void *priv); + +extern inline int metal_interrupt_enable(struct metal_interrupt *controller, int id); + +extern inline int metal_interrupt_disable(struct metal_interrupt *controller, int id); + +extern inline int metal_interrupt_vector_enable(struct metal_interrupt *controller, + int id, metal_vector_mode mode); + +extern inline int metal_interrupt_vector_disable(struct metal_interrupt *controller, int id); + +extern inline int _metal_interrupt_command_request(struct metal_interrupt *controller, + int cmd, void *data); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/led.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/led.c new file mode 100644 index 000000000..f28d22b81 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/led.c @@ -0,0 +1,38 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include + +struct metal_led* metal_led_get_rgb (char *label, char *color) +{ + int i; + struct metal_led *led; + char led_label[100]; + + if ((__METAL_DT_MAX_LEDS == 0) || + (label == NULL) || (color == NULL)) { + return NULL; + } + + strcpy(led_label, label); + strcat(led_label, color); + for (i = 0; i < __METAL_DT_MAX_LEDS; i++) { + led = (struct metal_led*)__metal_led_table[i]; + if (led->vtable->led_exist(led, led_label)) { + return led; + } + } + return NULL; +} + +struct metal_led* metal_led_get (char *label) +{ + return metal_led_get_rgb(label, ""); +} + +extern inline void metal_led_enable(struct metal_led *led); +extern inline void metal_led_on(struct metal_led *led); +extern inline void metal_led_off(struct metal_led *led); +extern inline void metal_led_toggle(struct metal_led *led); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/lock.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/lock.c new file mode 100644 index 000000000..0df162aa4 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/lock.c @@ -0,0 +1,8 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +extern inline int metal_lock_init(struct metal_lock *lock); +extern inline int metal_lock_take(struct metal_lock *lock); +extern inline int metal_lock_give(struct metal_lock *lock); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/memory.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/memory.c new file mode 100644 index 000000000..43ca6b810 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/memory.c @@ -0,0 +1,26 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +struct metal_memory *metal_get_memory_from_address(const uintptr_t address) { + for(int i = 0; i < __METAL_DT_MAX_MEMORIES; i++) { + struct metal_memory *mem = __metal_memory_table[i]; + + uintptr_t lower_bound = metal_memory_get_base_address(mem); + uintptr_t upper_bound = lower_bound + metal_memory_get_size(mem); + + if((address >= lower_bound) && (address < upper_bound)) { + return mem; + } + } + + return NULL; +} + +extern inline uintptr_t metal_memory_get_base_address(const struct metal_memory *memory); +extern inline size_t metal_memory_get_size(const struct metal_memory *memory); +extern inline int metal_memory_supports_atomics(const struct metal_memory *memory); +extern inline int metal_memory_is_cachable(const struct metal_memory *memory); + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/pmp.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/pmp.c new file mode 100644 index 000000000..ab78cdeba --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/pmp.c @@ -0,0 +1,580 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include + +#define CONFIG_TO_INT(_config) (*((size_t *) &(_config))) +#define INT_TO_CONFIG(_int) (*((struct metal_pmp_config *) &(_int))) + +struct metal_pmp *metal_pmp_get_device(void) +{ +#ifdef __METAL_DT_PMP_HANDLE + return __METAL_DT_PMP_HANDLE; +#else + return NULL; +#endif +} + +/* This function calculates the minimum granularity from the address + * that pmpaddr takes on after writing all ones to pmpaddr when pmpcfg = 0. + * + * Detect the address granularity based on the position of the + * least-significant 1 set in the address. + * + * For example, if the value read from pmpaddr is 0x3ffffc00, the + * least-significant set bit is in bit 10 (counting from 0), resulting + * in a detected granularity of 2^(10 + 2) = 4096. + */ +static uintptr_t _get_detected_granularity(uintptr_t address) { + if(address == 0) { + return (uintptr_t) -1; + } + + /* Get the index of the least significant set bit */ + int index = 0; + while(((address >> index) & 0x1) == 0) { + index += 1; + } + + /* The granularity is equal to 2^(index + 2) bytes */ + return (1 << (index + 2)); +} + +/* This function calculates the granularity requested by the user's provided + * value for pmpaddr. + * + * Calculate the requested granularity based on the position of the + * least-significant unset bit. + * + * For example, if the requested address is 0x20009ff, the least-significant + * unset bit is at index 9 (counting from 0), resulting in a requested + * granularity of 2^(9 + 3) = 4096. + */ +static uintptr_t _get_pmpaddr_granularity(uintptr_t address) { + /* Get the index of the least significant unset bit */ + int index = 0; + while(((address >> index) & 0x1) == 1) { + index += 1; + } + + /* The granularity is equal to 2^(index + 3) bytes */ + return (1 << (index + 3)); +} + +/* Get the number of pmp regions for the current hart */ +static int _pmp_regions() { + struct metal_cpu *current_cpu = metal_cpu_get(metal_cpu_get_current_hartid()); + + return __metal_driver_cpu_num_pmp_regions(current_cpu); +} + + +void metal_pmp_init(struct metal_pmp *pmp) { + if(!pmp) { + return; + } + + struct metal_pmp_config init_config = { + .L = METAL_PMP_UNLOCKED, + .A = METAL_PMP_OFF, + .X = 0, + .W = 0, + .R = 0, + }; + + for(unsigned int i = 0; i < _pmp_regions(); i++) { + metal_pmp_set_region(pmp, i, init_config, 0); + } + + /* Detect the region granularity by writing all 1s to pmpaddr0 while + * pmpcfg0 = 0. */ + if(metal_pmp_set_address(pmp, 0, -1) != 0) { + /* Failed to detect granularity */ + return; + } + + /* Calculate the granularity based on the value that pmpaddr0 takes on */ + pmp->_granularity[metal_cpu_get_current_hartid()] = _get_detected_granularity(metal_pmp_get_address(pmp, 0)); + + /* Clear pmpaddr0 */ + metal_pmp_set_address(pmp, 0, 0); +} + +int metal_pmp_set_region(struct metal_pmp *pmp, + unsigned int region, + struct metal_pmp_config config, + size_t address) +{ + struct metal_pmp_config old_config; + size_t old_address; + size_t cfgmask; + size_t pmpcfg; + int rc = 0; + + if(!pmp) { + /* Device handle cannot be NULL */ + return 1; + } + + if(region > _pmp_regions()) { + /* Region outside of supported range */ + return 2; + } + + if(config.A == METAL_PMP_NA4 && pmp->_granularity[metal_cpu_get_current_hartid()] > 4) { + /* The requested granularity is too small */ + return 3; + } + + if(config.A == METAL_PMP_NAPOT && + pmp->_granularity[metal_cpu_get_current_hartid()] > _get_pmpaddr_granularity(address)) + { + /* The requested granularity is too small */ + return 3; + } + + rc = metal_pmp_get_region(pmp, region, &old_config, &old_address); + if(rc) { + /* Error reading region */ + return rc; + } + + if(old_config.L == METAL_PMP_LOCKED) { + /* Cannot modify locked region */ + return 4; + } + + /* Update the address first, because if the region is being locked we won't + * be able to modify it after we set the config */ + if(old_address != address) { + switch(region) { + case 0: + asm("csrw pmpaddr0, %[addr]" + :: [addr] "r" (address) :); + break; + case 1: + asm("csrw pmpaddr1, %[addr]" + :: [addr] "r" (address) :); + break; + case 2: + asm("csrw pmpaddr2, %[addr]" + :: [addr] "r" (address) :); + break; + case 3: + asm("csrw pmpaddr3, %[addr]" + :: [addr] "r" (address) :); + break; + case 4: + asm("csrw pmpaddr4, %[addr]" + :: [addr] "r" (address) :); + break; + case 5: + asm("csrw pmpaddr5, %[addr]" + :: [addr] "r" (address) :); + break; + case 6: + asm("csrw pmpaddr6, %[addr]" + :: [addr] "r" (address) :); + break; + case 7: + asm("csrw pmpaddr7, %[addr]" + :: [addr] "r" (address) :); + break; + case 8: + asm("csrw pmpaddr8, %[addr]" + :: [addr] "r" (address) :); + break; + case 9: + asm("csrw pmpaddr9, %[addr]" + :: [addr] "r" (address) :); + break; + case 10: + asm("csrw pmpaddr10, %[addr]" + :: [addr] "r" (address) :); + break; + case 11: + asm("csrw pmpaddr11, %[addr]" + :: [addr] "r" (address) :); + break; + case 12: + asm("csrw pmpaddr12, %[addr]" + :: [addr] "r" (address) :); + break; + case 13: + asm("csrw pmpaddr13, %[addr]" + :: [addr] "r" (address) :); + break; + case 14: + asm("csrw pmpaddr14, %[addr]" + :: [addr] "r" (address) :); + break; + case 15: + asm("csrw pmpaddr15, %[addr]" + :: [addr] "r" (address) :); + break; + } + } + +#if __riscv_xlen==32 + if(CONFIG_TO_INT(old_config) != CONFIG_TO_INT(config)) { + /* Mask to clear old pmpcfg */ + cfgmask = (0xFF << (8 * (region % 4)) ); + pmpcfg = (CONFIG_TO_INT(config) << (8 * (region % 4)) ); + + switch(region / 4) { + case 0: + asm("csrc pmpcfg0, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg0, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + case 1: + asm("csrc pmpcfg1, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg1, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + case 2: + asm("csrc pmpcfg2, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg2, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + case 3: + asm("csrc pmpcfg3, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg3, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + } + } +#elif __riscv_xlen==64 + if(CONFIG_TO_INT(old_config) != CONFIG_TO_INT(config)) { + /* Mask to clear old pmpcfg */ + cfgmask = (0xFF << (8 * (region % 8)) ); + pmpcfg = (CONFIG_TO_INT(config) << (8 * (region % 8)) ); + + switch(region / 8) { + case 0: + asm("csrc pmpcfg0, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg0, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + case 1: + asm("csrc pmpcfg2, %[mask]" + :: [mask] "r" (cfgmask) :); + + asm("csrs pmpcfg2, %[cfg]" + :: [cfg] "r" (pmpcfg) :); + break; + } + } +#else +#error XLEN is not set to supported value for PMP driver +#endif + + return 0; +} + +int metal_pmp_get_region(struct metal_pmp *pmp, + unsigned int region, + struct metal_pmp_config *config, + size_t *address) +{ + size_t pmpcfg = 0; + + if(!pmp || !config || !address) { + /* NULL pointers are invalid arguments */ + return 1; + } + + if(region > _pmp_regions()) { + /* Region outside of supported range */ + return 2; + } + +#if __riscv_xlen==32 + switch(region / 4) { + case 0: + asm("csrr %[cfg], pmpcfg0" + : [cfg] "=r" (pmpcfg) ::); + break; + case 1: + asm("csrr %[cfg], pmpcfg1" + : [cfg] "=r" (pmpcfg) ::); + break; + case 2: + asm("csrr %[cfg], pmpcfg2" + : [cfg] "=r" (pmpcfg) ::); + break; + case 3: + asm("csrr %[cfg], pmpcfg3" + : [cfg] "=r" (pmpcfg) ::); + break; + } + + pmpcfg = (0xFF & (pmpcfg >> (8 * (region % 4)) ) ); + +#elif __riscv_xlen==64 + switch(region / 8) { + case 0: + asm("csrr %[cfg], pmpcfg0" + : [cfg] "=r" (pmpcfg) ::); + break; + case 1: + asm("csrr %[cfg], pmpcfg2" + : [cfg] "=r" (pmpcfg) ::); + break; + } + + pmpcfg = (0xFF & (pmpcfg >> (8 * (region % 8)) ) ); + +#else +#error XLEN is not set to supported value for PMP driver +#endif + + *config = INT_TO_CONFIG(pmpcfg); + + switch(region) { + case 0: + asm("csrr %[addr], pmpaddr0" + : [addr] "=r" (*address) ::); + break; + case 1: + asm("csrr %[addr], pmpaddr1" + : [addr] "=r" (*address) ::); + break; + case 2: + asm("csrr %[addr], pmpaddr2" + : [addr] "=r" (*address) ::); + break; + case 3: + asm("csrr %[addr], pmpaddr3" + : [addr] "=r" (*address) ::); + break; + case 4: + asm("csrr %[addr], pmpaddr4" + : [addr] "=r" (*address) ::); + break; + case 5: + asm("csrr %[addr], pmpaddr5" + : [addr] "=r" (*address) ::); + break; + case 6: + asm("csrr %[addr], pmpaddr6" + : [addr] "=r" (*address) ::); + break; + case 7: + asm("csrr %[addr], pmpaddr7" + : [addr] "=r" (*address) ::); + break; + case 8: + asm("csrr %[addr], pmpaddr8" + : [addr] "=r" (*address) ::); + break; + case 9: + asm("csrr %[addr], pmpaddr9" + : [addr] "=r" (*address) ::); + break; + case 10: + asm("csrr %[addr], pmpaddr10" + : [addr] "=r" (*address) ::); + break; + case 11: + asm("csrr %[addr], pmpaddr11" + : [addr] "=r" (*address) ::); + break; + case 12: + asm("csrr %[addr], pmpaddr12" + : [addr] "=r" (*address) ::); + break; + case 13: + asm("csrr %[addr], pmpaddr13" + : [addr] "=r" (*address) ::); + break; + case 14: + asm("csrr %[addr], pmpaddr14" + : [addr] "=r" (*address) ::); + break; + case 15: + asm("csrr %[addr], pmpaddr15" + : [addr] "=r" (*address) ::); + break; + } + + return 0; +} + +int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &address); + if(rc) { + return rc; + } + + if(config.L == METAL_PMP_LOCKED) { + return 0; + } + + config.L = METAL_PMP_LOCKED; + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + + +int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address) +{ + struct metal_pmp_config config; + size_t old_address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &old_address); + if(rc) { + return rc; + } + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + +size_t metal_pmp_get_address(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address = 0; + + metal_pmp_get_region(pmp, region, &config, &address); + + return address; +} + + +int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum metal_pmp_address_mode mode) +{ + struct metal_pmp_config config; + size_t address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &address); + if(rc) { + return rc; + } + + config.A = mode; + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + +enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address = 0; + + metal_pmp_get_region(pmp, region, &config, &address); + + return config.A; +} + + +int metal_pmp_set_executable(struct metal_pmp *pmp, unsigned int region, int X) +{ + struct metal_pmp_config config; + size_t address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &address); + if(rc) { + return rc; + } + + config.X = X; + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + +int metal_pmp_get_executable(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address = 0; + + metal_pmp_get_region(pmp, region, &config, &address); + + return config.X; +} + + +int metal_pmp_set_writeable(struct metal_pmp *pmp, unsigned int region, int W) +{ + struct metal_pmp_config config; + size_t address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &address); + if(rc) { + return rc; + } + + config.W = W; + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + +int metal_pmp_get_writeable(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address = 0; + + metal_pmp_get_region(pmp, region, &config, &address); + + return config.W; +} + + +int metal_pmp_set_readable(struct metal_pmp *pmp, unsigned int region, int R) +{ + struct metal_pmp_config config; + size_t address; + int rc = 0; + + rc = metal_pmp_get_region(pmp, region, &config, &address); + if(rc) { + return rc; + } + + config.R = R; + + rc = metal_pmp_set_region(pmp, region, config, address); + + return rc; +} + +int metal_pmp_get_readable(struct metal_pmp *pmp, unsigned int region) +{ + struct metal_pmp_config config; + size_t address = 0; + + metal_pmp_get_region(pmp, region, &config, &address); + + return config.R; +} + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/privilege.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/privilege.c new file mode 100644 index 000000000..42bdf6e0d --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/privilege.c @@ -0,0 +1,57 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +#include + +#define METAL_MSTATUS_MIE_OFFSET 3 +#define METAL_MSTATUS_MPIE_OFFSET 7 +#define METAL_MSTATUS_SIE_OFFSET 1 +#define METAL_MSTATUS_SPIE_OFFSET 5 +#define METAL_MSTATUS_UIE_OFFSET 0 +#define METAL_MSTATUS_UPIE_OFFSET 4 + +#define METAL_MSTATUS_MPP_OFFSET 11 +#define METAL_MSTATUS_MPP_MASK 3 + +void metal_privilege_drop_to_mode(enum metal_privilege_mode mode, + struct metal_register_file regfile, + metal_privilege_entry_point_t entry_point) +{ + uintptr_t mstatus; + asm volatile("csrr %0, mstatus" : "=r" (mstatus)); + + /* Set xPIE bits based on current xIE bits */ + if(mstatus && (1 << METAL_MSTATUS_MIE_OFFSET)) { + mstatus |= (1 << METAL_MSTATUS_MPIE_OFFSET); + } else { + mstatus &= ~(1 << METAL_MSTATUS_MPIE_OFFSET); + } + if(mstatus && (1 << METAL_MSTATUS_SIE_OFFSET)) { + mstatus |= (1 << METAL_MSTATUS_SPIE_OFFSET); + } else { + mstatus &= ~(1 << METAL_MSTATUS_SPIE_OFFSET); + } + if(mstatus && (1 << METAL_MSTATUS_UIE_OFFSET)) { + mstatus |= (1 << METAL_MSTATUS_UPIE_OFFSET); + } else { + mstatus &= ~(1 << METAL_MSTATUS_UPIE_OFFSET); + } + + /* Set MPP to the requested privilege mode */ + mstatus &= ~(METAL_MSTATUS_MPP_MASK << METAL_MSTATUS_MPP_OFFSET); + mstatus |= (mode << METAL_MSTATUS_MPP_OFFSET); + + asm volatile("csrw mstatus, %0" :: "r" (mstatus)); + + /* Set the entry point in MEPC */ + asm volatile("csrw mepc, %0" :: "r" (entry_point)); + + /* Set the register file */ + asm volatile("mv ra, %0" :: "r" (regfile.ra)); + asm volatile("mv sp, %0" :: "r" (regfile.sp)); + + asm volatile("mret"); +} + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/shutdown.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/shutdown.c new file mode 100644 index 000000000..0e530b605 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/shutdown.c @@ -0,0 +1,22 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +extern inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code); + +#if defined(__METAL_DT_SHUTDOWN_HANDLE) +void metal_shutdown(int code) +{ + __metal_shutdown_exit(__METAL_DT_SHUTDOWN_HANDLE, code); +} +#else +# warning "There is no defined shutdown mechanism, metal_shutdown() will spin." +void metal_shutdown(int code) +{ + while (1) { + __asm__ volatile ("nop"); + } +} +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/spi.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/spi.c new file mode 100644 index 000000000..d344e095f --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/spi.c @@ -0,0 +1,19 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +extern inline void metal_spi_init(struct metal_spi *spi, int baud_rate); +extern inline int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf); +extern inline int metal_spi_get_baud_rate(struct metal_spi *spi); +extern inline int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate); + +struct metal_spi *metal_spi_get_device(int device_num) +{ + if(device_num >= __METAL_DT_MAX_SPIS) { + return NULL; + } + + return (struct metal_spi *) __metal_spi_table[device_num]; +} diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/switch.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/switch.c new file mode 100644 index 000000000..f101537ac --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/switch.c @@ -0,0 +1,27 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +struct metal_switch* metal_switch_get (char *label) +{ + int i; + struct metal_switch *flip; + + if ((__METAL_DT_MAX_BUTTONS == 0) || (label == NULL)) { + return NULL; + } + + for (i = 0; i < __METAL_DT_MAX_BUTTONS; i++) { + flip = (struct metal_switch*)__metal_switch_table[i]; + if (flip->vtable->switch_exist(flip, label)) { + return flip; + } + } + return NULL; +} + +extern inline struct metal_interrupt* + metal_switch_interrupt_controller(struct metal_switch *flip); +extern inline int metal_switch_get_interrupt_id(struct metal_switch *flip); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/timer.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/timer.c new file mode 100644 index 000000000..243b5cff0 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/timer.c @@ -0,0 +1,80 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include +#include +#include + +#if defined(__METAL_DT_MAX_HARTS) +/* This implementation serves as a small shim that interfaces with the first + * timer on a system. */ +int metal_timer_get_cyclecount(int hartid, unsigned long long *mcc) +{ + struct metal_cpu *cpu = metal_cpu_get(hartid); + + if ( cpu ) { + *mcc = metal_cpu_get_timer(cpu); + return 0; + } + return -1; +} + +int metal_timer_get_timebase_frequency(int hartid, unsigned long long *timebase) +{ + struct metal_cpu *cpu = metal_cpu_get(hartid); + + if ( cpu ) { + *timebase = metal_cpu_get_timebase(cpu); + return 0; + } + return -1; +} + +int metal_timer_get_machine_time(int hartid) +{ + struct metal_cpu *cpu = metal_cpu_get(hartid); + + if ( cpu ) { + return metal_cpu_get_mtime(cpu); + } + return 0; +} + +int metal_timer_set_machine_time(int hartid, unsigned long long time) +{ + struct metal_cpu *cpu = metal_cpu_get(hartid); + + if ( cpu ) { + return metal_cpu_set_mtimecmp(cpu, time); + } + return -1; +} + +#else + +/* This implementation of gettimeofday doesn't actually do anything, it's just there to + * provide a shim and return 0 so we can ensure that everything can link to _gettimeofday. + */ +int nop_cyclecount(int id, unsigned long long *c) __attribute__((section(".text.metal.nop.cyclecount"))); +int nop_cyclecount(int id, unsigned long long *c) { return -1; } +int nop_timebase(unsigned long long *t) __attribute__((section(".text.metal.nop.timebase"))); +int nop_timebase(unsigned long long *t) { return -1; } +int nop_tick(int second) __attribute__((section(".text.metal.nop.tick"))); +int nop_tick(int second) { return -1; } +int metal_timer_get_cyclecount(int hartid, unsigned long long *c) __attribute__((weak, alias("nop_cyclecount"))) +{ +#warning "There is no default timer device, metal_timer_get_cyclecount() will always return cyclecount -1." +} +int metal_timer_get_timebase_frequency(unsigned long long *t) __attribute__((weak, alias("nop_timebase"))) +{ +#warning "There is no default timer device, metal_timer_get_timebase_frequency() will always return timebase -1." +} +int metal_timer_set_tick(int second) __attribute__((weak, alias("nop_tick"))) +{ +#warning "There is no default timer device, metal_timer_set_tick) will always return -1." +} + +#endif + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/trap.S b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/trap.S new file mode 100644 index 000000000..68103982a --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/trap.S @@ -0,0 +1,53 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#define METAL_MSTATUS_MIE_SHIFT 8 +#define METAL_MSTATUS_MPP_M 3 +#define METAL_MSTATUS_MPP_SHIFT 11 + +#define METAL_MTVEC_MODE_MASK 3 + +/* void _metal_trap(int ecode) + * + * Trigger a machine-mode trap with exception code ecode + */ +.global _metal_trap +.type _metal_trap, @function + +_metal_trap: + + /* Store the instruction which called _metal_trap in mepc */ + addi t0, ra, -1 + csrw mepc, t0 + + /* Set mcause to the desired exception code */ + csrw mcause, a0 + + /* Read mstatus */ + csrr t0, mstatus + + /* Set MIE=0 */ + li t1, -1 + xori t1, t1, 8 /*_RB_ METAL_MSTATUS_MIE_SHIFT*/ + and t0, t0, t1 + + /* Set MPP=M */ + li t1, 3 /*_RB_ METAL_MSTATUS_MPP_M*/ + slli t1, t1, 11 /*_RB_METAL_MSTATUS_MPP_SHIFT*/ + or t0, t0, t1 + + /* Write mstatus */ + csrw mstatus, t0 + + /* Read mtvec */ + csrr t0, mtvec + + /* + * Mask the mtvec MODE bits + * Exceptions always jump to mtvec.BASE regradless of the vectoring mode. + */ + andi t0, t0, 3 /*_RB_METAL_MTVEC_MODE_MASK*/ + + /* Jump to mtvec */ + jr t0 + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/tty.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/tty.c new file mode 100644 index 000000000..c47cc44fd --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/tty.c @@ -0,0 +1,37 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include + +#if defined(__METAL_DT_STDOUT_UART_HANDLE) +/* This implementation serves as a small shim that interfaces with the first + * UART on a system. */ +int metal_tty_putc(unsigned char c) +{ + if (c == '\n') { + int out = metal_uart_putc(__METAL_DT_STDOUT_UART_HANDLE, '\r'); + if (out != 0) + return out; + } + return metal_uart_putc(__METAL_DT_STDOUT_UART_HANDLE, c); +} + +#ifndef __METAL_DT_STDOUT_UART_BAUD +#define __METAL_DT_STDOUT_UART_BAUD 115200 +#endif + +static void metal_tty_init(void) __attribute__((constructor)); +static void metal_tty_init(void) +{ + metal_uart_init(__METAL_DT_STDOUT_UART_HANDLE, __METAL_DT_STDOUT_UART_BAUD); +} +#else +/* This implementation of putc doesn't actually do anything, it's just there to + * provide a shim that eats all the characters so we can ensure that everything + * can link to metal_tty_putc. */ +int nop_putc(unsigned char c) __attribute__((section(".text.metal.nop.putc"))); +int nop_putc(unsigned char c) { return -1; } +int metal_tty_putc(unsigned char c) __attribute__((weak, alias("nop_putc"))); +#warning "There is no default output device, metal_tty_putc() will throw away all input." +#endif diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/uart.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/uart.c new file mode 100644 index 000000000..daab33ab0 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/src/uart.c @@ -0,0 +1,10 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include + +extern inline void metal_uart_init(struct metal_uart *uart, int baud_rate); +extern inline int metal_uart_putc(struct metal_uart *uart, unsigned char c); +extern inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c); +extern inline int metal_uart_get_baud_rate(struct metal_uart *uart); +extern inline int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE new file mode 100644 index 000000000..201a5c0fd --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE @@ -0,0 +1,3 @@ +This source repository is release under Apache2 and MIT licenses. + +See LICENSE.Apache2 and LICENSE.MIT for details. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.Apache2 b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.Apache2 new file mode 100644 index 000000000..d64569567 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.Apache2 @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.MIT b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.MIT new file mode 100644 index 000000000..3a7e422b6 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/LICENSE.MIT @@ -0,0 +1,21 @@ +The MIT License + +Copyright (c) 2019 SiFive, Inc. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/README.md b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/README.md new file mode 100644 index 000000000..795e821b3 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/README.md @@ -0,0 +1,2 @@ +# sifive-welcome +A simple welcome example which prints SiFive banner and uses board LEDs diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/sifive-welcome.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/sifive-welcome.c new file mode 100644 index 000000000..e23ece348 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/sifive-welcome.c @@ -0,0 +1,158 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include +#include +#include +#include +#include + +#define RTC_FREQ 32768 + +struct metal_cpu *cpu0; +struct metal_interrupt *cpu_intr, *tmr_intr; +int tmr_id; +volatile uint32_t timer_isr_flag; + +void display_banner (void) { + + printf("\n"); + printf("\n"); + printf(" SIFIVE, INC.\n"); + printf("\n"); + printf(" 5555555555555555555555555\n"); + printf(" 5555 5555\n"); + printf(" 5555 5555\n"); + printf(" 5555 5555\n"); + printf(" 5555 5555555555555555555555\n"); + printf(" 5555 555555555555555555555555\n"); + printf(" 5555 5555\n"); + printf(" 5555 5555\n"); + printf(" 5555 5555\n"); + printf(" 5555555555555555555555555555 55555\n"); + printf(" 55555 555555555 55555\n"); + printf(" 55555 55555 55555\n"); + printf(" 55555 5 55555\n"); + printf(" 55555 55555\n"); + printf(" 55555 55555\n"); + printf(" 55555 55555\n"); + printf(" 55555 55555\n"); + printf(" 55555 55555\n"); + printf(" 555555555\n"); + printf(" 55555\n"); + printf(" 5\n"); + printf("\n"); + + printf("\n"); + printf(" Welcome to SiFive!\n"); + +} + +void timer_isr (int id, void *data) { + + // Disable Timer interrupt + metal_interrupt_disable(tmr_intr, tmr_id); + + // Flag showing we hit timer isr + timer_isr_flag = 1; +} + +void wait_for_timer(struct metal_led *which_led) { + + // clear global timer isr flag + timer_isr_flag = 0; + + // Turn on desired LED + metal_led_on(which_led); + + // Set timer + metal_cpu_set_mtimecmp(cpu0, metal_cpu_get_mtime(cpu0) + RTC_FREQ); + + // Enable Timer interrupt + metal_interrupt_enable(tmr_intr, tmr_id); + + // wait till timer triggers and isr is hit + while (timer_isr_flag == 0){}; + + timer_isr_flag = 0; + + // Turn off this LED + metal_led_off(which_led); +} + +int main (void) +{ + int rc, up_cnt, dn_cnt; + struct metal_led *led0_red, *led0_green, *led0_blue; + + // This demo will toggle LEDs colors so we define them here + led0_red = metal_led_get_rgb("LD0", "red"); + led0_green = metal_led_get_rgb("LD0", "green"); + led0_blue = metal_led_get_rgb("LD0", "blue"); + if ((led0_red == NULL) || (led0_green == NULL) || (led0_blue == NULL)) { + printf("At least one of LEDs is null.\n"); + return 1; + } + + // Enable each LED + metal_led_enable(led0_red); + metal_led_enable(led0_green); + metal_led_enable(led0_blue); + + // All Off + metal_led_off(led0_red); + metal_led_off(led0_green); + metal_led_off(led0_blue); + + // Lets get the CPU and and its interrupt + cpu0 = metal_cpu_get(0); + if (cpu0 == NULL) { + printf("CPU null.\n"); + return 2; + } + cpu_intr = metal_cpu_interrupt_controller(cpu0); + if (cpu_intr == NULL) { + printf("CPU interrupt controller is null.\n"); + return 3; + } + metal_interrupt_init(cpu_intr); + + // display welcome banner + display_banner(); + + // Setup Timer and its interrupt so we can toggle LEDs on 1s cadence + tmr_intr = metal_cpu_timer_interrupt_controller(cpu0); + if (tmr_intr == NULL) { + printf("TIMER interrupt controller is null.\n"); + return 4; + } + metal_interrupt_init(tmr_intr); + tmr_id = metal_cpu_timer_get_interrupt_id(cpu0); + rc = metal_interrupt_register_handler(tmr_intr, tmr_id, timer_isr, cpu0); + if (rc < 0) { + printf("TIMER interrupt handler registration failed\n"); + return (rc * -1); + } + + // Lastly CPU interrupt + if (metal_interrupt_enable(cpu_intr, 0) == -1) { + printf("CPU interrupt enable failed\n"); + return 6; + } + + // Red -> Green -> Blue, repeat + while (1) { + + // Turn on RED + wait_for_timer(led0_red); + + // Turn on Green + wait_for_timer(led0_green); + + // Turn on Blue + wait_for_timer(led0_blue); + } + + // return + return 0; +} -- 2.39.2