module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
+static unsigned short blacklist = 1;
+module_param(blacklist, ushort, 0);
+MODULE_PARM_DESC(blacklist,
+ "Enable/disable blacklist (1=enable, 0=disable, default 1)");
+
static struct platform_device *it87_pdev[2];
static bool it87_sio4e_broken;
#ifdef __IT87_USE_ACPI_MUTEX
const char * const suffix;
u32 features;
u8 num_temp_limit;
+ u8 num_temp_offset;
u8 peci_mask;
u8 old_peci_mask;
};
#define FEAT_NEWER_AUTOPWM BIT(1)
#define FEAT_OLD_AUTOPWM BIT(2)
#define FEAT_16BIT_FANS BIT(3)
-#define FEAT_TEMP_OFFSET BIT(4)
#define FEAT_TEMP_PECI BIT(5)
#define FEAT_TEMP_OLD_PECI BIT(6)
#define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
.features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
/* may need to overwrite */
.num_temp_limit = 3,
+ .num_temp_offset = 0,
},
[it8712] = {
.name = "it8712",
.features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
/* may need to overwrite */
.num_temp_limit = 3,
+ .num_temp_offset = 0,
},
[it8716] = {
.name = "it8716",
.suffix = "F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ .features = FEAT_16BIT_FANS | FEAT_VID
| FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
},
[it8718] = {
.name = "it8718",
.suffix = "F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ .features = FEAT_16BIT_FANS | FEAT_VID
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.old_peci_mask = 0x4,
},
[it8720] = {
.name = "it8720",
.suffix = "F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ .features = FEAT_16BIT_FANS | FEAT_VID
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.old_peci_mask = 0x4,
},
[it8721] = {
.name = "it8721",
.suffix = "F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
+ | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x05,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
.name = "it8728",
.suffix = "F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
+ | FEAT_TEMP_PECI | FEAT_FIVE_FANS
| FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
| FEAT_FANCTL_ONOFF,
- .num_temp_limit = 3,
+ .num_temp_limit = 6,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8732] = {
.name = "it8732",
.suffix = "F",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
+ | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
| FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
.name = "it8771",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
+ | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
/* PECI: guesswork */
/* 12mV ADC (OHM) */
/* 16 bit fans (OHM) */
/* three fans, always 16 bit (guesswork) */
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8772] = {
.name = "it8772",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
+ | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
/* PECI (coreboot) */
/* 12mV ADC (HWSensors4, OHM) */
/* 16 bit fans (HWSensors4, OHM) */
/* three fans, always 16 bit (datasheet) */
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8781] = {
.name = "it8781",
.suffix = "F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
+ .features = FEAT_16BIT_FANS
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.old_peci_mask = 0x4,
},
[it8782] = {
.name = "it8782",
.suffix = "F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
+ .features = FEAT_16BIT_FANS
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.old_peci_mask = 0x4,
},
[it8783] = {
.name = "it8783",
.suffix = "E/F",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
+ .features = FEAT_16BIT_FANS
| FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.old_peci_mask = 0x4,
},
[it8786] = {
.name = "it8786",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
+ | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8790] = {
.name = "it8790",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
- | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
+ | FEAT_16BIT_FANS | FEAT_TEMP_PECI
| FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8792] = {
.name = "it8792",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
- | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
+ | FEAT_16BIT_FANS | FEAT_TEMP_PECI
| FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8603] = {
.name = "it8603",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
+ | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8607] = {
.name = "it8607",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
+ | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
| FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8613] = {
.name = "it8613",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
+ | FEAT_TEMP_PECI | FEAT_FIVE_FANS
| FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
| FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
.num_temp_limit = 6,
+ .num_temp_offset = 6,
.peci_mask = 0x07,
},
[it8620] = {
.name = "it8620",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
+ | FEAT_TEMP_PECI | FEAT_SIX_FANS
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
| FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
| FEAT_FANCTL_ONOFF,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8622] = {
.name = "it8622",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
+ | FEAT_TEMP_PECI | FEAT_FIVE_FANS
| FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
| FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
.num_temp_limit = 3,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8625] = {
.name = "it8625",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
+ | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
| FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
| FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
.num_temp_limit = 6,
+ .num_temp_offset = 6,
},
[it8628] = {
.name = "it8628",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
+ | FEAT_TEMP_PECI | FEAT_SIX_FANS
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
| FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
| FEAT_FANCTL_ONOFF,
- .num_temp_limit = 3,
+ .num_temp_limit = 6,
+ .num_temp_offset = 3,
.peci_mask = 0x07,
},
[it8655] = {
.name = "it8655",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
+ | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
.num_temp_limit = 6,
+ .num_temp_offset = 6,
},
[it8665] = {
.name = "it8665",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
+ | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
| FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
| FEAT_SIX_PWM | FEAT_BANK_SEL,
.num_temp_limit = 6,
+ .num_temp_offset = 6,
},
[it8686] = {
.name = "it8686",
.suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
+ | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
| FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
.num_temp_limit = 6,
+ .num_temp_offset = 6,
},
};
#define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
-#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
((data)->peci_mask & BIT(nr)))
#define has_temp_old_peci(data, nr) \
u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
u8 has_temp; /* Bitfield, temp sensors enabled */
s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
- u8 num_temp_limit; /* Number of temp limit/offset registers */
+ u8 num_temp_limit; /* Number of temperature limit registers */
+ u8 num_temp_offset; /* Number of temperature offset registers */
u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
if (i >= data->num_temp_limit)
continue;
- if (has_temp_offset(data))
+ if (i < data->num_temp_offset)
data->temp[i][3] =
it87_read_value(data,
data->REG_TEMP_OFFSET[i]);
return attr->mode;
}
- if (a == 5 && !has_temp_offset(data))
+ if (a == 5 && i >= data->num_temp_offset)
return 0;
if (a == 6 && !data->has_beep)
/* Initialize chip specific register pointers */
switch (data->type) {
+ case it8628:
case it8686:
data->REG_FAN = IT87_REG_FAN;
data->REG_FANX = IT87_REG_FANX;
data->type = sio_data->type;
data->features = it87_devices[sio_data->type].features;
data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
+ data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
data->peci_mask = it87_devices[sio_data->type].peci_mask;
data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
data->bank = 0xff;
for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
/*
- * Accessing the second Super-IO chi can result in board
+ * Accessing the second Super-IO chip can result in board
* hangs. Disable until we figure out what is going on.
*/
- if (it87_sio4e_broken && sioaddr[i] == 0x4e)
+ if (blacklist && it87_sio4e_broken && sioaddr[i] == 0x4e)
continue;
memset(&sio_data, 0, sizeof(struct it87_sio_data));
isa_address = 0;