* IT8620E Super I/O chip w/LPC interface
* IT8622E Super I/O chip w/LPC interface
* IT8623E Super I/O chip w/LPC interface
+ * IT8625E Super I/O chip w/LPC interface
* IT8628E Super I/O chip w/LPC interface
* IT8655E Super I/O chip w/LPC interface
* IT8665E Super I/O chip w/LPC interface
enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
it8771, it8772, it8781, it8782, it8783, it8786, it8790,
- it8792, it8603, it8607, it8613, it8620, it8622, it8628, it8655,
- it8665, it8686 };
+ it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
+ it8655, it8665, it8686 };
static unsigned short force_id;
module_param(force_id, ushort, 0);
#define IT8620E_DEVID 0x8620
#define IT8622E_DEVID 0x8622
#define IT8623E_DEVID 0x8623
+#define IT8625E_DEVID 0x8625
#define IT8628E_DEVID 0x8628
#define IT8655E_DEVID 0x8655
#define IT8665E_DEVID 0x8665
.num_temp_limit = 3,
.peci_mask = 0x07,
},
- [it8613] = {
- .name = "it8613",
- .suffix = "E",
- .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
- | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
- | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
- .num_temp_limit = 6,
- .peci_mask = 0x07,
- },
+ [it8613] = {
+ .name = "it8613",
+ .suffix = "E",
+ .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
+ | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
+ | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
+ .num_temp_limit = 6,
+ .peci_mask = 0x07,
+ },
[it8620] = {
.name = "it8620",
.suffix = "E",
.num_temp_limit = 3,
.peci_mask = 0x07,
},
+ [it8625] = {
+ .name = "it8625",
+ .suffix = "E",
+ .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
+ | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
+ | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
+ | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
+ .num_temp_limit = 6,
+ },
[it8628] = {
.name = "it8628",
.suffix = "E",
break;
}
break;
+ case it8625:
+ if (index < 3)
+ break;
case it8655:
case it8665:
if (src1 < 3) {
sio_data->type = it8607;
break;
case IT8613E_DEVID:
- sio_data->type = it8613;
- break;
+ sio_data->type = it8613;
+ break;
case IT8620E_DEVID:
sio_data->type = it8620;
break;
case IT8622E_DEVID:
sio_data->type = it8622;
break;
+ case IT8625E_DEVID:
+ sio_data->type = it8625;
+ break;
case IT8628E_DEVID:
sio_data->type = it8628;
break;
sio_data->beep_pin = superio_inb(sioaddr,
IT87_SIO_BEEP_PIN_REG) & 0x3f;
- } else if (sio_data->type == it8665) {
- int reg;
+ } else if (sio_data->type == it8665 || sio_data->type == it8625) {
+ int reg27, reg29, reg2d, regd3;
superio_select(sioaddr, GPIO);
- /* Check for pwm2 */
- reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
- if (reg & BIT(1))
- sio_data->skip_pwm |= BIT(1);
+ reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
+ reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
+ reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
+ regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
- /* Check for fan2 */
- reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
- if (reg & BIT(4))
+ /* Check for pwm2, fan2 */
+ if (reg29 & BIT(1))
+ sio_data->skip_pwm |= BIT(1);
+ if (reg2d & BIT(4))
sio_data->skip_fan |= BIT(1);
/* Check for pwm3, fan3 */
- reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
- if (reg & BIT(6))
+ if (reg27 & BIT(6))
sio_data->skip_pwm |= BIT(2);
- if (reg & BIT(7))
+ if (reg27 & BIT(7))
sio_data->skip_fan |= BIT(2);
- /* Check for pwm5, fan5 */
- reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
- if (reg & BIT(5))
- sio_data->skip_pwm |= BIT(4);
- if (!(reg & BIT(4)))
- sio_data->skip_fan |= BIT(4);
+ /* Check for pwm4, fan4, pwm5, fan5 */
+ if (sio_data->type == it8625) {
+ int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
+
+ if (reg25 & BIT(6))
+ sio_data->skip_fan |= BIT(3);
+ if (reg25 & BIT(5))
+ sio_data->skip_pwm |= BIT(3);
+ if (reg27 & BIT(3))
+ sio_data->skip_pwm |= BIT(4);
+ if (reg27 & BIT(1))
+ sio_data->skip_fan |= BIT(4);
+ } else {
+ int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
+
+ if (regd3 & BIT(2))
+ sio_data->skip_pwm |= BIT(3);
+ if (regd3 & BIT(3))
+ sio_data->skip_fan |= BIT(3);
+ if (reg26 & BIT(5))
+ sio_data->skip_pwm |= BIT(4);
+ if (!(reg26 & BIT(4)))
+ sio_data->skip_fan |= BIT(4);
+ }
- /* Check for pwm4, fan4, pwm6, fan6 */
- reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
- if (reg & BIT(2))
- sio_data->skip_pwm |= BIT(3);
- if (reg & BIT(3))
- sio_data->skip_fan |= BIT(3);
- if (reg & BIT(0))
+ /* Check for pwm6, fan6 */
+ if (regd3 & BIT(0))
sio_data->skip_pwm |= BIT(5);
- if (reg & BIT(1))
+ if (regd3 & BIT(1))
sio_data->skip_fan |= BIT(5);
sio_data->beep_pin = superio_inb(sioaddr,
return err;
}
-/* Called when we have found a new IT87. */
-static void it87_init_device(struct platform_device *pdev)
+static void it87_init_regs(struct platform_device *pdev)
{
- struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
struct it87_data *data = platform_get_drvdata(pdev);
- int tmp, i;
- u8 mask;
/* Initialize chip specific register pointers */
switch (data->type) {
data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
break;
+ case it8625:
case it8655:
case it8665:
data->REG_FAN = IT87_REG_FAN_8665;
data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
break;
case it8613:
- data->REG_FAN = IT87_REG_FAN;
- data->REG_FANX = IT87_REG_FANX;
- data->REG_FAN_MIN = IT87_REG_FAN_MIN;
- data->REG_FANX_MIN = IT87_REG_FANX_MIN;
- data->REG_PWM = IT87_REG_PWM_8665;
- data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
- data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
- data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
- break;
+ data->REG_FAN = IT87_REG_FAN;
+ data->REG_FANX = IT87_REG_FANX;
+ data->REG_FAN_MIN = IT87_REG_FAN_MIN;
+ data->REG_FANX_MIN = IT87_REG_FANX_MIN;
+ data->REG_PWM = IT87_REG_PWM_8665;
+ data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
+ data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
+ data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
+ break;
default:
data->REG_FAN = IT87_REG_FAN;
data->REG_FANX = IT87_REG_FANX;
data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
break;
}
+}
+
+/* Called when we have found a new IT87. */
+static void it87_init_device(struct platform_device *pdev)
+{
+ struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
+ struct it87_data *data = platform_get_drvdata(pdev);
+ int tmp, i;
+ u8 mask;
/*
* For each PWM channel:
if (tmp & BIT(2))
data->has_fan |= BIT(5); /* fan6 enabled */
break;
+ case it8625:
case it8665:
tmp = it87_read_value(data, IT87_REG_FAN_DIV);
if (tmp & BIT(3))
mutex_init(&data->update_lock);
+ /* Initialize register pointers */
+ it87_init_regs(pdev);
+
/* Check PWM configuration */
enable_pwm_interface = it87_check_pwm(dev);
},
.driver_data = &gigabyte_ab350_gaming,
},
+ {
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
+ DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"),
+ },
+ .driver_data = &gigabyte_ab350_gaming,
+ },
{
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),