const struct attribute_group *groups[7];
enum chips type;
u32 features;
- u8 bank;
u8 peci_mask;
u8 old_peci_mask;
s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
u8 num_temp_limit; /* Number of temperature limit registers */
u8 num_temp_offset; /* Number of temperature offset registers */
+ u8 temp_src[4]; /* Up to 4 temperature source registers */
u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
}
-static void it87_set_bank(struct it87_data *data, u8 bank)
+static u8 it87_set_bank(struct it87_data *data, u8 bank)
{
- if (has_bank_sel(data) && bank != data->bank) {
+ u8 _bank = bank;
+
+ if (has_bank_sel(data)) {
u8 breg = _it87_read_value(data, IT87_REG_BANK);
- breg &= 0x1f;
- breg |= (bank << 5);
- data->bank = bank;
- _it87_write_value(data, IT87_REG_BANK, breg);
+ _bank = breg >> 5;
+ if (bank != _bank) {
+ breg &= 0x1f;
+ breg |= (bank << 5);
+ _it87_write_value(data, IT87_REG_BANK, breg);
+ }
}
+ return _bank;
}
/*
*/
static int it87_read_value(struct it87_data *data, u16 reg)
{
- it87_set_bank(data, reg >> 8);
- return _it87_read_value(data, reg & 0xff);
+ u8 bank;
+ int val;
+
+ bank = it87_set_bank(data, reg >> 8);
+ val = _it87_read_value(data, reg & 0xff);
+ it87_set_bank(data, bank);
+
+ return val;
}
/*
*/
static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
{
- it87_set_bank(data, reg >> 8);
+ u8 bank;
+
+ bank = it87_set_bank(data, reg >> 8);
_it87_write_value(data, reg & 0xff, value);
+ it87_set_bank(data, bank);
}
static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
int type = 0;
if (has_bank_sel(data)) {
- int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
u8 src1, src2;
- src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
+ src1 = (data->temp_src[index / 2] >> ((index % 2) * 4)) & 0x0f;
switch (data->type) {
case it8686:
index = src1;
break;
}
- src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
+ src2 = data->temp_src[3];
switch(src1) {
case 3:
type = (src2 & BIT(index)) ? 6 : 5;
}
}
+ if (has_bank_sel(data)) {
+ for (i = 0; i < 3; i++)
+ data->temp_src[i] =
+ it87_read_value(data, IT87_REG_TEMP_SRC1[i]);
+ data->temp_src[3] = it87_read_value(data, IT87_REG_TEMP_SRC2);
+ }
+
/* Start monitoring */
it87_write_value(data, IT87_REG_CONFIG,
(it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
data->peci_mask = it87_devices[sio_data->type].peci_mask;
data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
- data->bank = 0xff;
/*
* IT8705F Datasheet 0.4.1, 3h == Version G.