outb(ld, ioreg + 1);
}
-static inline void
+static inline int
superio_enter(int ioreg)
{
+ /*
+ * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
+ */
+ if (!request_muxed_region(ioreg, 2, DRVNAME))
+ return -EBUSY;
+
outb(0x87, ioreg);
outb(0x87, ioreg);
+
+ return 0;
}
static inline void
outb(0xaa, ioreg);
outb(0x02, ioreg);
outb(0x02, ioreg + 1);
+ release_region(ioreg, 2);
}
/*
0x105, 0x205, 0x305, 0x805, 0x905 };
static const u16 NCT6775_REG_FAN_START_OUTPUT[]
= { 0x106, 0x206, 0x306, 0x806, 0x906 };
+static const u16 NCT6775_REG_FAN_STEP_ENABLE[] = {
+ 0x120, 0x220, 0x320, 0x820, 0x920 };
static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
static const u16 NCT6775_REG_TEMP_OVER[]
= { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
+static const u16 NCT6779_REG_TEMP_HYST[]
+ = { 0x3a, 0x153, 0, 0, 0, 0 };
+static const u16 NCT6779_REG_TEMP_OVER[]
+ = { 0x39, 0x155, 0, 0, 0, 0 };
+
static const u16 NCT6775_REG_TEMP_SOURCE[]
= { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
static const u16 NCT6776_REG_TEMP_CONFIG[11]
= { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
-static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
+static const u16 NCT6779_REG_TEMP_CONFIG[11] = { 0x18, 0x152 };
static const u16 NCT6775_REG_AUTO_TEMP[]
= { 0x121, 0x221, 0x321, 0x821, 0x921 };
0x408, 0 };
static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
- = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06, 0xa07 };
+ = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
+ 0xa07 };
static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
= { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
*/
const u16 *REG_PWM_READ;
- const u16 *REG_TEMP_MON;
const u16 *REG_AUTO_TEMP;
const u16 *REG_AUTO_PWM;
const u16 *REG_CRITICAL_TEMP_TOLERANCE;
const u16 *REG_TEMP_SOURCE; /* temp register sources */
- const u16 *REG_TEMP_SEL[2]; /* pwm temp, 0=base, 1=weight */
+ const u16 *REG_TEMP_SEL[3]; /* pwm temp:
+ * 0=base, 1=weight, 2=step enable
+ */
const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=hyst, 2=step */
u8 temp_fixed_num; /* 3 or 6 */
u8 temp_type[NUM_TEMP_FIXED];
s8 temp_offset[NUM_TEMP_FIXED];
- s16 temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
+ s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
+ * 3=temp_crit */
u64 alarms;
u8 pwm_num; /* number of pwm */
* [5]=weight_duty_step, [6]=weight_duty_base
*/
u8 target_temp[5];
- s16 pwm_temp[5];
u8 tolerance[5][2];
u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
u8 pwm_temp_sel[2][5];
- bool pwm_sel_enable[2][5];/* 0->stop_val, 1->weight;
+ bool pwm_sel_enable[3][5];/* 0->stop_val, 1->weight, 2->step;
* false->off, true->on
*/
u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
| ((data->fan_div[1] << 4) & 0x70);
nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
+ break;
case 2:
reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
| (data->fan_div[2] & 0x7);
data->pwm_sel_enable[1][i] =
nct6775_read_value(data, data->REG_TEMP_SEL[1][i])
& 0x80;
+ data->pwm_sel_enable[2][i] =
+ nct6775_read_value(data, data->REG_TEMP_SEL[2][i])
+ & 0x01;
/* Weight data */
for (j = 0; j < 2; j++) {
data->target_temp[i] =
nct6775_read_value(data, data->REG_TARGET[i]) &
(data->pwm_mode[i] ? 0xff : 0x7f);
- data->pwm_temp[i] =
- nct6775_read_value(data, data->REG_TEMP_MON[i]);
for (j = 0; j < data->auto_pwm_num; j++) {
data->auto_pwm[i][j] =
return count;
}
-static ssize_t
-show_pwm_temp(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct nct6775_data *data = nct6775_update_device(dev);
- struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
- int nr = sattr->index;
-
- return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->pwm_temp[nr]));
-}
-
static ssize_t
show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
{
struct nct6775_data *data = nct6775_update_device(dev);
struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int i, src, sel = 0;
- return sprintf(buf, "%d\n",
- data->pwm_temp_sel[sattr->index][sattr->nr]);
+ src = data->pwm_temp_sel[sattr->index][sattr->nr];
+
+ for (i = 0; i < NUM_TEMP; i++) {
+ if (!(data->have_temp & (1 << i)))
+ continue;
+ if (src == data->temp_src[i]) {
+ sel = i + 1;
+ break;
+ }
+ }
+
+ return sprintf(buf, "%d\n", sel);
}
static ssize_t
int nr = sattr->nr;
int index = sattr->index;
unsigned long val;
- int err;
- int reg;
+ int err, reg, src;
err = kstrtoul(buf, 10, &val);
if (err < 0)
return err;
- if (val == 0 || val > 0x1f)
+ if (val == 0 || val > NUM_TEMP)
return -EINVAL;
-
- val = SENSORS_LIMIT(val, 1, data->temp_label_num - 1);
-
- if (!strlen(data->temp_label[val]))
+ if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
return -EINVAL;
mutex_lock(&data->update_lock);
- data->pwm_temp_sel[index][nr] = val;
+ src = data->temp_src[val - 1];
+ data->pwm_temp_sel[index][nr] = src;
reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
reg &= 0xe0;
- reg |= val;
+ reg |= src;
nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
mutex_unlock(&data->update_lock);
static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
store_target_temp, 4);
-/* Monitored pwm temperatures */
-static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_pwm_temp, NULL, 0);
-static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_pwm_temp, NULL, 1);
-static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_pwm_temp, NULL, 2);
-static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_pwm_temp, NULL, 3);
-static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_pwm_temp, NULL, 4);
-
/* Smart Fan registers */
static ssize_t
unsigned long val;
int err;
u8 reg;
+ static const u8 bit[] = { 0x80, 0x80, 0x01 };
+
err = kstrtoul(buf, 10, &val);
if (err < 0)
mutex_lock(&data->update_lock);
data->pwm_sel_enable[index][nr] = val;
reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
- reg &= 0x7f;
+ reg &= ~bit[index];
if (val)
- reg |= 0x80;
+ reg |= bit[index];
nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
mutex_unlock(&data->update_lock);
return count;
static SENSOR_DEVICE_ATTR_2(pwm5_weight_enable, S_IWUSR | S_IRUGO,
show_pwm_sel_enable, store_pwm_sel_enable, 4, 1);
+static SENSOR_DEVICE_ATTR_2(pwm1_step_enable, S_IWUSR | S_IRUGO,
+ show_pwm_sel_enable, store_pwm_sel_enable, 0, 2);
+static SENSOR_DEVICE_ATTR_2(pwm2_step_enable, S_IWUSR | S_IRUGO,
+ show_pwm_sel_enable, store_pwm_sel_enable, 1, 2);
+static SENSOR_DEVICE_ATTR_2(pwm3_step_enable, S_IWUSR | S_IRUGO,
+ show_pwm_sel_enable, store_pwm_sel_enable, 2, 2);
+static SENSOR_DEVICE_ATTR_2(pwm4_step_enable, S_IWUSR | S_IRUGO,
+ show_pwm_sel_enable, store_pwm_sel_enable, 3, 2);
+static SENSOR_DEVICE_ATTR_2(pwm5_step_enable, S_IWUSR | S_IRUGO,
+ show_pwm_sel_enable, store_pwm_sel_enable, 4, 2);
+
static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
show_pwm_temp_sel, store_pwm_temp_sel, 0, 1);
static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
static struct attribute *nct6775_attributes_pwm[5][20] = {
{
- &sensor_dev_attr_temp11_input.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_stop_output_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_weight_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm1_step_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
&sensor_dev_attr_pwm1_target.dev_attr.attr,
&sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
NULL
},
{
- &sensor_dev_attr_temp12_input.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_mode.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_stop_output_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_weight_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm2_step_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
&sensor_dev_attr_pwm2_target.dev_attr.attr,
&sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
NULL
},
{
- &sensor_dev_attr_temp13_input.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_mode.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_stop_output_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_weight_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm3_step_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
&sensor_dev_attr_pwm3_target.dev_attr.attr,
&sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
NULL
},
{
- &sensor_dev_attr_temp14_input.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm4_mode.dev_attr.attr,
&sensor_dev_attr_pwm4_enable.dev_attr.attr,
&sensor_dev_attr_pwm4_stop_output_enable.dev_attr.attr,
&sensor_dev_attr_pwm4_weight_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm4_step_enable.dev_attr.attr,
&sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
&sensor_dev_attr_pwm4_target.dev_attr.attr,
&sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
NULL
},
{
- &sensor_dev_attr_temp15_input.dev_attr.attr,
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_mode.dev_attr.attr,
&sensor_dev_attr_pwm5_enable.dev_attr.attr,
&sensor_dev_attr_pwm5_stop_output_enable.dev_attr.attr,
&sensor_dev_attr_pwm5_weight_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm5_step_enable.dev_attr.attr,
&sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
&sensor_dev_attr_pwm5_target.dev_attr.attr,
&sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
unsigned long val;
u8 reg;
+ int ret;
if (kstrtoul(buf, 10, &val) || val != 0)
return -EINVAL;
* The CR registers are the same for all chips, and not all chips
* support clearing the caseopen status through "regular" registers.
*/
- superio_enter(sio_data->sioreg);
+ ret = superio_enter(sio_data->sioreg);
+ if (ret) {
+ count = ret;
+ goto error;
+ }
+
superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
superio_exit(sio_data->sioreg);
data->valid = 0; /* Force cache refresh */
-
+error:
mutex_unlock(&data->update_lock);
-
return count;
}
}
}
-static void __devinit
+static int __devinit
nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
struct nct6775_data *data)
{
int regval;
bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
bool pwm3pin, pwm4pin, pwm5pin;
+ int ret;
- superio_enter(sio_data->sioreg);
+ ret = superio_enter(sio_data->sioreg);
+ if (ret)
+ return ret;
/* fan4 and fan5 share some pins with the GPIO and serial flash */
if (data->kind == nct6775) {
data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
+
+ return 0;
}
static int __devinit nct6775_probe(struct platform_device *pdev)
int num_reg_temp;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
- if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
- err = -EBUSY;
- dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
- (unsigned long)res->start,
- (unsigned long)res->start + IOREGION_LENGTH - 1);
- goto exit;
- }
+ if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
+ DRVNAME))
+ return -EBUSY;
data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
GFP_KERNEL);
- if (!data) {
- err = -ENOMEM;
- goto exit_release;
- }
+ if (!data)
+ return -ENOMEM;
data->kind = sio_data->kind;
data->addr = res->start;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
- data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_TEMP_SEL[2] = NCT6775_REG_FAN_STEP_ENABLE;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
- data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_TEMP_SEL[2] = NCT6775_REG_FAN_STEP_ENABLE;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_PWM_READ = NCT6775_REG_PWM_READ;
data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
- data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_TEMP_SEL[2] = NCT6775_REG_FAN_STEP_ENABLE;
data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
reg_temp = NCT6779_REG_TEMP;
num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
- reg_temp_over = NCT6775_REG_TEMP_OVER;
- reg_temp_hyst = NCT6775_REG_TEMP_HYST;
- reg_temp_config = NCT6776_REG_TEMP_CONFIG;
+ reg_temp_over = NCT6779_REG_TEMP_OVER;
+ reg_temp_hyst = NCT6779_REG_TEMP_HYST;
+ reg_temp_config = NCT6779_REG_TEMP_CONFIG;
reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
reg_temp_crit = NCT6779_REG_TEMP_CRIT;
break;
default:
- err = -ENODEV;
- goto exit_release;
+ return -ENODEV;
}
data->have_in = (1 << data->in_num) - 1;
data->have_temp = 0;
if (data->have_temp & (1 << i))
continue;
data->have_temp |= 1 << i;
+ data->have_temp_fixed |= 1 << i;
data->reg_temp[0][i] = reg_temp_alternate[i];
+ data->reg_temp[1][i] = reg_temp_over[i];
+ data->reg_temp[2][i] = reg_temp_hyst[i];
data->temp_src[i] = i + 1;
continue;
}
* VIN5 / AUXTIN1
* VIN6 / AUXTIN2
* VIN7 / AUXTIN3
- * Assume voltage is disabled if the respective temperature is
- * used as temperature source.
+ *
+ * There does not seem to be a clean way to detect if VINx or
+ * AUXTINx is active, so for keep both sensor types enabled
+ * for now.
*/
- for (i = 0; i < ARRAY_SIZE(NCT6779_REG_TEMP); i++) {
- if (!(data->have_temp & (1 << i)))
- continue;
- if (i == 2) /* AUXTIN0 */
- data->have_in &= ~(1 << 6); /* no VIN4 */
- if (i == 3) /* AUXTIN1 */
- data->have_in &= ~(1 << 10); /* no VIN5 */
- if (i == 4) /* AUXTIN2 */
- data->have_in &= ~(1 << 11); /* no VIN6 */
- if (i == 5) /* AUXTIN3 */
- data->have_in &= ~(1 << 14); /* no VIN7 */
- }
break;
}
nct6775_init_device(data);
data->vrm = vid_which_vrm();
- superio_enter(sio_data->sioreg);
+ err = superio_enter(sio_data->sioreg);
+ if (err)
+ return err;
+
/*
* Read VID value
* We can get the VID input values directly at logical device D 0xe3.
*/
superio_select(sio_data->sioreg, NCT6775_LD_VID);
data->vid = superio_inb(sio_data->sioreg, 0xe3);
- err = device_create_file(dev, &dev_attr_cpu0_vid);
- if (err)
- goto exit_release;
if (fan_debounce) {
u8 tmp;
superio_exit(sio_data->sioreg);
- nct6775_check_fan_inputs(sio_data, data);
+ err = device_create_file(dev, &dev_attr_cpu0_vid);
+ if (err)
+ return err;
+
+ err = nct6775_check_fan_inputs(sio_data, data);
+ if (err)
+ goto exit_remove;
/* Read fan clock dividers immediately */
nct6775_update_fan_div_common(dev, data);
exit_remove:
nct6775_device_remove_files(dev);
-exit_release:
- release_region(res->start, IOREGION_LENGTH);
-exit:
return err;
}
hwmon_device_unregister(data->hwmon_dev);
nct6775_device_remove_files(&pdev->dev);
- release_region(data->addr, IOREGION_LENGTH);
return 0;
}
static int __init nct6775_find(int sioaddr, unsigned short *addr,
struct nct6775_sio_data *sio_data)
{
- static const char __initdata sio_name_NCT6775[] = "NCT6775F";
- static const char __initdata sio_name_NCT6776[] = "NCT6776F";
- static const char __initdata sio_name_NCT6779[] = "NCT6779D";
+ static const char sio_name_NCT6775[] __initconst = "NCT6775F";
+ static const char sio_name_NCT6776[] __initconst = "NCT6776F";
+ static const char sio_name_NCT6779[] __initconst = "NCT6779D";
u16 val;
const char *sio_name;
+ int err;
- superio_enter(sioaddr);
+ err = superio_enter(sioaddr);
+ if (err)
+ return err;
if (force_id)
val = force_id;
projects / groeck-nct6775 / blobdiff