X-Git-Url: https://git.sur5r.net/?p=openocd;a=blobdiff_plain;f=tcl%2Ftarget%2Fzynq_7000.cfg;h=1562768c5387ff687252d9f605c3bfadc1ad4599;hp=07a6c8352393bf6fa4f0d5bfca645b2853d7077d;hb=abd78a0ff8df04cd46a68ff8a716bf1eda215af0;hpb=cf81de70524d615aa307f94b9b326bed42d7dfc0

diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 07a6c835..1562768c 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -27,3 +27,22 @@ adapter_khz 1000
 
 ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
 ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
+
+pld device virtex2 zynq_pl.bs 1
+
+set XC7_JSHUTDOWN 0x0d
+set XC7_JPROGRAM 0x0b
+set XC7_JSTART 0x0c
+set XC7_BYPASS 0x3f
+
+proc zynqpl_program {tap} {
+	global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
+	irscan $tap $XC7_JSHUTDOWN
+	irscan $tap $XC7_JPROGRAM
+	runtest 60000
+	#JSTART prevents this from working...
+	#irscan $tap $XC7_JSTART
+	runtest 2000
+	irscan $tap $XC7_BYPASS
+	runtest 2000
+}