From 0cdb44a9dbb2c1aa5321e86a9948a493ffde5979 Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Tue, 15 May 2018 18:05:02 -0400 Subject: [PATCH] tcl/board: Add Arty-S7 Spartan 7 FPGA Development Board Change-Id: I8bfe780cb67a1777d5112a68e8a9781bfe4f2038 Signed-off-by: William D. Jones Reviewed-on: http://openocd.zylin.com/4525 Reviewed-by: Robert Jordens Tested-by: jenkins Reviewed-by: Rohit Singh Reviewed-by: Matthias Welwarsky --- tcl/board/arty_s7.cfg | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 tcl/board/arty_s7.cfg diff --git a/tcl/board/arty_s7.cfg b/tcl/board/arty_s7.cfg new file mode 100644 index 00000000..ca7d3f1c --- /dev/null +++ b/tcl/board/arty_s7.cfg @@ -0,0 +1,35 @@ +# +# Arty S7: Spartan7 25/50 FPGA Board for Makers and Hobbyists +# +# https://www.xilinx.com/products/boards-and-kits/1-pnziih.html +# https://store.digilentinc.com/arty-s7-spartan-7-fpga-board-for-makers-and-hobbyists/ + +source [find interface/ftdi/digilent-hs1.cfg] + +# Xilinx Spartan7-25/50 FPGA (XC7S{25,50}-CSGA324) +source [find cpld/xilinx-xc7.cfg] +source [find cpld/jtagspi.cfg] + +adapter_khz 25000 + +# Usage: +# +# Load Bitstream into FPGA: +# openocd -f board/arty_s7.cfg -c "init;\ +# pld load 0 bitstream.bit;\ +# shutdown" +# +# Write Bitstream to Flash: +# openocd -f board/arty_s7.cfg -c "init;\ +# jtagspi_init 0 bscan_spi_xc7s??.bit;\ +# jtagspi_program bitstream.bin 0;\ +# xc7s_program xc7s.tap;\ +# shutdown" +# +# jtagspi flash proxies can be found at: +# https://github.com/quartiq/bscan_spi_bitstreams +# +# For the Spartan 50 variant, use +# - https://github.com/quartiq/bscan_spi_bitstreams/raw/master/bscan_spi_xc7s50.bit +# For the Spartan 25 variant, use +# - https://github.com/quartiq/bscan_spi_bitstreams/raw/master/bscan_spi_xc7s25.bit -- 2.39.2