From: Chen-Yu Tsai <wens@csie.org>
Date: Fri, 2 Sep 2016 08:29:05 +0000 (+0800)
Subject: sunxi: Fix H3 EMAC syscon register address
X-Git-Tag: v2016.09~49^2~6
X-Git-Url: https://git.sur5r.net/?p=u-boot;a=commitdiff_plain;h=68871efe1daede5771b0b97de889e81eb969faa8

sunxi: Fix H3 EMAC syscon register address

The sun8i-emac driver follows an old version of the proposed DT
bindings, where the EMAC clock and EPHY control register range is
listed directly, rather than through a syscon phandle.

Add back the syscon register range to avoid an invalid data access.
We should fix the driver once the Linux kernel bindings have been
finalized.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---

diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
index 6babaf3717..afa60793a2 100644
--- a/arch/arm/dts/sun8i-h3.dtsi
+++ b/arch/arm/dts/sun8i-h3.dtsi
@@ -466,9 +466,8 @@
 
 		emac: ethernet@1c30000 {
 			compatible = "allwinner,sun8i-h3-emac";
-			syscon = <&syscon>;
-			reg = <0x01c30000 0x104>;
-			reg-names = "emac";
+			reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
+			reg-names = "emac", "syscon";
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 			resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
 			reset-names = "ahb", "ephy";