2 FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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35 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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38 /* Standard includes. */
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41 /* Scheduler includes. */
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42 #include "FreeRTOS.h"
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46 /* Demo application includes. */
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49 /*-----------------------------------------------------------*/
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51 /* Constants to setup and access the UART. */
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52 #define serDLAB ( ( unsigned portCHAR ) 0x80 )
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53 #define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
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54 #define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
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55 #define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
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56 #define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
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57 #define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
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58 #define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
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59 #define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
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61 /* Constants to setup and access the VIC. */
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62 #define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
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63 #define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
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64 #define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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65 #define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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67 /* Constants to determine the ISR source. */
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68 #define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
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69 #define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
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70 #define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
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71 #define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
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72 #define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
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75 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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76 #define serHANDLE ( ( xComPortHandle ) 1 )
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77 #define serNO_BLOCK ( ( portTickType ) 0 )
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79 /*-----------------------------------------------------------*/
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81 /* Queues used to hold received characters, and characters waiting to be
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83 static xQueueHandle xRxedChars;
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84 static xQueueHandle xCharsForTx;
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85 static volatile portLONG lTHREEmpty = pdFALSE;
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87 /*-----------------------------------------------------------*/
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89 /* The ISR. Note that this is called by a wrapper written in the file
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90 SerialISR.s79. See the WEB documentation for this port for further
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92 __arm void vSerialISR( void );
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94 /*-----------------------------------------------------------*/
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96 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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98 unsigned portLONG ulDivisor, ulWantedClock;
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99 xComPortHandle xReturn = serHANDLE;
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100 extern void ( vSerialISREntry) ( void );
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102 /* Create the queues used to hold Rx and Tx characters. */
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103 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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104 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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106 /* Initialise the THRE empty flag. */
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107 lTHREEmpty = pdTRUE;
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110 ( xRxedChars != serINVALID_QUEUE ) &&
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111 ( xCharsForTx != serINVALID_QUEUE ) &&
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112 ( ulWantedBaud != ( unsigned portLONG ) 0 )
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115 portENTER_CRITICAL();
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117 /* Setup the baud rate: Calculate the divisor value. */
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118 ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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119 ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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121 /* Set the DLAB bit so we can access the divisor. */
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124 /* Setup the divisor. */
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125 U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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127 U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
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129 /* Turn on the FIFO's and clear the buffers. */
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130 U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
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132 /* Setup transmission format. */
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133 U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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135 /* Setup the VIC for the UART. */
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136 VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
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137 VICIntEnable |= serU0VIC_CHANNEL_BIT;
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138 VICVectAddr1 = ( unsigned portLONG ) vSerialISREntry;
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139 VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
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141 /* Enable UART0 interrupts. */
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142 U0IER |= serENABLE_INTERRUPTS;
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144 portEXIT_CRITICAL();
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146 xReturn = ( xComPortHandle ) 1;
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150 xReturn = ( xComPortHandle ) 0;
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155 /*-----------------------------------------------------------*/
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157 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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159 /* The port handle is not required as this driver only supports UART0. */
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162 /* Get the next character from the buffer. Return false if no characters
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163 are available, or arrive before xBlockTime expires. */
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164 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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173 /*-----------------------------------------------------------*/
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175 void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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177 signed portCHAR *pxNext;
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179 /* NOTE: This implementation does not handle the queue being full as no
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180 block time is used! */
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182 /* The port handle is not required as this driver only supports UART0. */
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184 ( void ) usStringLength;
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186 /* Send each character in the string, one at a time. */
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187 pxNext = ( signed portCHAR * ) pcString;
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190 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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194 /*-----------------------------------------------------------*/
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196 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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198 signed portBASE_TYPE xReturn;
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200 /* The port handle is not required as this driver only supports UART0. */
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203 portENTER_CRITICAL();
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205 /* Is there space to write directly to the UART? */
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206 if( lTHREEmpty == ( portLONG ) pdTRUE )
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208 /* We wrote the character directly to the UART, so was
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210 lTHREEmpty = pdFALSE;
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216 /* We cannot write directly to the UART, so queue the character.
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217 Block for a maximum of xBlockTime if there is no space in the
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218 queue. It is ok to block within a critical section as each
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219 task has it's own critical section management. */
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220 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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222 /* Depending on queue sizing and task prioritisation: While we
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223 were blocked waiting to post interrupts were not disabled. It is
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224 possible that the serial ISR has emptied the Tx queue, in which
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225 case we need to start the Tx off again. */
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226 if( lTHREEmpty == ( portLONG ) pdTRUE )
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228 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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229 lTHREEmpty = pdFALSE;
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234 portEXIT_CRITICAL();
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238 /*-----------------------------------------------------------*/
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240 __arm void vSerialISR( void )
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242 signed portCHAR cChar;
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243 portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
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245 /* What caused the interrupt? */
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246 switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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248 case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
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252 case serSOURCE_THRE : /* The THRE is empty. If there is another
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253 character in the Tx queue, send it now. */
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254 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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260 /* There are no further characters
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261 queued to send so we can indicate
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262 that the THRE is available. */
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263 lTHREEmpty = pdTRUE;
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267 case serSOURCE_RX_TIMEOUT :
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268 case serSOURCE_RX : /* A character was received. Place it in
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269 the queue of received characters. */
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271 if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
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273 xTaskWokenByRx = pdTRUE;
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277 default : /* There is nothing to do, leave the ISR. */
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281 /* Exit the ISR. If a task was woken by either a character being received
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282 or transmitted then a context switch will occur. */
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283 portEND_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
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285 /* Clear the ISR in the VIC. */
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286 VICVectAddr = serCLEAR_VIC_INTERRUPT;
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288 /*-----------------------------------------------------------*/
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