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31 ******************************************************************************/
32 /*****************************************************************************/
36 * @addtogroup ttcps_v2_0
40 * This is the driver for one 16-bit timer counter in the Triple Timer Counter
41 * (TTC) module in the Ps block.
43 * The TTC module provides three independent timer/counter modules that can each
44 * be clocked using either the system clock (pclk) or an externally driven
45 * clock (ext_clk). In addition, each counter can independently prescale its
46 * selected clock input (divided by 2 to 65536). Counters can be set to
47 * decrement or increment.
49 * Each of the counters can be programmed to generate interrupt pulses:
50 * . At a regular, predefined period, that is on a timed interval
51 * . When the counter registers overflow
52 * . When the count matches any one of the three 'match' registers
54 * Therefore, up to six different events can trigger a timer interrupt: three
55 * match interrupts, an overflow interrupt, an interval interrupt and an event
56 * timer interrupt. Note that the overflow interrupt and the interval interrupt
57 * are mutually exclusive.
59 * <b>Initialization & Configuration</b>
61 * An XTtcPs_Config structure is used to configure a driver instance.
62 * Information in the XTtcPs_Config structure is the hardware properties
65 * A driver instance is initialized through
66 * XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr
67 * is a pointer to the XTtcPs_Config structure, it can be looked up statically
68 * through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The
69 * EffectiveAddr can be the static base address of the device or virtual
70 * mapped address if address translation is supported.
74 * Interrupt handler is not provided by the driver, as handling of interrupt
75 * is application specific.
78 * The default setting for a timer/counter is:
80 * - Internal clock (pclk) selected
82 * - All Interrupts disabled
83 * - Output waveforms disabled
86 * MODIFICATION HISTORY:
88 * Ver Who Date Changes
89 * ----- ------ -------- -----------------------------------------------------
90 * 1.00a drg/jz 01/20/10 First release..
91 * 2.0 adk 12/10/13 Updated as per the New Tcl API's
95 ******************************************************************************/
97 #ifndef XTTCPS_H /* prevent circular inclusions */
98 #define XTTCPS_H /* by using protection macros */
104 /***************************** Include Files *********************************/
106 #include "xttcps_hw.h"
109 /************************** Constant Definitions *****************************/
111 /** @name Configuration options
113 * Options for the device. Each of the options is bit field, so more than one
114 * options can be specified.
118 #define XTTCPS_OPTION_EXTERNAL_CLK 0x0001 /**< External clock source */
119 #define XTTCPS_OPTION_CLK_EDGE_NEG 0x0002 /**< Clock on trailing edge for
121 #define XTTCPS_OPTION_INTERVAL_MODE 0x0004 /**< Interval mode */
122 #define XTTCPS_OPTION_DECREMENT 0x0008 /**< Decrement the counter */
123 #define XTTCPS_OPTION_MATCH_MODE 0x0010 /**< Match mode */
124 #define XTTCPS_OPTION_WAVE_DISABLE 0x0020 /**< No waveform output */
125 #define XTTCPS_OPTION_WAVE_POLARITY 0x0040 /**< Waveform polarity */
128 /**************************** Type Definitions *******************************/
131 * This typedef contains configuration information for the device.
134 u16 DeviceId; /**< Unique ID for device */
135 u32 BaseAddress; /**< Base address for device */
136 u32 InputClockHz; /**< Input clock frequency */
140 * The XTtcPs driver instance data. The user is required to allocate a
141 * variable of this type for each PS timer/counter device in the system. A
142 * pointer to a variable of this type is then passed to various driver API
146 XTtcPs_Config Config; /**< Configuration structure */
147 u32 IsReady; /**< Device is initialized and ready */
151 /***************** Macros (Inline Functions) Definitions *********************/
154 * Internal helper macros
156 #define InstReadReg(InstancePtr, RegOffset) \
157 (Xil_In32(((InstancePtr)->Config.BaseAddress) + (RegOffset)))
159 #define InstWriteReg(InstancePtr, RegOffset, Data) \
160 (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (RegOffset), (Data)))
162 /*****************************************************************************/
165 * This function starts the counter/timer without resetting the counter value.
167 * @param InstancePtr is a pointer to the XTtcPs instance.
171 * @note C-style signature:
172 * void XTtcPs_Start(XTtcPs *InstancePtr)
174 ****************************************************************************/
175 #define XTtcPs_Start(InstancePtr) \
176 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
177 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
178 ~XTTCPS_CNT_CNTRL_DIS_MASK))
180 /*****************************************************************************/
183 * This function stops the counter/timer. This macro may be called at any time
184 * to stop the counter. The counter holds the last value until it is reset,
185 * restarted or enabled.
187 * @param InstancePtr is a pointer to the XTtcPs instance.
191 * @note C-style signature:
192 * void XTtcPs_Stop(XTtcPs *InstancePtr)
194 ****************************************************************************/
195 #define XTtcPs_Stop(InstancePtr) \
196 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
197 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
198 XTTCPS_CNT_CNTRL_DIS_MASK))
200 /*****************************************************************************/
203 * This function checks whether the timer counter has already started.
205 * @param InstancePtr is a pointer to the XTtcPs instance
207 * @return Non-zero if the device has started, '0' otherwise.
209 * @note C-style signature:
210 * int XTtcPs_IsStarted(XTtcPs *InstancePtr)
212 ****************************************************************************/
213 #define XTtcPs_IsStarted(InstancePtr) \
214 (int)((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
215 XTTCPS_CNT_CNTRL_DIS_MASK) == 0)
217 /*****************************************************************************/
220 * This function returns the current 16-bit counter value. It may be called at
223 * @param InstancePtr is a pointer to the XTtcPs instance.
225 * @return 16-bit counter value.
227 * @note C-style signature:
228 * u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
230 ****************************************************************************/
231 #define XTtcPs_GetCounterValue(InstancePtr) \
232 (u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
234 /*****************************************************************************/
237 * This function sets the interval value to be used in interval mode.
239 * @param InstancePtr is a pointer to the XTtcPs instance.
240 * @param Value is the 16-bit value to be set in the interval register.
244 * @note C-style signature:
245 * void XTtcPs_SetInterval(XTtcPs *InstancePtr, u16 Value)
247 ****************************************************************************/
248 #define XTtcPs_SetInterval(InstancePtr, Value) \
249 InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
251 /*****************************************************************************/
254 * This function gets the interval value from the interval register.
256 * @param InstancePtr is a pointer to the XTtcPs instance.
258 * @return 16-bit interval value
260 * @note C-style signature:
261 * u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
263 ****************************************************************************/
264 #define XTtcPs_GetInterval(InstancePtr) \
265 (u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
267 /*****************************************************************************/
270 * This macro resets the count register. It may be called at any time. The
271 * counter is reset to either 0 or 0xFFFF, or the interval value, depending on
272 * the increment/decrement mode. The state of the counter, as started or
273 * stopped, is not affected by calling reset.
275 * @param InstancePtr is a pointer to the XTtcPs instance.
279 * @note C-style signature:
280 * void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
282 ****************************************************************************/
283 #define XTtcPs_ResetCounterValue(InstancePtr) \
284 InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
285 (InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
286 XTTCPS_CNT_CNTRL_RST_MASK))
288 /*****************************************************************************/
291 * This function enables the interrupts.
293 * @param InstancePtr is a pointer to the XTtcPs instance.
294 * @param InterruptMask defines which interrupt should be enabled.
295 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
296 * This is a bit mask, all set bits will be enabled, cleared bits
297 * will not be disabled.
303 * void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
305 ******************************************************************************/
306 #define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask) \
307 InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
308 (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) | \
311 /*****************************************************************************/
314 * This function disables the interrupts.
316 * @param InstancePtr is a pointer to the XTtcPs instance.
317 * @param InterruptMask defines which interrupt should be disabled.
318 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
319 * This is a bit mask, all set bits will be disabled, cleared bits
320 * will not be disabled.
326 * void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
328 ******************************************************************************/
329 #define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask) \
330 InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
331 (InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) & \
334 /*****************************************************************************/
337 * This function reads the interrupt status.
339 * @param InstancePtr is a pointer to the XTtcPs instance.
343 * @note C-style signature:
344 * u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
346 ******************************************************************************/
347 #define XTtcPs_GetInterruptStatus(InstancePtr) \
348 InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
350 /*****************************************************************************/
353 * This function clears the interrupt status.
355 * @param InstancePtr is a pointer to the XTtcPs instance.
356 * @param InterruptMask defines which interrupt should be cleared.
357 * Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
358 * This is a bit mask, all set bits will be cleared, cleared bits
359 * will not be cleared.
365 * void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
367 ******************************************************************************/
368 #define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask) \
369 InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
373 /************************** Function Prototypes ******************************/
376 * Initialization functions in xttcps_sinit.c
378 XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId);
381 * Required functions, in xttcps.c
383 int XTtcPs_CfgInitialize(XTtcPs *InstancePtr,
384 XTtcPs_Config * ConfigPtr, u32 EffectiveAddr);
386 void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, u16 Value);
387 u16 XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex);
389 void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue);
390 u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr);
392 void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
393 u16 *Interval, u8 *Prescaler);
396 * Functions for options, in file xttcps_options.c
398 int XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options);
399 u32 XTtcPs_GetOptions(XTtcPs *InstancePtr);
402 * Function for self-test, in file xttcps_selftest.c
404 int XTtcPs_SelfTest(XTtcPs *InstancePtr);
410 #endif /* end of protection macro */