4 * \brief Chip-specific oscillator management functions
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6 * Copyright (c) 2012 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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45 #ifdef BOARD_OSC0_HZ
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46 void osc_priv_enable_osc0(void)
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50 flags = cpu_irq_save();
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51 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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52 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_OSCCTRL0 - (uint32_t)SCIF);
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53 SCIF->SCIF_OSCCTRL0 =
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55 # if BOARD_OSC0_IS_XTAL == true
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59 | SCIF_OSCCTRL0_OSCEN;
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60 cpu_irq_restore(flags);
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63 void osc_priv_disable_osc0(void)
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67 flags = cpu_irq_save();
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68 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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69 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_OSCCTRL0 - (uint32_t)SCIF);
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70 SCIF->SCIF_OSCCTRL0 = 0;
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71 cpu_irq_restore(flags);
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73 #endif /* BOARD_OSC0_HZ */
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75 #ifdef BOARD_OSC32_HZ
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76 void osc_priv_enable_osc32(void)
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80 flags = cpu_irq_save();
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81 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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82 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF);
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83 BSCIF->BSCIF_OSCCTRL32 =
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85 | BOARD_OSC32_SELCURR
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87 | BSCIF_OSCCTRL32_EN1K
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88 | BSCIF_OSCCTRL32_EN32K
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89 | BSCIF_OSCCTRL32_OSC32EN;
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90 cpu_irq_restore(flags);
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93 void osc_priv_disable_osc32(void)
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97 flags = cpu_irq_save();
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98 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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99 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF);
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100 BSCIF->BSCIF_OSCCTRL32 &= ~BSCIF_OSCCTRL32_OSC32EN;
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101 // Wait until OSC32 RDY flag is cleared.
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102 while (BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_OSC32RDY);
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103 cpu_irq_restore(flags);
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105 #endif /* BOARD_OSC32_HZ */
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107 void osc_priv_enable_rc32k(void)
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112 flags = cpu_irq_save();
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113 temp = BSCIF->BSCIF_RC32KCR;
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114 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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115 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC32KCR - (uint32_t)BSCIF);
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116 BSCIF->BSCIF_RC32KCR = temp | BSCIF_RC32KCR_EN32K | BSCIF_RC32KCR_EN;
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117 cpu_irq_restore(flags);
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120 void osc_priv_disable_rc32k(void)
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125 flags = cpu_irq_save();
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126 temp = BSCIF->BSCIF_RC32KCR;
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127 temp &= ~BSCIF_RC32KCR_EN;
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128 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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129 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC32KCR - (uint32_t)BSCIF);
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130 BSCIF->BSCIF_RC32KCR = temp;
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131 cpu_irq_restore(flags);
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134 void osc_priv_enable_rc1m(void)
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139 flags = cpu_irq_save();
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140 temp = BSCIF->BSCIF_RC1MCR;
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141 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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142 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC1MCR - (uint32_t)BSCIF);
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143 BSCIF->BSCIF_RC1MCR = temp | BSCIF_RC1MCR_CLKOE;
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144 cpu_irq_restore(flags);
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147 void osc_priv_disable_rc1m(void)
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152 flags = cpu_irq_save();
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153 temp = BSCIF->BSCIF_RC1MCR;
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154 temp &= ~BSCIF_RC1MCR_CLKOE;
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155 BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
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156 | BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC1MCR - (uint32_t)BSCIF);
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157 BSCIF->BSCIF_RC1MCR = temp;
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158 cpu_irq_restore(flags);
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161 void osc_priv_enable_rc80m(void)
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166 flags = cpu_irq_save();
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167 temp = SCIF->SCIF_RC80MCR;
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168 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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169 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RC80MCR - (uint32_t)SCIF);
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170 SCIF->SCIF_RC80MCR = temp | SCIF_RC80MCR_EN;
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171 cpu_irq_restore(flags);
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174 void osc_priv_disable_rc80m(void)
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179 flags = cpu_irq_save();
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180 temp = SCIF->SCIF_RC80MCR;
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181 temp &= ~SCIF_RC80MCR_EN ;
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182 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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183 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RC80MCR - (uint32_t)SCIF);
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184 SCIF->SCIF_RC80MCR = temp;
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185 cpu_irq_restore(flags);
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188 void osc_priv_enable_rcfast(void)
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193 flags = cpu_irq_save();
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194 // Let FCD and calibration value by default
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195 temp = SCIF->SCIF_RCFASTCFG;
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196 // Clear previous FRANGE value
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197 temp &= ~SCIF_RCFASTCFG_FRANGE_Msk;
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199 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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200 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RCFASTCFG - (uint32_t)SCIF);
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201 SCIF->SCIF_RCFASTCFG = temp | SCIF_RCFASTCFG_EN
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202 | SCIF_RCFASTCFG_FRANGE(CONFIG_RCFAST_FRANGE);
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203 cpu_irq_restore(flags);
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206 void osc_priv_disable_rcfast(void)
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210 flags = cpu_irq_save();
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211 // Let FCD and calibration value by default
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212 temp = SCIF->SCIF_RCFASTCFG;
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213 // Clear previous FRANGE value
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214 temp &= ~SCIF_RCFASTCFG_FRANGE_Msk;
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216 temp &= ~SCIF_RCFASTCFG_EN;
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217 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
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218 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RCFASTCFG - (uint32_t)SCIF);
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219 SCIF->SCIF_RCFASTCFG = temp;
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220 cpu_irq_restore(flags);
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