4 * \brief Chip-specific system clock management functions
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6 * Copyright (c) 2012 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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43 #ifndef CHIP_SYSCLK_H_INCLUDED
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44 #define CHIP_SYSCLK_H_INCLUDED
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53 * \page sysclk_quickstart Quick Start Guide for the System Clock Management service (SAM4L)
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55 * This is the quick start guide for the \ref sysclk_group "System Clock Management"
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56 * service, with step-by-step instructions on how to configure and use the service for
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57 * specific use cases.
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59 * \section sysclk_quickstart_usecases System Clock Management use cases
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60 * - \ref sysclk_quickstart_basic
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62 * \section sysclk_quickstart_basic Basic usage of the System Clock Management service
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63 * This section will present a basic use case for the System Clock Management service.
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64 * This use case will configure the main system clock to 48MHz, using an internal DFLL
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65 * module to multiply the frequency of a crystal attached to the microcontroller. The
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66 * peripheral bus clocks are scaled down from the speed of the main system clock.
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68 * \subsection sysclk_quickstart_use_case_1_prereq Prerequisites
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71 * \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
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72 * Add to the application initialization code:
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77 * \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
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78 * -# Configure the system clocks according to the settings in conf_clock.h:
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79 * \code sysclk_init(); \endcode
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81 * \subsection sysclk_quickstart_use_case_1_example_code Example code
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82 * Add or uncomment the following in your conf_clock.h header file, commenting out all other
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83 * definitions of the same symbol(s):
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85 * #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL0
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87 * // Fdfll = (Fclk * DFLL_mul) / DFLL_div
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88 * #define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC32K
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89 * #define CONFIG_DFLL0_FREQ 48000000UL
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90 * #define CONFIG_DFLL0_MUL (CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ)
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91 * #define CONFIG_DFLL0_DIV 1
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93 * // Fbus = Fsys / (2 ^ BUS_div)
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94 * #define CONFIG_SYSCLK_CPU_DIV 0
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95 * #define CONFIG_SYSCLK_PBA_DIV 1
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96 * #define CONFIG_SYSCLK_PBB_DIV 1
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97 * #define CONFIG_SYSCLK_PBC_DIV 1
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98 * #define CONFIG_SYSCLK_PBD_DIV 1
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101 * \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
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102 * -# Configure the main system clock to use the output of the DFLL0 module as its source:
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103 * \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL0 \endcode
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104 * -# Configure the DFLL0 module to use external crystal oscillator OSC0 as its source:
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105 * \code #define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC32K \endcode
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106 * -# Configure the DFLL0 module to multiply the external oscillator OSC0 frequency up to 48MHz:
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108 * #define CONFIG_DFLL0_FREQ 48000000UL
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109 * #define CONFIG_DFLL0_MUL (CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ)
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110 * #define CONFIG_DFLL0_DIV 1
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112 * \note For user boards, \c BOARD_OSC0_HZ should be defined in the board \c conf_board.h configuration
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113 * file as the frequency of the crystal attached to OSC0.
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114 * -# Configure the main clock to run at the full 48MHz, scale the peripheral busses to run at one
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115 * half (2 to the power of 1) of the system clock speed:
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117 * #define CONFIG_SYSCLK_CPU_DIV 0
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118 * #define CONFIG_SYSCLK_PBA_DIV 1
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119 * #define CONFIG_SYSCLK_PBB_DIV 1
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120 * #define CONFIG_SYSCLK_PBC_DIV 1
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121 * #define CONFIG_SYSCLK_PBD_DIV 1
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123 * \note Some dividers are powers of two, while others are integer division factors. Refer to the
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124 * formulas in the conf_clock.h template commented above each division define.
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129 * \weakgroup sysclk_group
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133 //! \name System clock source
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135 #define SYSCLK_SRC_RCSYS 0 //!< System RC oscillator
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136 #define SYSCLK_SRC_OSC0 1 //!< Oscillator 0
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137 #define SYSCLK_SRC_PLL0 2 //!< Phase Locked Loop 0
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138 #define SYSCLK_SRC_DFLL 3 //!< Digital Frequency Locked Loop
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139 #define SYSCLK_SRC_RC80M 4 //!< 80 MHz RC oscillator
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140 #define SYSCLK_SRC_RCFAST 5 //!< 4-8-12 MHz RC oscillator
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141 #define SYSCLK_SRC_RC1M 6 //!< 1 MHz RC oscillator
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144 //! \name USB Clock Sources
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146 #define USBCLK_SRC_OSC0 GENCLK_SRC_OSC0 //!< Use OSC0
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147 #define USBCLK_SRC_PLL0 GENCLK_SRC_PLL0 //!< Use PLL0
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148 #define USBCLK_SRC_DFLL GENCLK_SRC_DFLL //!< Use DFLL
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149 #define USBCLK_SRC_GCLKIN0 GENCLK_SRC_GCLKIN0 //!< Use GCLKIN0
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152 //! \name Bus index of maskable module clocks
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154 #define PM_CLK_GRP_CPU 0
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155 #define PM_CLK_GRP_HSB 1
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156 #define PM_CLK_GRP_PBA 2
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157 #define PM_CLK_GRP_PBB 3
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158 #define PM_CLK_GRP_PBC 4
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159 #define PM_CLK_GRP_PBD 5
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162 //! \name Clocks derived from the CPU clock
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164 //! On-Chip Debug system
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165 #define SYSCLK_OCD 0
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168 //! \name Clocks derived from the HSB clock
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170 //! PDCA memory interface
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171 #define SYSCLK_PDCA_HSB 0
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172 //! Flash data interface
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173 #define SYSCLK_HFLASHC_DATA 1
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174 //! HRAMC data interface
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175 #define SYSCLK_HRAMC1_DATA 2
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176 //! USBC DMA and FIFO interface
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177 #define SYSCLK_USBC_DATA 3
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178 //! CRCCU data interface
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179 #define SYSCLK_CRCCU_DATA 4
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180 //! HSB<->PBA bridge
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181 #define SYSCLK_PBA_BRIDGE 5
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182 //! HSB<->PBB bridge
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183 #define SYSCLK_PBB_BRIDGE 6
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184 //! HSB<->PBC bridge
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185 #define SYSCLK_PBC_BRIDGE 7
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186 //! HSB<->PBD bridge
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187 #define SYSCLK_PBD_BRIDGE 8
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188 //! Advanced Encryption Standard
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189 #define SYSCLK_AESA_HSB 9
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192 //! \name Clocks derived from the PBA clock
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194 //! IISC Controller
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195 #define SYSCLK_IISC 0
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197 #define SYSCLK_SPI 1
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198 //! Timer/Counter 0
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199 #define SYSCLK_TC0 2
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200 //! Timer/Counter 1
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201 #define SYSCLK_TC1 3
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203 #define SYSCLK_TWIM0 4
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205 #define SYSCLK_TWIS0 5
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207 #define SYSCLK_TWIM1 6
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209 #define SYSCLK_TWIS1 7
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211 #define SYSCLK_USART0 8
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213 #define SYSCLK_USART1 9
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215 #define SYSCLK_USART2 10
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217 #define SYSCLK_USART3 11
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219 #define SYSCLK_ADCIFE 12
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221 #define SYSCLK_DACC 13
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222 //! Analog Comparator
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223 #define SYSCLK_ACIFC 14
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224 //! Glue Logic Controller
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225 #define SYSCLK_GLOC 15
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226 //! ABDACB Controller
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227 #define SYSCLK_ABDACB 16
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228 //! TRNG Controller
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229 #define SYSCLK_TRNG 17
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230 //! PARC Controller
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231 #define SYSCLK_PARC 18
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232 //! Capacitive Touch
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233 #define SYSCLK_CATB 19
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235 #define SYSCLK_TWIM2 21
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237 #define SYSCLK_TWIM3 22
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239 #define SYSCLK_LCDCA 23
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243 //! \name Clocks derived from the PBB clock
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245 //! Flash Controller registers
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246 #define SYSCLK_HFLASHC_REGS 0
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247 //! HRAMC Controller registers
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248 #define SYSCLK_HRAMC1_REGS 1
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249 //! HSB Matrix configuration
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250 #define SYSCLK_HMATRIX 2
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251 //! PDCA peripheral bus interface
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252 #define SYSCLK_PDCA_PB 3
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253 //! CRCCU registers
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254 #define SYSCLK_CRCCU_REGS 4
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256 #define SYSCLK_USBC_REGS 5
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257 //! PEVC Controller
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258 #define SYSCLK_PEVC 6
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261 //! \name Clocks derived from the PBC clock
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263 //! PM configuration
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264 #define SYSCLK_PM 0
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265 //! CHIPID Controller
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266 #define SYSCLK_CHIPID 1
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267 //! System Control Interface
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268 #define SYSCLK_SCIF 2
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269 //! Frequency Meter
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270 #define SYSCLK_FREQM 3
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271 //! General-Purpose I/O
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272 #define SYSCLK_GPIO 4
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275 //! \name Clocks derived from the PBD clock
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277 //! BPM configuration
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278 #define SYSCLK_BPM 0
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279 //! BSCIF configuration
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280 #define SYSCLK_BSCIF 1
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281 //! Asynchronous Timer
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282 #define SYSCLK_AST 2
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284 #define SYSCLK_WDT 3
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285 //! External Interrupt Controller
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286 #define SYSCLK_EIC 4
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288 #define SYSCLK_PICOUART 5
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291 //! \name Divided clock mask derived from the PBA clock
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293 //! TIMER_CLOCK2 mask
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294 #define PBA_DIVMASK_TIMER_CLOCK2 (1u << 0)
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295 //! TIMER_CLOCK3 mask
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296 #define PBA_DIVMASK_TIMER_CLOCK3 (1u << 2)
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297 //! CLK_USART/DIV mask
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298 #define PBA_DIVMASK_CLK_USART (1u << 2)
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299 //! TIMER_CLOCK4 mask
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300 #define PBA_DIVMASK_TIMER_CLOCK4 (1u << 4)
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301 //! TIMER_CLOCK5 mask
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302 #define PBA_DIVMASK_TIMER_CLOCK5 (1u << 6)
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304 #define PBA_DIVMASK_Msk (0x7Fu << 0)
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307 #ifndef __ASSEMBLY__
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309 #include <compiler.h>
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313 #include <genclk.h>
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315 // Use the slow clock (RCOSC) with no prescaling if config was empty.
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316 #ifndef CONFIG_SYSCLK_SOURCE
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317 # define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS
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318 #endif /* CONFIG_SYSCLK_SOURCE */
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321 * Enable PicoCache for flash access by default.
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322 * 0: disable PicoCache, 1: enable PicoCache.
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324 #ifndef CONFIG_HCACHE_ENABLE
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325 #define CONFIG_HCACHE_ENABLE 1
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329 * \def CONFIG_SYSCLK_CPU_DIV
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330 * \brief Configuration symbol for dividing the CPU clock frequency by
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331 * \f$2^{CONFIG\_SYSCLK\_CPU\_DIV}\f$
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333 * If this symbol is not defined, the CPU clock frequency is not divided.
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335 * This symbol may be defined in \ref conf_clock.h.
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337 #ifndef CONFIG_SYSCLK_CPU_DIV
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338 # define CONFIG_SYSCLK_CPU_DIV 0
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339 #endif /* CONFIG_SYSCLK_CPU_DIV */
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342 * \def CONFIG_SYSCLK_INIT_HSBMASK
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343 * \brief Configuration symbol for the HSB clocks enabled at power-on after the
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344 * sysclock module has been initialized. By default, all HSB clocks are left
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345 * enabled, however to save power these can be automatically disabled by defining
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346 * this value to a mask of \c SYSCLOCK_xxx settings.
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348 * If this symbol is not defined, then all HSB clocks are left enabled.
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350 * This symbol may be defined in \ref conf_clock.h.
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353 # define CONFIG_SYSCLK_INIT_HSBMASK
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357 * \def CONFIG_SYSCLK_PBA_DIV
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358 * \brief Configuration symbol for dividing the PBA clock frequency by
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359 * \f$2^{CONFIG\_SYSCLK\_PBA\_DIV}\f$
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361 * If this symbol is not defined, the PBA clock frequency is not divided.
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363 * This symbol may be defined in \ref conf_clock.h.
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365 #ifndef CONFIG_SYSCLK_PBA_DIV
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366 # define CONFIG_SYSCLK_PBA_DIV 0
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367 #endif /* CONFIG_SYSCLK_PBA_DIV */
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370 * \def CONFIG_SYSCLK_PBB_DIV
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371 * \brief Configuration symbol for dividing the PBB clock frequency by
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372 * \f$2^{CONFIG\_SYSCLK\_PBB\_DIV}\f$
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374 * If this symbol is not defined, the PBB clock frequency is not divided.
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376 * This symbol may be defined in \ref conf_clock.h.
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378 #ifndef CONFIG_SYSCLK_PBB_DIV
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379 # define CONFIG_SYSCLK_PBB_DIV 0
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380 #endif /* CONFIG_SYSCLK_PBB_DIV */
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383 * \def CONFIG_SYSCLK_PBC_DIV
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384 * \brief Configuration symbol for dividing the PBC clock frequency by
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385 * \f$2^{CONFIG\_SYSCLK\_PBC\_DIV}\f$
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387 * If this symbol is not defined, the PBC clock frequency is not divided.
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389 * This symbol may be defined in \ref conf_clock.h.
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391 #ifndef CONFIG_SYSCLK_PBC_DIV
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392 # define CONFIG_SYSCLK_PBC_DIV 0
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393 #endif /* CONFIG_SYSCLK_PBC_DIV */
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396 * \def CONFIG_SYSCLK_PBD_DIV
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397 * \brief Configuration symbol for dividing the PBD clock frequency by
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398 * \f$2^{CONFIG\_SYSCLK\_PBD\_DIV}\f$
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400 * If this symbol is not defined, the PBD clock frequency is not divided.
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402 * This symbol may be defined in \ref conf_clock.h.
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404 #ifndef CONFIG_SYSCLK_PBD_DIV
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405 # define CONFIG_SYSCLK_PBD_DIV 0
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406 #endif /* CONFIG_SYSCLK_PBD_DIV */
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409 * \def CONFIG_SYSCLK_INIT_CPUMASK
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410 * \brief Configuration symbol for the CPU clocks enabled at power-on after the
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411 * sysclock module has been initialized. By default, all CPU clocks are left
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412 * enabled, however to save power these can be automatically disabled by defining
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413 * this value to a mask of \c SYSCLOCK_xxx settings.
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415 * If this symbol is not defined, then all CPU clocks are left enabled.
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417 * This symbol may be defined in \ref conf_clock.h.
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420 # define CONFIG_SYSCLK_INIT_CPUMASK
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424 * \def CONFIG_SYSCLK_INIT_PBAMASK
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425 * \brief Configuration symbol for the PBA clocks enabled at power-on after the
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426 * sysclock module has been initialized. By default, all PBA clocks are left
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427 * enabled, however to save power these can be automatically disabled by defining
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428 * this value to a mask of \c SYSCLOCK_xxx settings.
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430 * If this symbol is not defined, then all PBA clocks are left enabled.
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432 * This symbol may be defined in \ref conf_clock.h.
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435 # define CONFIG_SYSCLK_INIT_PBAMASK
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439 * \def CONFIG_SYSCLK_INIT_PBBMASK
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440 * \brief Configuration symbol for the PBB clocks enabled at power-on after the
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441 * sysclock module has been initialized. By default, all PBB clocks are left
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442 * enabled, however to save power these can be automatically disabled by defining
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443 * this value to a mask of \c SYSCLOCK_xxx settings.
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445 * If this symbol is not defined, then all PBB clocks are left enabled.
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447 * This symbol may be defined in \ref conf_clock.h.
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450 # define CONFIG_SYSCLK_INIT_PBBMASK
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454 * \def CONFIG_SYSCLK_INIT_PBCMASK
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455 * \brief Configuration symbol for the PBC clocks enabled at power-on after the
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456 * sysclock module has been initialized. By default, all PBC clocks are left
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457 * enabled, however to save power these can be automatically disabled by defining
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458 * this value to a mask of \c SYSCLOCK_xxx settings.
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460 * If this symbol is not defined, then all PBC clocks are left enabled.
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462 * This symbol may be defined in \ref conf_clock.h.
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465 # define CONFIG_SYSCLK_INIT_PBCMASK
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469 * \def CONFIG_SYSCLK_INIT_PBDMASK
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470 * \brief Configuration symbol for the PBD clocks enabled at power-on after the
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471 * sysclock module has been initialized. By default, all PBD clocks are left
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472 * enabled, however to save power these can be automatically disabled by defining
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473 * this value to a mask of \c SYSCLOCK_xxx settings.
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475 * If this symbol is not defined, then all PBD clocks are left enabled.
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477 * This symbol may be defined in \ref conf_clock.h.
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480 # define CONFIG_SYSCLK_INIT_PBDMASK
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484 * \def CONFIG_USBCLK_SOURCE
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485 * \brief Configuration symbol for the USB generic clock source
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487 * Sets the clock source to use for the USB. The source must also be properly
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490 * Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if
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491 * USB is not required.
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494 # define CONFIG_USBCLK_SOURCE
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498 * \def CONFIG_USBCLK_DIV
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499 * \brief Configuration symbol for the USB generic clock divider setting
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501 * Sets the clock division for the USB generic clock. If a USB clock source is
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502 * selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be
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505 * Define this as any value that does not exceed \c GENCLK_DIV_MAX, and which
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506 * will give a 48 MHz clock frequency from the selected source.
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509 # define CONFIG_USBCLK_DIV
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513 * \name Querying the system clock and its derived clocks
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515 * The following functions may be used to query the current frequency of
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516 * the system clock and the CPU and bus clocks derived from it.
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517 * sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be
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518 * available on all platforms, although some platforms may define
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519 * additional accessors for various chip-internal bus clocks. These are
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520 * usually not intended to be queried directly by generic code.
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525 * \brief Return the current rate in Hz of the main system clock
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527 * \todo This function assumes that the main clock source never changes
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528 * once it's been set up, and that PLL0 always runs at the compile-time
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529 * configured default rate. While this is probably the most common
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530 * configuration, which we want to support as a special case for
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531 * performance reasons, we will at some point need to support more
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532 * dynamic setups as well.
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534 #if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC)
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535 extern bool sysclk_initialized;
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537 static inline uint32_t sysclk_get_main_hz(void)
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539 #if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC)
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540 if (!sysclk_initialized ) {
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541 return OSC_RCSYS_NOMINAL_HZ;
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545 if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RCSYS) {
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546 return OSC_RCSYS_NOMINAL_HZ;
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549 #ifdef BOARD_OSC0_HZ
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550 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_OSC0) {
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551 return BOARD_OSC0_HZ;
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555 #ifdef CONFIG_PLL0_SOURCE
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556 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_PLL0) {
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557 return pll_get_default_rate(0);
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561 #ifdef CONFIG_DFLL0_SOURCE
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562 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_DFLL) {
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563 return dfll_get_default_rate(0);
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567 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC80M) {
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568 return OSC_RC80M_NOMINAL_HZ;
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571 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RCFAST) {
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572 if (CONFIG_RCFAST_FRANGE == 2) {
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573 return OSC_RCFAST12M_NOMINAL_HZ;
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574 } else if (CONFIG_RCFAST_FRANGE == 1) {
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575 return OSC_RCFAST8M_NOMINAL_HZ;
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577 return OSC_RCFAST4M_NOMINAL_HZ;
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581 else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC1M) {
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582 return OSC_RC1M_NOMINAL_HZ;
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587 /* unhandled_case(CONFIG_SYSCLK_SOURCE); */
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593 * \brief Return the current rate in Hz of the CPU clock
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595 * \todo This function assumes that the CPU always runs at the system
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596 * clock frequency. We want to support at least two more scenarios:
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597 * Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus
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598 * clock dividers (which may change at run time). Ditto for all the bus
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601 * \return Frequency of the CPU clock, in Hz.
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603 static inline uint32_t sysclk_get_cpu_hz(void)
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605 return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
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609 * \brief Return the current rate in Hz of the High-Speed Bus clock
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611 * \return Frequency of the High Speed Peripheral Bus clock, in Hz.
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613 static inline uint32_t sysclk_get_hsb_hz(void)
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615 return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
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619 * \brief Return the current rate in Hz of the Peripheral Bus A clock
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621 * \return Frequency of the Peripheral Bus A clock, in Hz.
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623 static inline uint32_t sysclk_get_pba_hz(void)
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625 return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV;
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629 * \brief Return the current rate in Hz of the Peripheral Bus B clock
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631 * \return Frequency of the Peripheral Bus B clock, in Hz.
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633 static inline uint32_t sysclk_get_pbb_hz(void)
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635 return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBB_DIV;
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639 * \brief Return the current rate in Hz of the Peripheral Bus C clock
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641 * \return Frequency of the Peripheral Bus C clock, in Hz.
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643 static inline uint32_t sysclk_get_pbc_hz(void)
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645 return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBC_DIV;
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649 * \brief Return the current rate in Hz of the Peripheral Bus D clock
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651 * \return Frequency of the Peripheral Bus D clock, in Hz.
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653 static inline uint32_t sysclk_get_pbd_hz(void)
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655 return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBD_DIV;
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658 extern uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module);
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661 extern void sysclk_priv_enable_module(uint32_t bus_id, uint32_t module_index);
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662 extern void sysclk_priv_disable_module(uint32_t bus_id, uint32_t module_index);
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664 //! \name Enabling and disabling synchronous clocks
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668 * \brief Enable a module clock derived from the CPU clock
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669 * \param index Index of the module clock in the CPUMASK register
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671 static inline void sysclk_enable_cpu_module(uint32_t index)
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673 sysclk_priv_enable_module(PM_CLK_GRP_CPU, index);
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677 * \brief Disable a module clock derived from the CPU clock
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678 * \param index Index of the module clock in the CPUMASK register
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680 static inline void sysclk_disable_cpu_module(uint32_t index)
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682 sysclk_priv_disable_module(PM_CLK_GRP_CPU, index);
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686 * \brief Enable a module clock derived from the HSB clock
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687 * \param index Index of the module clock in the HSBMASK register
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689 static inline void sysclk_enable_hsb_module(uint32_t index)
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691 sysclk_priv_enable_module(PM_CLK_GRP_HSB, index);
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695 * \brief Disable a module clock derived from the HSB clock
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696 * \param index Index of the module clock in the HSBMASK register
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698 static inline void sysclk_disable_hsb_module(uint32_t index)
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700 sysclk_priv_disable_module(PM_CLK_GRP_HSB, index);
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703 extern void sysclk_enable_pba_module(uint32_t index);
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704 extern void sysclk_disable_pba_module(uint32_t index);
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705 extern void sysclk_enable_pbb_module(uint32_t index);
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706 extern void sysclk_disable_pbb_module(uint32_t index);
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709 * \brief Enable a module clock derived from the PBC clock
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710 * \param index Index of the module clock in the PBAMASK register
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712 static inline void sysclk_enable_pbc_module(uint32_t index)
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714 sysclk_priv_enable_module(PM_CLK_GRP_PBC, index);
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718 * \brief Disable a module clock derived from the PBC clock
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719 * \param index Index of the module clock in the PBAMASK register
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721 static inline void sysclk_disable_pbc_module(uint32_t index)
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723 sysclk_priv_disable_module(PM_CLK_GRP_PBC, index);
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727 * \brief Enable a module clock derived from the PBD clock
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728 * \param index Index of the module clock in the PBAMASK register
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730 static inline void sysclk_enable_pbd_module(uint32_t index)
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732 sysclk_priv_enable_module(PM_CLK_GRP_PBD, index);
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736 * \brief Disable a module clock derived from the PBD clock
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737 * \param index Index of the module clock in the PBAMASK register
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739 static inline void sysclk_disable_pbd_module(uint32_t index)
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741 sysclk_priv_disable_module(PM_CLK_GRP_PBD, index);
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745 * \brief Enable divided clock mask derived from the PBA clock
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746 * \param mask mask of the divided clock in the PBADIVMASK register
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748 static inline void sysclk_enable_pba_divmask(uint32_t mask)
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750 uint32_t temp_mask;
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752 temp_mask = PM->PM_PBADIVMASK;
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754 PM->PM_UNLOCK = PM_UNLOCK_KEY(0xAAu)
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755 | PM_UNLOCK_ADDR((uint32_t)&PM->PM_PBADIVMASK - (uint32_t)PM);
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756 PM->PM_PBADIVMASK = temp_mask;
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760 * \brief Disable divided clock mask derived from the PBA clock
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761 * \param mask mask of the divided clock in the PBADIVMASK register
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763 static inline void sysclk_disable_pba_divmask(uint32_t mask)
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765 uint32_t temp_mask;
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767 temp_mask = PM->PM_PBADIVMASK;
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768 temp_mask &= ~mask;
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769 PM->PM_UNLOCK = PM_UNLOCK_KEY(0xAAu)
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770 | PM_UNLOCK_ADDR((uint32_t)&PM->PM_PBADIVMASK - (uint32_t)PM);
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771 PM->PM_PBADIVMASK = temp_mask;
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774 extern void sysclk_enable_peripheral_clock(const volatile void *module);
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775 extern void sysclk_disable_peripheral_clock(const volatile void *module);
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779 //! \name System Clock Source and Prescaler configuration
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782 extern void sysclk_set_prescalers(uint32_t cpu_shift,
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783 uint32_t pba_shift, uint32_t pbb_shift,
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784 uint32_t pbc_shift, uint32_t pbd_shift);
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785 extern void sysclk_set_source(uint32_t src);
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789 #if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__)
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792 * \def USBCLK_STARTUP_TIMEOUT
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793 * \brief Number of us to wait for USB clock to start
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795 #ifdef CONFIG_USBCLK_STARTUP_TIMEOUT
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796 # define USBCLK_STARTUP_TIMEOUT (CONFIG_USBCLK_STARTUP_TIMEOUT)
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798 # define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/OSC_RCSYS_NOMINAL_HZ))
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801 extern void sysclk_enable_usb(void);
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802 extern void sysclk_disable_usb(void);
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805 extern void sysclk_init(void);
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807 #endif /* !__ASSEMBLY__ */
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815 #endif /* CHIP_SYSCLK_H_INCLUDED */
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