1 /**************************************************************************//**
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2 * @file core_cmFunc.h
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3 * @brief CMSIS Cortex-M Core Function Access Header File
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5 * @date 19. January 2012
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8 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
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11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
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12 * processor based microcontrollers. This file can be freely distributed
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13 * within development tools that are supporting such ARM based processors.
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16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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22 ******************************************************************************/
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24 #ifndef __CORE_CMFUNC_H
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25 #define __CORE_CMFUNC_H
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28 /* ########################### Core Function Access ########################### */
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29 /** \ingroup CMSIS_Core_FunctionInterface
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30 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
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34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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35 /* ARM armcc specific functions */
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37 #if (__ARMCC_VERSION < 400677)
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38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
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41 /* intrinsic void __enable_irq(); */
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42 /* intrinsic void __disable_irq(); */
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44 /** \brief Get Control Register
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46 This function returns the content of the Control Register.
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48 \return Control Register value
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50 __STATIC_INLINE uint32_t __get_CONTROL(void)
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52 register uint32_t __regControl __ASM("control");
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53 return(__regControl);
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57 /** \brief Set Control Register
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59 This function writes the given value to the Control Register.
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61 \param [in] control Control Register value to set
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63 __STATIC_INLINE void __set_CONTROL(uint32_t control)
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65 register uint32_t __regControl __ASM("control");
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66 __regControl = control;
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70 /** \brief Get IPSR Register
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72 This function returns the content of the IPSR Register.
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74 \return IPSR Register value
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76 __STATIC_INLINE uint32_t __get_IPSR(void)
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78 register uint32_t __regIPSR __ASM("ipsr");
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83 /** \brief Get APSR Register
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85 This function returns the content of the APSR Register.
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87 \return APSR Register value
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89 __STATIC_INLINE uint32_t __get_APSR(void)
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91 register uint32_t __regAPSR __ASM("apsr");
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96 /** \brief Get xPSR Register
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98 This function returns the content of the xPSR Register.
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100 \return xPSR Register value
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102 __STATIC_INLINE uint32_t __get_xPSR(void)
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104 register uint32_t __regXPSR __ASM("xpsr");
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109 /** \brief Get Process Stack Pointer
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111 This function returns the current value of the Process Stack Pointer (PSP).
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113 \return PSP Register value
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115 __STATIC_INLINE uint32_t __get_PSP(void)
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117 register uint32_t __regProcessStackPointer __ASM("psp");
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118 return(__regProcessStackPointer);
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122 /** \brief Set Process Stack Pointer
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124 This function assigns the given value to the Process Stack Pointer (PSP).
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126 \param [in] topOfProcStack Process Stack Pointer value to set
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128 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
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130 register uint32_t __regProcessStackPointer __ASM("psp");
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131 __regProcessStackPointer = topOfProcStack;
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135 /** \brief Get Main Stack Pointer
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137 This function returns the current value of the Main Stack Pointer (MSP).
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139 \return MSP Register value
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141 __STATIC_INLINE uint32_t __get_MSP(void)
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143 register uint32_t __regMainStackPointer __ASM("msp");
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144 return(__regMainStackPointer);
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148 /** \brief Set Main Stack Pointer
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150 This function assigns the given value to the Main Stack Pointer (MSP).
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152 \param [in] topOfMainStack Main Stack Pointer value to set
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154 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
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156 register uint32_t __regMainStackPointer __ASM("msp");
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157 __regMainStackPointer = topOfMainStack;
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161 /** \brief Get Priority Mask
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163 This function returns the current state of the priority mask bit from the Priority Mask Register.
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165 \return Priority Mask value
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167 __STATIC_INLINE uint32_t __get_PRIMASK(void)
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169 register uint32_t __regPriMask __ASM("primask");
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170 return(__regPriMask);
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174 /** \brief Set Priority Mask
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176 This function assigns the given value to the Priority Mask Register.
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178 \param [in] priMask Priority Mask
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180 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
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182 register uint32_t __regPriMask __ASM("primask");
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183 __regPriMask = (priMask);
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187 #if (__CORTEX_M >= 0x03)
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189 /** \brief Enable FIQ
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191 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
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192 Can only be executed in Privileged modes.
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194 #define __enable_fault_irq __enable_fiq
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197 /** \brief Disable FIQ
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199 This function disables FIQ interrupts by setting the F-bit in the CPSR.
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200 Can only be executed in Privileged modes.
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202 #define __disable_fault_irq __disable_fiq
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205 /** \brief Get Base Priority
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207 This function returns the current value of the Base Priority register.
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209 \return Base Priority register value
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211 __STATIC_INLINE uint32_t __get_BASEPRI(void)
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213 register uint32_t __regBasePri __ASM("basepri");
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214 return(__regBasePri);
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218 /** \brief Set Base Priority
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220 This function assigns the given value to the Base Priority register.
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222 \param [in] basePri Base Priority value to set
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224 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
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226 register uint32_t __regBasePri __ASM("basepri");
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227 __regBasePri = (basePri & 0xff);
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231 /** \brief Get Fault Mask
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233 This function returns the current value of the Fault Mask register.
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235 \return Fault Mask register value
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237 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
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239 register uint32_t __regFaultMask __ASM("faultmask");
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240 return(__regFaultMask);
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244 /** \brief Set Fault Mask
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246 This function assigns the given value to the Fault Mask register.
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248 \param [in] faultMask Fault Mask value to set
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250 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
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252 register uint32_t __regFaultMask __ASM("faultmask");
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253 __regFaultMask = (faultMask & (uint32_t)1);
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256 #endif /* (__CORTEX_M >= 0x03) */
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259 #if (__CORTEX_M == 0x04)
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261 /** \brief Get FPSCR
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263 This function returns the current value of the Floating Point Status/Control register.
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265 \return Floating Point Status/Control register value
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267 __STATIC_INLINE uint32_t __get_FPSCR(void)
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269 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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270 register uint32_t __regfpscr __ASM("fpscr");
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271 return(__regfpscr);
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278 /** \brief Set FPSCR
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280 This function assigns the given value to the Floating Point Status/Control register.
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282 \param [in] fpscr Floating Point Status/Control value to set
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284 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
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286 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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287 register uint32_t __regfpscr __ASM("fpscr");
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288 __regfpscr = (fpscr);
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292 #endif /* (__CORTEX_M == 0x04) */
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295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
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296 /* IAR iccarm specific functions */
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298 #include <cmsis_iar.h>
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301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
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302 /* TI CCS specific functions */
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304 #include <cmsis_ccs.h>
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307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
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308 /* GNU gcc specific functions */
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310 /** \brief Enable IRQ Interrupts
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312 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
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313 Can only be executed in Privileged modes.
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315 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
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317 __ASM volatile ("cpsie i");
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321 /** \brief Disable IRQ Interrupts
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323 This function disables IRQ interrupts by setting the I-bit in the CPSR.
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324 Can only be executed in Privileged modes.
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326 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
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328 __ASM volatile ("cpsid i");
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332 /** \brief Get Control Register
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334 This function returns the content of the Control Register.
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336 \return Control Register value
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338 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
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342 __ASM volatile ("MRS %0, control" : "=r" (result) );
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347 /** \brief Set Control Register
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349 This function writes the given value to the Control Register.
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351 \param [in] control Control Register value to set
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353 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
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355 __ASM volatile ("MSR control, %0" : : "r" (control) );
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359 /** \brief Get IPSR Register
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361 This function returns the content of the IPSR Register.
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363 \return IPSR Register value
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365 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
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369 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
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374 /** \brief Get APSR Register
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376 This function returns the content of the APSR Register.
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378 \return APSR Register value
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380 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
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384 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
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389 /** \brief Get xPSR Register
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391 This function returns the content of the xPSR Register.
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393 \return xPSR Register value
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395 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
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399 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
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404 /** \brief Get Process Stack Pointer
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406 This function returns the current value of the Process Stack Pointer (PSP).
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408 \return PSP Register value
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410 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
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412 register uint32_t result;
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414 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
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419 /** \brief Set Process Stack Pointer
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421 This function assigns the given value to the Process Stack Pointer (PSP).
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423 \param [in] topOfProcStack Process Stack Pointer value to set
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425 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
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427 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
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431 /** \brief Get Main Stack Pointer
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433 This function returns the current value of the Main Stack Pointer (MSP).
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435 \return MSP Register value
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437 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
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439 register uint32_t result;
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441 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
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446 /** \brief Set Main Stack Pointer
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448 This function assigns the given value to the Main Stack Pointer (MSP).
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450 \param [in] topOfMainStack Main Stack Pointer value to set
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452 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
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454 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
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458 /** \brief Get Priority Mask
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460 This function returns the current state of the priority mask bit from the Priority Mask Register.
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462 \return Priority Mask value
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464 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
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468 __ASM volatile ("MRS %0, primask" : "=r" (result) );
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473 /** \brief Set Priority Mask
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475 This function assigns the given value to the Priority Mask Register.
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477 \param [in] priMask Priority Mask
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479 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
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481 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
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485 #if (__CORTEX_M >= 0x03)
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487 /** \brief Enable FIQ
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489 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
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490 Can only be executed in Privileged modes.
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492 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
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494 __ASM volatile ("cpsie f");
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498 /** \brief Disable FIQ
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500 This function disables FIQ interrupts by setting the F-bit in the CPSR.
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501 Can only be executed in Privileged modes.
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503 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
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505 __ASM volatile ("cpsid f");
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509 /** \brief Get Base Priority
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511 This function returns the current value of the Base Priority register.
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513 \return Base Priority register value
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515 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
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519 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
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524 /** \brief Set Base Priority
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526 This function assigns the given value to the Base Priority register.
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528 \param [in] basePri Base Priority value to set
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530 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
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532 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
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536 /** \brief Get Fault Mask
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538 This function returns the current value of the Fault Mask register.
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540 \return Fault Mask register value
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542 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
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546 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
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551 /** \brief Set Fault Mask
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553 This function assigns the given value to the Fault Mask register.
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555 \param [in] faultMask Fault Mask value to set
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557 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
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559 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
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562 #endif /* (__CORTEX_M >= 0x03) */
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565 #if (__CORTEX_M == 0x04)
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567 /** \brief Get FPSCR
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569 This function returns the current value of the Floating Point Status/Control register.
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571 \return Floating Point Status/Control register value
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573 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
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575 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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578 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
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586 /** \brief Set FPSCR
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588 This function assigns the given value to the Floating Point Status/Control register.
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590 \param [in] fpscr Floating Point Status/Control value to set
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592 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
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594 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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595 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
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599 #endif /* (__CORTEX_M == 0x04) */
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602 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
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603 /* TASKING carm specific functions */
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606 * The CMSIS functions have been implemented as intrinsics in the compiler.
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607 * Please use "carm -?i" to get an up to date list of all instrinsics,
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608 * Including the CMSIS ones.
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613 /*@} end of CMSIS_Core_RegAccFunctions */
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616 #endif /* __CORE_CMFUNC_H */
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