2 ******************************************************************************
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3 * @file stm32h7xx_hal_uart.h
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4 * @author MCD Application Team
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5 * @brief Header file of UART HAL module.
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6 ******************************************************************************
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9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
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10 * All rights reserved.</center></h2>
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12 * This software component is licensed by ST under BSD 3-Clause license,
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13 * the "License"; You may not use this file except in compliance with the
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14 * License. You may obtain a copy of the License at:
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15 * opensource.org/licenses/BSD-3-Clause
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17 ******************************************************************************
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20 /* Define to prevent recursive inclusion -------------------------------------*/
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21 #ifndef STM32H7xx_HAL_UART_H
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22 #define STM32H7xx_HAL_UART_H
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28 /* Includes ------------------------------------------------------------------*/
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29 #include "stm32h7xx_hal_def.h"
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31 /** @addtogroup STM32H7xx_HAL_Driver
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35 /** @addtogroup UART
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39 /* Exported types ------------------------------------------------------------*/
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40 /** @defgroup UART_Exported_Types UART Exported Types
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45 * @brief UART Init Structure definition
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49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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50 The baud rate register is computed using the following formula:
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53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
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54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
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57 - If oversampling is 16 or in LIN mode,
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58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
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59 - If oversampling is 8,
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60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4]
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61 Baud Rate Register[3] = 0
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62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1
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63 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
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65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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66 This parameter can be a value of @ref UARTEx_Word_Length. */
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68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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69 This parameter can be a value of @ref UART_Stop_Bits. */
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71 uint32_t Parity; /*!< Specifies the parity mode.
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72 This parameter can be a value of @ref UART_Parity
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73 @note When parity is enabled, the computed parity is inserted
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74 at the MSB position of the transmitted data (9th bit when
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75 the word length is set to 9 data bits; 8th bit when the
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76 word length is set to 8 data bits). */
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78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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79 This parameter can be a value of @ref UART_Mode. */
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81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
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83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
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85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
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86 This parameter can be a value of @ref UART_Over_Sampling. */
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88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
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89 Selecting the single sample method increases the receiver tolerance to clock
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90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
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92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
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93 This parameter can be a value of @ref UART_ClockPrescaler. */
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98 * @brief UART Advanced Features initialization structure definition
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102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
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103 Advanced Features may be initialized at the same time .
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104 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
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106 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
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107 This parameter can be a value of @ref UART_Tx_Inv. */
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109 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
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110 This parameter can be a value of @ref UART_Rx_Inv. */
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112 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
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113 vs negative/inverted logic).
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114 This parameter can be a value of @ref UART_Data_Inv. */
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116 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
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117 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
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119 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
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120 This parameter can be a value of @ref UART_Overrun_Disable. */
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122 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
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123 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
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125 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
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126 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
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128 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
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129 detection is carried out.
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130 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
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132 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
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133 This parameter can be a value of @ref UART_MSB_First. */
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134 } UART_AdvFeatureInitTypeDef;
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139 * @brief HAL UART State definition
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140 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition).
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141 * - gState contains UART state information related to global Handle management
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142 * and also information related to Tx operations.
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143 * gState value coding follow below described bitmap :
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144 * b7-b6 Error information
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149 * b5 Peripheral initialization status
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150 * 0 : Reset (Peripheral not initialized)
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151 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called)
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153 * xx : Should be set to 00
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154 * b2 Intrinsic process state
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156 * 1 : Busy (Peripheral busy with some configuration or internal operations)
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158 * x : Should be set to 0
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160 * 0 : Ready (no Tx operation ongoing)
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161 * 1 : Busy (Tx operation ongoing)
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162 * - RxState contains information related to Rx operations.
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163 * RxState value coding follow below described bitmap :
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165 * xx : Should be set to 00
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166 * b5 Peripheral initialization status
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167 * 0 : Reset (Peripheral not initialized)
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168 * 1 : Init done (Peripheral not initialized)
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170 * xxx : Should be set to 000
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172 * 0 : Ready (no Rx operation ongoing)
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173 * 1 : Busy (Rx operation ongoing)
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175 * x : Should be set to 0.
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177 typedef uint32_t HAL_UART_StateTypeDef;
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180 * @brief UART clock sources definition
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184 UART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
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185 UART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
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186 UART_CLOCKSOURCE_D3PCLK1 = 0x02U, /*!< Domain3 PCLK1 clock source */
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187 UART_CLOCKSOURCE_PLL2 = 0x04U, /*!< PLL2Q clock source */
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188 UART_CLOCKSOURCE_PLL3 = 0x08U, /*!< PLL3Q clock source */
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189 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */
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190 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */
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191 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */
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192 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */
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194 } UART_ClockSourceTypeDef;
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197 * @brief UART handle Structure definition
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199 typedef struct __UART_HandleTypeDef
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201 USART_TypeDef *Instance; /*!< UART registers base address */
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203 UART_InitTypeDef Init; /*!< UART communication parameters */
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205 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
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207 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
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209 uint16_t TxXferSize; /*!< UART Tx Transfer size */
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211 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
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213 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
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215 uint16_t RxXferSize; /*!< UART Rx Transfer size */
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217 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
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219 uint16_t Mask; /*!< UART Rx RDR register mask */
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221 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
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222 This parameter can be a value of @ref UARTEx_FIFO_mode. */
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224 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
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226 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
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228 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
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230 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
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232 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
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234 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
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236 HAL_LockTypeDef Lock; /*!< Locking object */
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238 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
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239 and also related to Tx operations.
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240 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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242 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
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243 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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245 __IO uint32_t ErrorCode; /*!< UART Error code */
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247 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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248 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
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249 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
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250 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
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251 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
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252 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
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253 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
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254 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
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255 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
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256 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
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257 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
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258 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
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260 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
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261 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
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262 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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264 } UART_HandleTypeDef;
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266 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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268 * @brief HAL UART Callback ID enumeration definition
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272 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
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273 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
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274 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
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275 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
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276 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
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277 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
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278 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
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279 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
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280 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
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281 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
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282 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
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284 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
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285 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
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287 } HAL_UART_CallbackIDTypeDef;
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290 * @brief HAL UART Callback pointer definition
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292 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
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294 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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300 /* Exported constants --------------------------------------------------------*/
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301 /** @defgroup UART_Exported_Constants UART Exported Constants
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305 /** @defgroup UART_State_Definition UART State Code Definition
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308 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
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309 Value is allowed for gState and RxState */
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310 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
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311 Value is allowed for gState and RxState */
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312 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
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313 Value is allowed for gState only */
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314 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
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315 Value is allowed for gState only */
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316 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
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317 Value is allowed for RxState only */
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318 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
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319 Not to be used for neither gState nor RxState.
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320 Value is result of combination (Or) between gState and RxState values */
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321 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
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322 Value is allowed for gState only */
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323 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
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324 Value is allowed for gState only */
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329 /** @defgroup UART_Error_Definition UART Error Definition
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332 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
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333 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
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334 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
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335 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
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336 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
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337 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
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338 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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339 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */
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340 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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345 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
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348 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
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349 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
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350 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
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351 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
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356 /** @defgroup UART_Parity UART Parity
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359 #define UART_PARITY_NONE 0x00000000U /*!< No parity */
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360 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
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361 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
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366 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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369 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
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370 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
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371 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
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372 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
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377 /** @defgroup UART_Mode UART Transfer Mode
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380 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */
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381 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */
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382 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
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387 /** @defgroup UART_State UART State
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390 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
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391 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
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396 /** @defgroup UART_Over_Sampling UART Over Sampling
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399 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
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400 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
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405 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
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408 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
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409 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
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414 /** @defgroup UART_ClockPrescaler UART Clock Prescaler
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417 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
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418 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
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419 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
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420 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
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421 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
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422 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
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423 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
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424 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
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425 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
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426 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
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427 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
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428 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
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433 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
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436 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
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437 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
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438 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */
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439 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */
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444 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
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447 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */
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448 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */
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453 /** @defgroup UART_LIN UART Local Interconnection Network mode
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456 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
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457 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
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462 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
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465 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
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466 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
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471 /** @defgroup UART_DMA_Tx UART DMA Tx
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474 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
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475 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
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480 /** @defgroup UART_DMA_Rx UART DMA Rx
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483 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
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484 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
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489 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
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492 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
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493 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
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498 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
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501 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
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502 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
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507 /** @defgroup UART_Request_Parameters UART Request Parameters
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510 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
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511 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
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512 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
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513 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
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514 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
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519 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
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522 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
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523 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
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524 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
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525 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
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526 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
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527 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
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528 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
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529 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
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530 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
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535 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
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538 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
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539 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
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544 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
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547 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
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548 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
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553 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
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556 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
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557 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
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562 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
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565 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
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566 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
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571 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
\r
574 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
\r
575 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
\r
580 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
\r
583 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
\r
584 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
\r
589 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
\r
592 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
\r
593 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
\r
598 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
\r
601 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */
\r
602 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
\r
607 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
\r
610 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
\r
611 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
\r
616 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
\r
619 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
\r
620 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
\r
625 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
\r
628 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
\r
633 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
\r
636 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
\r
637 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
\r
638 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */
\r
643 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
\r
646 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
\r
647 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
\r
652 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
\r
655 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */
\r
660 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
\r
663 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
\r
668 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
\r
671 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
\r
676 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
\r
679 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
\r
684 /** @defgroup UART_Flags UART Status Flags
\r
685 * Elements values convention: 0xXXXX
\r
686 * - 0xXXXX : Flag mask in the ISR register
\r
689 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
\r
690 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
\r
691 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
\r
692 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
\r
693 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
\r
694 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
\r
695 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
\r
696 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
\r
697 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
\r
698 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
\r
699 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
\r
700 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
\r
701 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
\r
702 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
\r
703 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
\r
704 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
\r
705 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
\r
706 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
\r
707 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
\r
708 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
\r
709 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
\r
710 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
\r
711 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
\r
712 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
\r
713 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
\r
714 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
\r
719 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
\r
720 * Elements values convention: 000ZZZZZ0XXYYYYYb
\r
721 * - YYYYY : Interrupt source position in the XX register (5bits)
\r
722 * - XX : Interrupt source register (2bits)
\r
723 * - 01: CR1 register
\r
724 * - 10: CR2 register
\r
725 * - 11: CR3 register
\r
726 * - ZZZZZ : Flag position in the ISR register(5bits)
\r
727 * Elements values convention: 000000000XXYYYYYb
\r
728 * - YYYYY : Interrupt source position in the XX register (5bits)
\r
729 * - XX : Interrupt source register (2bits)
\r
730 * - 01: CR1 register
\r
731 * - 10: CR2 register
\r
732 * - 11: CR3 register
\r
733 * Elements values convention: 0000ZZZZ00000000b
\r
734 * - ZZZZ : Flag position in the ISR register(4bits)
\r
737 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */
\r
738 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
\r
739 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
\r
740 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
\r
741 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
\r
742 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
\r
743 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
\r
744 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
\r
745 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
\r
746 #define UART_IT_CM 0x112EU /*!< UART character match interruption */
\r
747 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
\r
748 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
\r
749 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
\r
750 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
\r
751 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
\r
753 #define UART_IT_ERR 0x0060U /*!< UART error interruption */
\r
755 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
\r
756 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */
\r
757 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */
\r
762 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
\r
765 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
\r
766 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
\r
767 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
\r
768 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
\r
769 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
\r
770 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
\r
771 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
\r
772 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
\r
773 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
\r
774 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
\r
775 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
\r
785 /* Exported macros -----------------------------------------------------------*/
\r
786 /** @defgroup UART_Exported_Macros UART Exported Macros
\r
790 /** @brief Reset UART handle states.
\r
791 * @param __HANDLE__ UART handle.
\r
794 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
\r
795 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
\r
796 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
\r
797 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
\r
798 (__HANDLE__)->MspInitCallback = NULL; \
\r
799 (__HANDLE__)->MspDeInitCallback = NULL; \
\r
802 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
\r
803 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
\r
804 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
\r
806 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */
\r
808 /** @brief Flush the UART Data registers.
\r
809 * @param __HANDLE__ specifies the UART Handle.
\r
812 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
\r
814 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
\r
815 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
\r
818 /** @brief Clear the specified UART pending flag.
\r
819 * @param __HANDLE__ specifies the UART Handle.
\r
820 * @param __FLAG__ specifies the flag to check.
\r
821 * This parameter can be any combination of the following values:
\r
822 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
\r
823 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
\r
824 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
\r
825 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
\r
826 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
\r
827 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
\r
828 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
\r
829 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
\r
830 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
\r
831 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
\r
832 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
\r
835 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
\r
837 /** @brief Clear the UART PE pending flag.
\r
838 * @param __HANDLE__ specifies the UART Handle.
\r
841 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
\r
843 /** @brief Clear the UART FE pending flag.
\r
844 * @param __HANDLE__ specifies the UART Handle.
\r
847 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
\r
849 /** @brief Clear the UART NE pending flag.
\r
850 * @param __HANDLE__ specifies the UART Handle.
\r
853 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
\r
855 /** @brief Clear the UART ORE pending flag.
\r
856 * @param __HANDLE__ specifies the UART Handle.
\r
859 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
\r
861 /** @brief Clear the UART IDLE pending flag.
\r
862 * @param __HANDLE__ specifies the UART Handle.
\r
865 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
\r
867 /** @brief Clear the UART TX FIFO empty clear flag.
\r
868 * @param __HANDLE__ specifies the UART Handle.
\r
871 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
\r
873 /** @brief Check whether the specified UART flag is set or not.
\r
874 * @param __HANDLE__ specifies the UART Handle.
\r
875 * @param __FLAG__ specifies the flag to check.
\r
876 * This parameter can be one of the following values:
\r
877 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
\r
878 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
\r
879 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
\r
880 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
\r
881 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
\r
882 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
\r
883 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
\r
884 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
\r
885 * @arg @ref UART_FLAG_SBKF Send Break flag
\r
886 * @arg @ref UART_FLAG_CMF Character match flag
\r
887 * @arg @ref UART_FLAG_BUSY Busy flag
\r
888 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
\r
889 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
\r
890 * @arg @ref UART_FLAG_CTS CTS Change flag
\r
891 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
\r
892 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
\r
893 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
\r
894 * @arg @ref UART_FLAG_TC Transmission Complete flag
\r
895 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
\r
896 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
\r
897 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
\r
898 * @arg @ref UART_FLAG_ORE Overrun Error flag
\r
899 * @arg @ref UART_FLAG_NE Noise Error flag
\r
900 * @arg @ref UART_FLAG_FE Framing Error flag
\r
901 * @arg @ref UART_FLAG_PE Parity Error flag
\r
902 * @retval The new state of __FLAG__ (TRUE or FALSE).
\r
904 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
\r
906 /** @brief Enable the specified UART interrupt.
\r
907 * @param __HANDLE__ specifies the UART Handle.
\r
908 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
\r
909 * This parameter can be one of the following values:
\r
910 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
\r
911 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
\r
912 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
\r
913 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
\r
914 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
\r
915 * @arg @ref UART_IT_CM Character match interrupt
\r
916 * @arg @ref UART_IT_CTS CTS change interrupt
\r
917 * @arg @ref UART_IT_LBD LIN Break detection interrupt
\r
918 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
\r
919 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
\r
920 * @arg @ref UART_IT_TC Transmission complete interrupt
\r
921 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
\r
922 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
\r
923 * @arg @ref UART_IT_IDLE Idle line detection interrupt
\r
924 * @arg @ref UART_IT_PE Parity Error interrupt
\r
925 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
\r
928 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
\r
929 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
\r
930 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
\r
933 /** @brief Disable the specified UART interrupt.
\r
934 * @param __HANDLE__ specifies the UART Handle.
\r
935 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
\r
936 * This parameter can be one of the following values:
\r
937 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
\r
938 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
\r
939 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
\r
940 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
\r
941 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
\r
942 * @arg @ref UART_IT_CM Character match interrupt
\r
943 * @arg @ref UART_IT_CTS CTS change interrupt
\r
944 * @arg @ref UART_IT_LBD LIN Break detection interrupt
\r
945 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
\r
946 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
\r
947 * @arg @ref UART_IT_TC Transmission complete interrupt
\r
948 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
\r
949 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
\r
950 * @arg @ref UART_IT_IDLE Idle line detection interrupt
\r
951 * @arg @ref UART_IT_PE Parity Error interrupt
\r
952 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
\r
955 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
\r
956 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
\r
957 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
\r
959 /** @brief Check whether the specified UART interrupt has occurred or not.
\r
960 * @param __HANDLE__ specifies the UART Handle.
\r
961 * @param __INTERRUPT__ specifies the UART interrupt to check.
\r
962 * This parameter can be one of the following values:
\r
963 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
\r
964 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
\r
965 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
\r
966 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
\r
967 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
\r
968 * @arg @ref UART_IT_CM Character match interrupt
\r
969 * @arg @ref UART_IT_CTS CTS change interrupt
\r
970 * @arg @ref UART_IT_LBD LIN Break detection interrupt
\r
971 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
\r
972 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
\r
973 * @arg @ref UART_IT_TC Transmission complete interrupt
\r
974 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
\r
975 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
\r
976 * @arg @ref UART_IT_IDLE Idle line detection interrupt
\r
977 * @arg @ref UART_IT_PE Parity Error interrupt
\r
978 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
\r
979 * @retval The new state of __INTERRUPT__ (SET or RESET).
\r
981 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
\r
983 /** @brief Check whether the specified UART interrupt source is enabled or not.
\r
984 * @param __HANDLE__ specifies the UART Handle.
\r
985 * @param __INTERRUPT__ specifies the UART interrupt source to check.
\r
986 * This parameter can be one of the following values:
\r
987 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
\r
988 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
\r
989 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
\r
990 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
\r
991 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
\r
992 * @arg @ref UART_IT_CM Character match interrupt
\r
993 * @arg @ref UART_IT_CTS CTS change interrupt
\r
994 * @arg @ref UART_IT_LBD LIN Break detection interrupt
\r
995 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
\r
996 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
\r
997 * @arg @ref UART_IT_TC Transmission complete interrupt
\r
998 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
\r
999 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
\r
1000 * @arg @ref UART_IT_IDLE Idle line detection interrupt
\r
1001 * @arg @ref UART_IT_PE Parity Error interrupt
\r
1002 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
\r
1003 * @retval The new state of __INTERRUPT__ (SET or RESET).
\r
1005 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \
\r
1006 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \
\r
1007 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET)
\r
1009 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
\r
1010 * @param __HANDLE__ specifies the UART Handle.
\r
1011 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
\r
1012 * to clear the corresponding interrupt
\r
1013 * This parameter can be one of the following values:
\r
1014 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
\r
1015 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
\r
1016 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
\r
1017 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
\r
1018 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
\r
1019 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
\r
1020 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
\r
1021 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
\r
1022 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
\r
1023 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
\r
1024 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
\r
1027 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
\r
1029 /** @brief Set a specific UART request flag.
\r
1030 * @param __HANDLE__ specifies the UART Handle.
\r
1031 * @param __REQ__ specifies the request flag to set
\r
1032 * This parameter can be one of the following values:
\r
1033 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
\r
1034 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
\r
1035 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
\r
1036 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
\r
1037 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
\r
1040 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
\r
1042 /** @brief Enable the UART one bit sample method.
\r
1043 * @param __HANDLE__ specifies the UART Handle.
\r
1046 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
\r
1048 /** @brief Disable the UART one bit sample method.
\r
1049 * @param __HANDLE__ specifies the UART Handle.
\r
1052 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
\r
1054 /** @brief Enable UART.
\r
1055 * @param __HANDLE__ specifies the UART Handle.
\r
1058 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
\r
1060 /** @brief Disable UART.
\r
1061 * @param __HANDLE__ specifies the UART Handle.
\r
1064 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
\r
1066 /** @brief Enable CTS flow control.
\r
1067 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
\r
1068 * without need to call HAL_UART_Init() function.
\r
1069 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
\r
1070 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
\r
1071 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
\r
1072 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
\r
1073 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
\r
1074 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
\r
1075 * @param __HANDLE__ specifies the UART Handle.
\r
1078 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
\r
1080 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
\r
1081 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
\r
1084 /** @brief Disable CTS flow control.
\r
1085 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
\r
1086 * without need to call HAL_UART_Init() function.
\r
1087 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
\r
1088 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
\r
1089 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
\r
1090 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
\r
1091 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
\r
1092 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
\r
1093 * @param __HANDLE__ specifies the UART Handle.
\r
1096 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
\r
1098 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
\r
1099 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
\r
1102 /** @brief Enable RTS flow control.
\r
1103 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
\r
1104 * without need to call HAL_UART_Init() function.
\r
1105 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
\r
1106 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
\r
1107 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
\r
1108 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
\r
1109 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
\r
1110 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
\r
1111 * @param __HANDLE__ specifies the UART Handle.
\r
1114 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
\r
1116 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
\r
1117 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
\r
1120 /** @brief Disable RTS flow control.
\r
1121 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
\r
1122 * without need to call HAL_UART_Init() function.
\r
1123 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
\r
1124 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
\r
1125 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
\r
1126 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
\r
1127 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
\r
1128 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
\r
1129 * @param __HANDLE__ specifies the UART Handle.
\r
1132 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
\r
1134 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
\r
1135 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
\r
1141 /* Private macros --------------------------------------------------------*/
\r
1142 /** @defgroup UART_Private_Macros UART Private Macros
\r
1145 /** @brief Get UART clok division factor from clock prescaler value.
\r
1146 * @param __CLOCKPRESCALER__ UART prescaler value.
\r
1147 * @retval UART clock division factor
\r
1149 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
\r
1150 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
\r
1151 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
\r
1152 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
\r
1153 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
\r
1154 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
\r
1155 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
\r
1156 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
\r
1157 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
\r
1158 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
\r
1159 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
\r
1160 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \
\r
1161 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U)
\r
1163 /** @brief BRR division operation to set BRR register with LPUART.
\r
1164 * @param __PCLK__ LPUART clock.
\r
1165 * @param __BAUD__ Baud rate set by the user.
\r
1166 * @param __CLOCKPRESCALER__ UART prescaler value.
\r
1167 * @retval Division result
\r
1169 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)(((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U) + (uint32_t)((__BAUD__)/2U)) / (__BAUD__)))
\r
1171 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
\r
1172 * @param __PCLK__ UART clock.
\r
1173 * @param __BAUD__ Baud rate set by the user.
\r
1174 * @param __CLOCKPRESCALER__ UART prescaler value.
\r
1175 * @retval Division result
\r
1177 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U) + ((__BAUD__)/2U)) / (__BAUD__))
\r
1179 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
\r
1180 * @param __PCLK__ UART clock.
\r
1181 * @param __BAUD__ Baud rate set by the user.
\r
1182 * @param __CLOCKPRESCALER__ UART prescaler value.
\r
1183 * @retval Division result
\r
1185 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__))) + ((__BAUD__)/2U)) / (__BAUD__))
\r
1187 /** @brief Check whether or not UART instance is Low Power UART.
\r
1188 * @param __HANDLE__ specifies the UART Handle.
\r
1189 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
\r
1191 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
\r
1193 /** @brief Check UART Baud rate.
\r
1194 * @param __BAUDRATE__ Baudrate specified by the user.
\r
1195 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
\r
1196 * divided by the smallest oversampling used on the USART (i.e. 8)
\r
1197 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
\r
1199 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 12500001U)
\r
1201 /** @brief Check UART assertion time.
\r
1202 * @param __TIME__ 5-bit value assertion time.
\r
1203 * @retval Test result (TRUE or FALSE).
\r
1205 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
\r
1207 /** @brief Check UART deassertion time.
\r
1208 * @param __TIME__ 5-bit value deassertion time.
\r
1209 * @retval Test result (TRUE or FALSE).
\r
1211 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
\r
1214 * @brief Ensure that UART frame number of stop bits is valid.
\r
1215 * @param __STOPBITS__ UART frame number of stop bits.
\r
1216 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
\r
1218 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
\r
1219 ((__STOPBITS__) == UART_STOPBITS_1) || \
\r
1220 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
\r
1221 ((__STOPBITS__) == UART_STOPBITS_2))
\r
1224 * @brief Ensure that LPUART frame number of stop bits is valid.
\r
1225 * @param __STOPBITS__ LPUART frame number of stop bits.
\r
1226 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
\r
1228 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
\r
1229 ((__STOPBITS__) == UART_STOPBITS_2))
\r
1232 * @brief Ensure that UART frame parity is valid.
\r
1233 * @param __PARITY__ UART frame parity.
\r
1234 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
\r
1236 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
\r
1237 ((__PARITY__) == UART_PARITY_EVEN) || \
\r
1238 ((__PARITY__) == UART_PARITY_ODD))
\r
1241 * @brief Ensure that UART hardware flow control is valid.
\r
1242 * @param __CONTROL__ UART hardware flow control.
\r
1243 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
\r
1245 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
\r
1246 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
\r
1247 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
\r
1248 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
\r
1249 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
\r
1252 * @brief Ensure that UART communication mode is valid.
\r
1253 * @param __MODE__ UART communication mode.
\r
1254 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
\r
1256 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
\r
1259 * @brief Ensure that UART state is valid.
\r
1260 * @param __STATE__ UART state.
\r
1261 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
\r
1263 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
\r
1264 ((__STATE__) == UART_STATE_ENABLE))
\r
1267 * @brief Ensure that UART oversampling is valid.
\r
1268 * @param __SAMPLING__ UART oversampling.
\r
1269 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
\r
1271 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
\r
1272 ((__SAMPLING__) == UART_OVERSAMPLING_8))
\r
1275 * @brief Ensure that UART frame sampling is valid.
\r
1276 * @param __ONEBIT__ UART frame sampling.
\r
1277 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
\r
1279 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
\r
1280 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
\r
1283 * @brief Ensure that UART auto Baud rate detection mode is valid.
\r
1284 * @param __MODE__ UART auto Baud rate detection mode.
\r
1285 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
\r
1287 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
\r
1288 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
\r
1289 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
\r
1290 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
\r
1293 * @brief Ensure that UART receiver timeout setting is valid.
\r
1294 * @param __TIMEOUT__ UART receiver timeout setting.
\r
1295 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
\r
1297 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
\r
1298 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
\r
1301 * @brief Ensure that UART LIN state is valid.
\r
1302 * @param __LIN__ UART LIN state.
\r
1303 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
\r
1305 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
\r
1306 ((__LIN__) == UART_LIN_ENABLE))
\r
1309 * @brief Ensure that UART LIN break detection length is valid.
\r
1310 * @param __LENGTH__ UART LIN break detection length.
\r
1311 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
\r
1313 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
\r
1314 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
\r
1317 * @brief Ensure that UART DMA TX state is valid.
\r
1318 * @param __DMATX__ UART DMA TX state.
\r
1319 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
\r
1321 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
\r
1322 ((__DMATX__) == UART_DMA_TX_ENABLE))
\r
1325 * @brief Ensure that UART DMA RX state is valid.
\r
1326 * @param __DMARX__ UART DMA RX state.
\r
1327 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
\r
1329 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
\r
1330 ((__DMARX__) == UART_DMA_RX_ENABLE))
\r
1333 * @brief Ensure that UART half-duplex state is valid.
\r
1334 * @param __HDSEL__ UART half-duplex state.
\r
1335 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
\r
1337 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
\r
1338 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
\r
1341 * @brief Ensure that UART wake-up method is valid.
\r
1342 * @param __WAKEUP__ UART wake-up method .
\r
1343 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
\r
1345 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
\r
1346 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
\r
1349 * @brief Ensure that UART request parameter is valid.
\r
1350 * @param __PARAM__ UART request parameter.
\r
1351 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
\r
1353 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
\r
1354 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
\r
1355 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
\r
1356 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
\r
1357 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
\r
1360 * @brief Ensure that UART advanced features initialization is valid.
\r
1361 * @param __INIT__ UART advanced features initialization.
\r
1362 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
\r
1364 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
\r
1365 UART_ADVFEATURE_TXINVERT_INIT | \
\r
1366 UART_ADVFEATURE_RXINVERT_INIT | \
\r
1367 UART_ADVFEATURE_DATAINVERT_INIT | \
\r
1368 UART_ADVFEATURE_SWAP_INIT | \
\r
1369 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
\r
1370 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
\r
1371 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
\r
1372 UART_ADVFEATURE_MSBFIRST_INIT))
\r
1375 * @brief Ensure that UART frame TX inversion setting is valid.
\r
1376 * @param __TXINV__ UART frame TX inversion setting.
\r
1377 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
\r
1379 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
\r
1380 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
\r
1383 * @brief Ensure that UART frame RX inversion setting is valid.
\r
1384 * @param __RXINV__ UART frame RX inversion setting.
\r
1385 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
\r
1387 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
\r
1388 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
\r
1391 * @brief Ensure that UART frame data inversion setting is valid.
\r
1392 * @param __DATAINV__ UART frame data inversion setting.
\r
1393 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
\r
1395 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
\r
1396 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
\r
1399 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
\r
1400 * @param __SWAP__ UART frame RX/TX pins swap setting.
\r
1401 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
\r
1403 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
\r
1404 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
\r
1407 * @brief Ensure that UART frame overrun setting is valid.
\r
1408 * @param __OVERRUN__ UART frame overrun setting.
\r
1409 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
\r
1411 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
\r
1412 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
\r
1415 * @brief Ensure that UART auto Baud rate state is valid.
\r
1416 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
\r
1417 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
\r
1419 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
\r
1420 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
\r
1423 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
\r
1424 * @param __DMA__ UART DMA enabling or disabling on error setting.
\r
1425 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
\r
1427 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
\r
1428 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
\r
1431 * @brief Ensure that UART frame MSB first setting is valid.
\r
1432 * @param __MSBFIRST__ UART frame MSB first setting.
\r
1433 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
\r
1435 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
\r
1436 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
\r
1439 * @brief Ensure that UART stop mode state is valid.
\r
1440 * @param __STOPMODE__ UART stop mode state.
\r
1441 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
\r
1443 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
\r
1444 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
\r
1447 * @brief Ensure that UART mute mode state is valid.
\r
1448 * @param __MUTE__ UART mute mode state.
\r
1449 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
\r
1451 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
\r
1452 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
\r
1455 * @brief Ensure that UART wake-up selection is valid.
\r
1456 * @param __WAKE__ UART wake-up selection.
\r
1457 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
\r
1459 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
\r
1460 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
\r
1461 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
\r
1464 * @brief Ensure that UART driver enable polarity is valid.
\r
1465 * @param __POLARITY__ UART driver enable polarity.
\r
1466 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
\r
1468 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
\r
1469 ((__POLARITY__) == UART_DE_POLARITY_LOW))
\r
1472 * @brief Ensure that UART Prescaler is valid.
\r
1473 * @param __CLOCKPRESCALER__ UART Prescaler value.
\r
1474 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
\r
1476 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
\r
1477 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
\r
1478 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
\r
1479 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
\r
1480 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
\r
1481 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
\r
1482 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
\r
1483 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
\r
1484 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
\r
1485 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
\r
1486 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
\r
1487 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
\r
1493 /* Include UART HAL Extended module */
\r
1494 #include "stm32h7xx_hal_uart_ex.h"
\r
1497 /* Exported functions --------------------------------------------------------*/
\r
1498 /** @addtogroup UART_Exported_Functions UART Exported Functions
\r
1502 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
\r
1506 /* Initialization and de-initialization functions ****************************/
\r
1507 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
\r
1508 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
\r
1509 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
\r
1510 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
\r
1511 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
\r
1512 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
\r
1513 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
\r
1515 /* Callbacks Register/UnRegister functions ***********************************/
\r
1516 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
\r
1517 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback);
\r
1518 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
\r
1519 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
\r
1525 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
\r
1529 /* IO operation functions *****************************************************/
\r
1530 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
\r
1531 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
\r
1532 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
\r
1533 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
\r
1534 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
\r
1535 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
\r
1536 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
\r
1537 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
\r
1538 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
\r
1539 /* Transfer Abort functions */
\r
1540 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
\r
1541 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
\r
1542 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
\r
1543 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
\r
1544 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
\r
1545 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
\r
1547 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
\r
1548 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
\r
1549 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
\r
1550 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
\r
1551 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
\r
1552 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
\r
1553 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
\r
1554 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
\r
1555 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
\r
1561 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
\r
1565 /* Peripheral Control functions ************************************************/
\r
1566 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
\r
1567 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
\r
1568 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
\r
1569 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
\r
1570 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
\r
1571 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
\r
1577 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
\r
1581 /* Peripheral State and Errors functions **************************************************/
\r
1582 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
\r
1583 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
\r
1593 /* Private functions -----------------------------------------------------------*/
\r
1594 /** @addtogroup UART_Private_Functions UART Private Functions
\r
1597 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
\r
1598 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
\r
1599 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
\r
1600 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
\r
1601 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
\r
1602 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
\r
1603 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
\r
1617 #ifdef __cplusplus
\r
1621 #endif /* STM32H7xx_HAL_UART_H */
\r
1623 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
\r
projects / freertos / blob