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1 /*This file has been prepared for Doxygen automatic documentation generation.*/\r
2 /*! \file *********************************************************************\r
3  *\r
4  * \brief FreeRTOS port source for AVR32 UC3.\r
5  *\r
6  * - Compiler:           GNU GCC for AVR32\r
7  * - Supported devices:  All AVR32 devices can be used.\r
8  * - AppNote:\r
9  *\r
10  * \author               Atmel Corporation: http://www.atmel.com \n\r
11  *                       Support and FAQ: http://support.atmel.no/\r
12  *\r
13  *****************************************************************************/\r
14 \r
15 /*\r
16  * FreeRTOS Kernel V10.0.0\r
17  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
18  *\r
19  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
20  * this software and associated documentation files (the "Software"), to deal in\r
21  * the Software without restriction, including without limitation the rights to\r
22  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
23  * the Software, and to permit persons to whom the Software is furnished to do so,\r
24  * subject to the following conditions:\r
25  *\r
26  * The above copyright notice and this permission notice shall be included in all\r
27  * copies or substantial portions of the Software. If you wish to use our Amazon\r
28  * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
29  *\r
30  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
31  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
32  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
33  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
34  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
35  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
36  *\r
37  * http://www.FreeRTOS.org\r
38  * http://aws.amazon.com/freertos\r
39  *\r
40  * 1 tab == 4 spaces!\r
41  */\r
42 \r
43 \r
44 #ifndef PORTMACRO_H\r
45 #define PORTMACRO_H\r
46 \r
47 /*-----------------------------------------------------------\r
48  * Port specific definitions.\r
49  *\r
50  * The settings in this file configure FreeRTOS correctly for the\r
51  * given hardware and compiler.\r
52  *\r
53  * These settings should not be altered.\r
54  *-----------------------------------------------------------\r
55  */\r
56 #include <avr32/io.h>\r
57 #include "intc.h"\r
58 #include "compiler.h"\r
59 \r
60 #ifdef __cplusplus\r
61 extern "C" {\r
62 #endif\r
63 \r
64 \r
65 /* Type definitions. */\r
66 #define portCHAR        char\r
67 #define portFLOAT       float\r
68 #define portDOUBLE      double\r
69 #define portLONG        long\r
70 #define portSHORT       short\r
71 #define portSTACK_TYPE  uint32_t\r
72 #define portBASE_TYPE   long\r
73 \r
74 typedef portSTACK_TYPE StackType_t;\r
75 typedef long BaseType_t;\r
76 typedef unsigned long UBaseType_t;\r
77 \r
78 #define TASK_DELAY_MS(x)   ( (x)        /portTICK_PERIOD_MS )\r
79 #define TASK_DELAY_S(x)    ( (x)*1000   /portTICK_PERIOD_MS )\r
80 #define TASK_DELAY_MIN(x)  ( (x)*60*1000/portTICK_PERIOD_MS )\r
81 \r
82 #define configTICK_TC_IRQ             ATPASTE2(AVR32_TC_IRQ, configTICK_TC_CHANNEL)\r
83 \r
84 #if( configUSE_16_BIT_TICKS == 1 )\r
85         typedef uint16_t TickType_t;\r
86         #define portMAX_DELAY ( TickType_t ) 0xffff\r
87 #else\r
88         typedef uint32_t TickType_t;\r
89         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
90 #endif\r
91 /*-----------------------------------------------------------*/\r
92 \r
93 /* Architecture specifics. */\r
94 #define portSTACK_GROWTH      ( -1 )\r
95 #define portTICK_PERIOD_MS      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
96 #define portBYTE_ALIGNMENT    4\r
97 #define portNOP()             {__asm__ __volatile__ ("nop");}\r
98 /*-----------------------------------------------------------*/\r
99 \r
100 \r
101 /*-----------------------------------------------------------*/\r
102 \r
103 /* INTC-specific. */\r
104 #define DISABLE_ALL_EXCEPTIONS()    Disable_global_exception()\r
105 #define ENABLE_ALL_EXCEPTIONS()     Enable_global_exception()\r
106 \r
107 #define DISABLE_ALL_INTERRUPTS()    Disable_global_interrupt()\r
108 #define ENABLE_ALL_INTERRUPTS()     Enable_global_interrupt()\r
109 \r
110 #define DISABLE_INT_LEVEL(int_lev)  Disable_interrupt_level(int_lev)\r
111 #define ENABLE_INT_LEVEL(int_lev)   Enable_interrupt_level(int_lev)\r
112 \r
113 \r
114 /*\r
115  * Debug trace.\r
116  * Activated if and only if configDBG is nonzero.\r
117  * Prints a formatted string to stdout.\r
118  * The current source file name and line number are output with a colon before\r
119  * the formatted string.\r
120  * A carriage return and a linefeed are appended to the output.\r
121  * stdout is redirected to the USART configured by configDBG_USART.\r
122  * The parameters are the same as for the standard printf function.\r
123  * There is no return value.\r
124  * SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,\r
125  * which is interrupt-unsafe with the current __malloc_lock and __malloc_unlock.\r
126  */\r
127 #if configDBG\r
128 #define portDBG_TRACE(...) \\r
129 {\\r
130   fputs(__FILE__ ":" ASTRINGZ(__LINE__) ": ", stdout);\\r
131   printf(__VA_ARGS__);\\r
132   fputs("\r\n", stdout);\\r
133 }\r
134 #else\r
135 #define portDBG_TRACE(...)\r
136 #endif\r
137 \r
138 \r
139 /* Critical section management. */\r
140 #define portDISABLE_INTERRUPTS()  DISABLE_ALL_INTERRUPTS()\r
141 #define portENABLE_INTERRUPTS()   ENABLE_ALL_INTERRUPTS()\r
142 \r
143 \r
144 extern void vPortEnterCritical( void );\r
145 extern void vPortExitCritical( void );\r
146 \r
147 #define portENTER_CRITICAL()      vPortEnterCritical();\r
148 #define portEXIT_CRITICAL()       vPortExitCritical();\r
149 \r
150 \r
151 /* Added as there is no such function in FreeRTOS. */\r
152 extern void *pvPortRealloc( void *pv, size_t xSize );\r
153 /*-----------------------------------------------------------*/\r
154 \r
155 \r
156 /*=============================================================================================*/\r
157 \r
158 /*\r
159  * Restore Context for cases other than INTi.\r
160  */\r
161 #define portRESTORE_CONTEXT()                                                                                                                   \\r
162 {                                                                                                                                                                               \\r
163   extern volatile uint32_t ulCriticalNesting;                                                                   \\r
164   extern volatile void *volatile pxCurrentTCB;                                                                                  \\r
165                                                                                                                                                                                 \\r
166   __asm__ __volatile__ (                                                                                                                                \\r
167     /* Set SP to point to new stack */                                                                                                  \\r
168     "mov     r8, LO(%[pxCurrentTCB])                                                                                                    \n\t"\\r
169     "orh     r8, HI(%[pxCurrentTCB])                                                                                                    \n\t"\\r
170     "ld.w    r0, r8[0]                                                                                                                                  \n\t"\\r
171     "ld.w    sp, r0[0]                                                                                                                                  \n\t"\\r
172                                                                                                                                                                                 \\r
173     /* Restore ulCriticalNesting variable */                                                                                    \\r
174     "ld.w    r0, sp++                                                                                                                                   \n\t"\\r
175     "mov     r8, LO(%[ulCriticalNesting])                                                                                               \n\t"\\r
176     "orh     r8, HI(%[ulCriticalNesting])                                                                                               \n\t"\\r
177     "st.w    r8[0], r0                                                                                                                                  \n\t"\\r
178                                                                                                                                                                                 \\r
179     /* Restore R0..R7 */                                                                                                                                \\r
180     "ldm     sp++, r0-r7                                                                                                                                \n\t"\\r
181     /* R0-R7 should not be used below this line */                                                                              \\r
182     /* Skip PC and SR (will do it at the end) */                                                                                \\r
183     "sub     sp, -2*4                                                                                                                                   \n\t"\\r
184     /* Restore R8..R12 and LR */                                                                                                                \\r
185     "ldm     sp++, r8-r12, lr                                                                                                                   \n\t"\\r
186     /* Restore SR */                                                                                                                                    \\r
187     "ld.w    r0, sp[-8*4]\n\t" /* R0 is modified, is restored later. */                                 \\r
188     "mtsr    %[SR], r0                                                                                                                                  \n\t"\\r
189     /* Restore r0 */                                                                                                                                    \\r
190     "ld.w    r0, sp[-9*4]                                                                                                                               \n\t"\\r
191     /* Restore PC */                                                                                                                                    \\r
192     "ld.w    pc, sp[-7*4]" /* Get PC from stack - PC is the 7th register saved */               \\r
193     :                                                                                                                                                                   \\r
194     : [ulCriticalNesting] "i" (&ulCriticalNesting),                                                                             \\r
195       [pxCurrentTCB] "i" (&pxCurrentTCB),                                                                                               \\r
196       [SR] "i" (AVR32_SR)                                                                                                                               \\r
197   );                                                                                                                                                                    \\r
198 }\r
199 \r
200 \r
201 /*\r
202  * portSAVE_CONTEXT_INT() and portRESTORE_CONTEXT_INT(): for INT0..3 exceptions.\r
203  * portSAVE_CONTEXT_SCALL() and portRESTORE_CONTEXT_SCALL(): for the scall exception.\r
204  *\r
205  * Had to make different versions because registers saved on the system stack\r
206  * are not the same between INT0..3 exceptions and the scall exception.\r
207  */\r
208 \r
209 // Task context stack layout:\r
210   // R8  (*)\r
211   // R9  (*)\r
212   // R10 (*)\r
213   // R11 (*)\r
214   // R12 (*)\r
215   // R14/LR (*)\r
216   // R15/PC (*)\r
217   // SR (*)\r
218   // R0\r
219   // R1\r
220   // R2\r
221   // R3\r
222   // R4\r
223   // R5\r
224   // R6\r
225   // R7\r
226   // ulCriticalNesting\r
227 // (*) automatically done for INT0..INT3, but not for SCALL\r
228 \r
229 /*\r
230  * The ISR used for the scheduler tick depends on whether the cooperative or\r
231  * the preemptive scheduler is being used.\r
232  */\r
233 #if configUSE_PREEMPTION == 0\r
234 \r
235 /*\r
236  * portSAVE_CONTEXT_OS_INT() for OS Tick exception.\r
237  */\r
238 #define portSAVE_CONTEXT_OS_INT()                                                                                                               \\r
239 {                                                                                                                                                                               \\r
240   /* Save R0..R7 */                                                                                                                                             \\r
241   __asm__ __volatile__ ("stm     --sp, r0-r7");                                                                                 \\r
242                                                                                                                                                                                 \\r
243   /* With the cooperative scheduler, as there is no context switch by interrupt, */             \\r
244   /* there is also no context save. */                                                                                                  \\r
245 }\r
246 \r
247 /*\r
248  * portRESTORE_CONTEXT_OS_INT() for Tick exception.\r
249  */\r
250 #define portRESTORE_CONTEXT_OS_INT()                                                                                                    \\r
251 {                                                                                                                                                                               \\r
252   __asm__ __volatile__ (                                                                                                                                \\r
253     /* Restore R0..R7 */                                                                                                                                \\r
254     "ldm     sp++, r0-r7\n\t"                                                                                                                   \\r
255                                                                                                                                                                                 \\r
256     /* With the cooperative scheduler, as there is no context switch by interrupt, */   \\r
257     /* there is also no context restore. */                                                                                             \\r
258     "rete"                                                                                                                                                              \\r
259   );                                                                                                                                                                    \\r
260 }\r
261 \r
262 #else\r
263 \r
264 /*\r
265  * portSAVE_CONTEXT_OS_INT() for OS Tick exception.\r
266  */\r
267 #define portSAVE_CONTEXT_OS_INT()                                                                                                                                       \\r
268 {                                                                                                                                                                                                       \\r
269   extern volatile uint32_t ulCriticalNesting;                                                                                           \\r
270   extern volatile void *volatile pxCurrentTCB;                                                                                                          \\r
271                                                                                                                                                                                                         \\r
272   /* When we come here */                                                                                                                                                       \\r
273   /* Registers R8..R12, LR, PC and SR had already been pushed to system stack */                                        \\r
274                                                                                                                                                                                                         \\r
275   __asm__ __volatile__ (                                                                                                                                                        \\r
276     /* Save R0..R7 */                                                                                                                                                           \\r
277     "stm     --sp, r0-r7                                                                                                                                                        \n\t"\\r
278                                                                                                                                                                                                         \\r
279     /* Save ulCriticalNesting variable  - R0 is overwritten */                                                                          \\r
280     "mov     r8, LO(%[ulCriticalNesting])\n\t"                                                                                                          \\r
281     "orh     r8, HI(%[ulCriticalNesting])\n\t"                                                                                                          \\r
282     "ld.w    r0, r8[0]                                                                                                                                                          \n\t"\\r
283     "st.w    --sp, r0                                                                                                                                                           \n\t"\\r
284                                                                                                                                                                                                         \\r
285     /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */        \\r
286     /* interrupt handler (which was of a higher priority level but decided to lower its priority */     \\r
287     /* level and allow other lower interrupt level to occur). */                                                                        \\r
288     /* In this case we don't want to do a task switch because we don't know what the stack */           \\r
289     /* currently looks like (we don't know what the interrupted interrupt handler was doing). */        \\r
290     /* Saving SP in pxCurrentTCB and then later restoring it (thinking restoring the task) */           \\r
291     /* will just be restoring the interrupt handler, no way!!! */                                                                       \\r
292     /* So, since we won't do a vTaskSwitchContext(), it's of no use to save SP. */                                      \\r
293     "ld.w    r0, sp[9*4]\n\t" /* Read SR in stack */                                                                                            \\r
294     "bfextu  r0, r0, 22, 3\n\t" /* Extract the mode bits to R0. */                                                                      \\r
295     "cp.w    r0, 1\n\t" /* Compare the mode bits with supervisor mode(b'001) */                                         \\r
296     "brhi    LABEL_INT_SKIP_SAVE_CONTEXT_%[LINE]                                                                                                        \n\t"\\r
297                                                                                                                                                                                                         \\r
298     /* Store SP in the first member of the structure pointed to by pxCurrentTCB */                                      \\r
299     /* NOTE: we don't enter a critical section here because all interrupt handlers */                           \\r
300     /* MUST perform a SAVE_CONTEXT/RESTORE_CONTEXT in the same way as */                                                        \\r
301     /* portSAVE_CONTEXT_OS_INT/port_RESTORE_CONTEXT_OS_INT if they call OS functions. */                        \\r
302     /* => all interrupt handlers must use portENTER_SWITCHING_ISR/portEXIT_SWITCHING_ISR. */            \\r
303     "mov     r8, LO(%[pxCurrentTCB])\n\t"                                                                                                                       \\r
304     "orh     r8, HI(%[pxCurrentTCB])\n\t"                                                                                                                       \\r
305     "ld.w    r0, r8[0]\n\t"                                                                                                                                                     \\r
306     "st.w    r0[0], sp\n"                                                                                                                                                       \\r
307                                                                                                                                                                                                         \\r
308     "LABEL_INT_SKIP_SAVE_CONTEXT_%[LINE]:"                                                                                                                      \\r
309     :                                                                                                                                                                                           \\r
310     : [ulCriticalNesting] "i" (&ulCriticalNesting),                                                                                                     \\r
311       [pxCurrentTCB] "i" (&pxCurrentTCB),                                                                                                                       \\r
312       [LINE] "i" (__LINE__)                                                                                                                                                     \\r
313   );                                                                                                                                                                                            \\r
314 }\r
315 \r
316 /*\r
317  * portRESTORE_CONTEXT_OS_INT() for Tick exception.\r
318  */\r
319 #define portRESTORE_CONTEXT_OS_INT()                                                                                                                            \\r
320 {                                                                                                                                                                                                       \\r
321   extern volatile uint32_t ulCriticalNesting;                                                                                           \\r
322   extern volatile void *volatile pxCurrentTCB;                                                                                                          \\r
323                                                                                                                                                                                                         \\r
324   /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */          \\r
325   /* interrupt handler (which was of a higher priority level but decided to lower its priority */       \\r
326   /* level and allow other lower interrupt level to occur). */                                                                          \\r
327   /* In this case we don't want to do a task switch because we don't know what the stack */                     \\r
328   /* currently looks like (we don't know what the interrupted interrupt handler was doing). */          \\r
329   /* Saving SP in pxCurrentTCB and then later restoring it (thinking restoring the task) */                     \\r
330   /* will just be restoring the interrupt handler, no way!!! */                                                                         \\r
331   __asm__ __volatile__ (                                                                                                                                                        \\r
332     "ld.w    r0, sp[9*4]\n\t" /* Read SR in stack */                                                                                            \\r
333     "bfextu  r0, r0, 22, 3\n\t" /* Extract the mode bits to R0. */                                                                      \\r
334     "cp.w    r0, 1\n\t" /* Compare the mode bits with supervisor mode(b'001) */                                         \\r
335     "brhi    LABEL_INT_SKIP_RESTORE_CONTEXT_%[LINE]"                                                                                            \\r
336     :                                                                                                                                                                                           \\r
337     : [LINE] "i" (__LINE__)                                                                                                                                                     \\r
338   );                                                                                                                                                                                            \\r
339                                                                                                                                                                                                         \\r
340   /* Else */                                                                                                                                                                            \\r
341   /* because it is here safe, always call vTaskSwitchContext() since an OS tick occurred. */            \\r
342   /* A critical section has to be used here because vTaskSwitchContext handles FreeRTOS linked lists. */\\r
343   portENTER_CRITICAL();                                                                                                                                                         \\r
344   vTaskSwitchContext();                                                                                                                                                         \\r
345   portEXIT_CRITICAL();                                                                                                                                                          \\r
346                                                                                                                                                                                                         \\r
347   /* Restore all registers */                                                                                                                                           \\r
348                                                                                                                                                                                                         \\r
349   __asm__ __volatile__ (                                                                                                                                                        \\r
350     /* Set SP to point to new stack */                                                                                                                          \\r
351     "mov     r8, LO(%[pxCurrentTCB])                                                                                                                            \n\t"\\r
352     "orh     r8, HI(%[pxCurrentTCB])                                                                                                                            \n\t"\\r
353     "ld.w    r0, r8[0]                                                                                                                                                          \n\t"\\r
354     "ld.w    sp, r0[0]                                                                                                                                                          \n"\\r
355                                                                                                                                                                                                         \\r
356     "LABEL_INT_SKIP_RESTORE_CONTEXT_%[LINE]:                                                                                                            \n\t"\\r
357                                                                                                                                                                                                         \\r
358     /* Restore ulCriticalNesting variable */                                                                                                            \\r
359     "ld.w    r0, sp++                                                                                                                                                           \n\t"                                                                                                                                                   \\r
360     "mov     r8, LO(%[ulCriticalNesting])                                                                                                                       \n\t"\\r
361     "orh     r8, HI(%[ulCriticalNesting])                                                                                                                       \n\t"\\r
362     "st.w    r8[0], r0                                                                                                                                                          \n\t"\\r
363                                                                                                                                                                                                         \\r
364     /* Restore R0..R7 */                                                                                                                                                        \\r
365     "ldm     sp++, r0-r7                                                                                                                                                        \n\t"\\r
366                                                                                                                                                                                                         \\r
367     /* Now, the stack should be R8..R12, LR, PC and SR */                                                                                       \\r
368     "rete"                                                                                                                                                                                      \\r
369     :                                                                                                                                                                                           \\r
370     : [ulCriticalNesting] "i" (&ulCriticalNesting),                                                                                                     \\r
371       [pxCurrentTCB] "i" (&pxCurrentTCB),                                                                                                                       \\r
372       [LINE] "i" (__LINE__)                                                                                                                                                     \\r
373   );                                                                                                                                                                                            \\r
374 }\r
375 \r
376 #endif\r
377 \r
378 \r
379 /*\r
380  * portSAVE_CONTEXT_SCALL() for SupervisorCALL exception.\r
381  *\r
382  * NOTE: taskYIELD()(== SCALL) MUST NOT be called in a mode > supervisor mode.\r
383  *\r
384  */\r
385 #define portSAVE_CONTEXT_SCALL()                                                                                                                        \\r
386 {                                                                                                                                                                                       \\r
387   extern volatile uint32_t ulCriticalNesting;                                                                           \\r
388   extern volatile void *volatile pxCurrentTCB;                                                                                          \\r
389                                                                                                                                                                                         \\r
390   /* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */         \\r
391   /* If SR[M2:M0] == 001 */                                                                                                                                     \\r
392   /*    PC and SR are on the stack.  */                                                                                                         \\r
393   /* Else (other modes) */                                                                                                                                      \\r
394   /*    Nothing on the stack. */                                                                                                                        \\r
395                                                                                                                                                                                         \\r
396   /* WARNING NOTE: the else case cannot happen as it is strictly forbidden to call */           \\r
397   /* vTaskDelay() and vTaskDelayUntil() OS functions (that result in a taskYield()) */          \\r
398   /* in an interrupt|exception handler. */                                                                                                      \\r
399                                                                                                                                                                                         \\r
400   __asm__ __volatile__ (                                                                                                                                        \\r
401     /* in order to save R0-R7 */                                                                                                                        \\r
402     "sub     sp, 6*4                                                                                                                                            \n\t"\\r
403     /* Save R0..R7 */                                                                                                                                           \\r
404     "stm     --sp, r0-r7                                                                                                                                        \n\t"\\r
405                                                                                                                                                                                         \\r
406     /* in order to save R8-R12 and LR */                                                                                                        \\r
407     /* do not use SP if interrupts occurs, SP must be left at bottom of stack */                        \\r
408     "sub     r7, sp,-16*4                                                                                                                                       \n\t"\\r
409     /* Copy PC and SR in other places in the stack. */                                                                          \\r
410     "ld.w    r0, r7[-2*4]                                                                                                                                       \n\t" /* Read SR */\\r
411     "st.w    r7[-8*4], r0                                                                                                                                       \n\t" /* Copy SR */\\r
412     "ld.w    r0, r7[-1*4]                                                                                                                                       \n\t" /* Read PC */\\r
413     "st.w    r7[-7*4], r0                                                                                                                                       \n\t" /* Copy PC */\\r
414                                                                                                                                                                                         \\r
415     /* Save R8..R12 and LR on the stack. */                                                                                                     \\r
416     "stm     --r7, r8-r12, lr                                                                                                                           \n\t"\\r
417                                                                                                                                                                                         \\r
418     /* Arriving here we have the following stack organizations: */                                                      \\r
419     /* R8..R12, LR, PC, SR, R0..R7. */                                                                                                          \\r
420                                                                                                                                                                                         \\r
421     /* Now we can finalize the save. */                                                                                                         \\r
422                                                                                                                                                                                         \\r
423     /* Save ulCriticalNesting variable  - R0 is overwritten */                                                          \\r
424     "mov     r8, LO(%[ulCriticalNesting])                                                                                                       \n\t"\\r
425     "orh     r8, HI(%[ulCriticalNesting])                                                                                                       \n\t"\\r
426     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
427     "st.w    --sp, r0"                                                                                                                                          \\r
428     :                                                                                                                                                                           \\r
429     : [ulCriticalNesting] "i" (&ulCriticalNesting)                                                                                      \\r
430   );                                                                                                                                                                            \\r
431                                                                                                                                                                                         \\r
432   /* Disable the its which may cause a context switch (i.e. cause a change of */                        \\r
433   /* pxCurrentTCB). */                                                                                                                                          \\r
434   /* Basically, all accesses to the pxCurrentTCB structure should be put in a */                        \\r
435   /* critical section because it is a global structure. */                                                                      \\r
436   portENTER_CRITICAL();                                                                                                                                         \\r
437                                                                                                                                                                                         \\r
438   /* Store SP in the first member of the structure pointed to by pxCurrentTCB */                        \\r
439   __asm__ __volatile__ (                                                                                                                                        \\r
440     "mov     r8, LO(%[pxCurrentTCB])                                                                                                            \n\t"\\r
441     "orh     r8, HI(%[pxCurrentTCB])                                                                                                            \n\t"\\r
442     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
443     "st.w    r0[0], sp"                                                                                                                                         \\r
444     :                                                                                                                                                                           \\r
445     : [pxCurrentTCB] "i" (&pxCurrentTCB)                                                                                                        \\r
446   );                                                                                                                                                                            \\r
447 }\r
448 \r
449 /*\r
450  * portRESTORE_CONTEXT() for SupervisorCALL exception.\r
451  */\r
452 #define portRESTORE_CONTEXT_SCALL()                                                                                                                     \\r
453 {                                                                                                                                                                                       \\r
454   extern volatile uint32_t ulCriticalNesting;                                                                           \\r
455   extern volatile void *volatile pxCurrentTCB;                                                                                          \\r
456                                                                                                                                                                                         \\r
457   /* Restore all registers */                                                                                                                           \\r
458                                                                                                                                                                                         \\r
459   /* Set SP to point to new stack */                                                                                                            \\r
460   __asm__ __volatile__ (                                                                                                                                        \\r
461     "mov     r8, LO(%[pxCurrentTCB])                                                                                                            \n\t"\\r
462     "orh     r8, HI(%[pxCurrentTCB])                                                                                                            \n\t"\\r
463     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
464     "ld.w    sp, r0[0]"                                                                                                                                         \\r
465     :                                                                                                                                                                           \\r
466     : [pxCurrentTCB] "i" (&pxCurrentTCB)                                                                                                        \\r
467   );                                                                                                                                                                            \\r
468                                                                                                                                                                                         \\r
469   /* Leave pxCurrentTCB variable access critical section */                                                                     \\r
470   portEXIT_CRITICAL();                                                                                                                                          \\r
471                                                                                                                                                                                         \\r
472   __asm__ __volatile__ (                                                                                                                                        \\r
473     /* Restore ulCriticalNesting variable */                                                                                            \\r
474     "ld.w    r0, sp++                                                                                                                                           \n\t"\\r
475     "mov     r8, LO(%[ulCriticalNesting])                                                                                                       \n\t"\\r
476     "orh     r8, HI(%[ulCriticalNesting])                                                                                                       \n\t"\\r
477     "st.w    r8[0], r0                                                                                                                                          \n\t"\\r
478                                                                                                                                                                                         \\r
479     /* skip PC and SR */                                                                                                                                        \\r
480     /* do not use SP if interrupts occurs, SP must be left at bottom of stack */                        \\r
481     "sub     r7, sp, -10*4                                                                                                                                      \n\t"\\r
482     /* Restore r8-r12 and LR */                                                                                                                         \\r
483     "ldm     r7++, r8-r12, lr                                                                                                                           \n\t"\\r
484                                                                                                                                                                                         \\r
485     /* RETS will take care of the extra PC and SR restore. */                                                           \\r
486     /* So, we have to prepare the stack for this. */                                                                            \\r
487     "ld.w    r0, r7[-8*4]                                                                                                                                       \n\t" /* Read SR */\\r
488     "st.w    r7[-2*4], r0                                                                                                                                       \n\t" /* Copy SR */\\r
489     "ld.w    r0, r7[-7*4]                                                                                                                                       \n\t" /* Read PC */\\r
490     "st.w    r7[-1*4], r0                                                                                                                                       \n\t" /* Copy PC */\\r
491                                                                                                                                                                                         \\r
492     /* Restore R0..R7 */                                                                                                                                        \\r
493     "ldm     sp++, r0-r7                                                                                                                                        \n\t"\\r
494                                                                                                                                                                                         \\r
495     "sub     sp, -6*4                                                                                                                                           \n\t"\\r
496                                                                                                                                                                                         \\r
497     "rets"                                                                                                                                                                      \\r
498     :                                                                                                                                                                           \\r
499     : [ulCriticalNesting] "i" (&ulCriticalNesting)                                                                                      \\r
500   );                                                                                                                                                                            \\r
501 }\r
502 \r
503 \r
504 /*\r
505  * The ISR used depends on whether the cooperative or\r
506  * the preemptive scheduler is being used.\r
507  */\r
508 #if configUSE_PREEMPTION == 0\r
509 \r
510 /*\r
511  * ISR entry and exit macros.  These are only required if a task switch\r
512  * is required from the ISR.\r
513  */\r
514 #define portENTER_SWITCHING_ISR()                                                                                                                       \\r
515 {                                                                                                                                                                                       \\r
516   /* Save R0..R7 */                                                                                                                                                     \\r
517   __asm__ __volatile__ ("stm     --sp, r0-r7");                                                                                         \\r
518                                                                                                                                                                                         \\r
519   /* With the cooperative scheduler, as there is no context switch by interrupt, */                     \\r
520   /* there is also no context save. */                                                                                                          \\r
521 }\r
522 \r
523 /*\r
524  * Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1\r
525  */\r
526 #define portEXIT_SWITCHING_ISR()                                                                                                                        \\r
527 {                                                                                                                                                                                       \\r
528   __asm__ __volatile__ (                                                                                                                                        \\r
529     /* Restore R0..R7 */                                                                                                                                        \\r
530     "ldm     sp++, r0-r7                                                                                                                                        \n\t"\\r
531                                                                                                                                                                                         \\r
532     /* With the cooperative scheduler, as there is no context switch by interrupt, */           \\r
533     /* there is also no context restore. */                                                                                                     \\r
534     "rete"                                                                                                                                                                      \\r
535   );                                                                                                                                                                            \\r
536 }\r
537 \r
538 #else\r
539 \r
540 /*\r
541  * ISR entry and exit macros.  These are only required if a task switch\r
542  * is required from the ISR.\r
543  */\r
544 #define portENTER_SWITCHING_ISR()                                                                                                                       \\r
545 {                                                                                                                                                                                       \\r
546   extern volatile uint32_t ulCriticalNesting;                                                                           \\r
547   extern volatile void *volatile pxCurrentTCB;                                                                                          \\r
548                                                                                                                                                                                         \\r
549   /* When we come here */                                                                                                                                       \\r
550   /* Registers R8..R12, LR, PC and SR had already been pushed to system stack */                        \\r
551                                                                                                                                                                                         \\r
552   __asm__ __volatile__ (                                                                                                                                        \\r
553     /* Save R0..R7 */                                                                                                                                           \\r
554     "stm     --sp, r0-r7                                                                                                                                        \n\t"\\r
555                                                                                                                                                                                         \\r
556     /* Save ulCriticalNesting variable  - R0 is overwritten */                                                          \\r
557     "mov     r8, LO(%[ulCriticalNesting])                                                                                                       \n\t"\\r
558     "orh     r8, HI(%[ulCriticalNesting])                                                                                                       \n\t"\\r
559     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
560     "st.w    --sp, r0                                                                                                                                           \n\t"\\r
561                                                                                                                                                                                                         \\r
562     /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */        \\r
563     /* interrupt handler (which was of a higher priority level but decided to lower its priority */     \\r
564     /* level and allow other lower interrupt level to occur). */                                                                        \\r
565     /* In this case we don't want to do a task switch because we don't know what the stack */           \\r
566     /* currently looks like (we don't know what the interrupted interrupt handler was doing). */        \\r
567     /* Saving SP in pxCurrentTCB and then later restoring it (thinking restoring the task) */           \\r
568     /* will just be restoring the interrupt handler, no way!!! */                                                                       \\r
569     /* So, since we won't do a vTaskSwitchContext(), it's of no use to save SP. */                                      \\r
570     "ld.w    r0, sp[9*4]                                                                                                                                        \n\t" /* Read SR in stack */\\r
571     "bfextu  r0, r0, 22, 3                                                                                                                                      \n\t" /* Extract the mode bits to R0. */\\r
572     "cp.w    r0, 1                                                                                                                                                      \n\t" /* Compare the mode bits with supervisor mode(b'001) */\\r
573     "brhi    LABEL_ISR_SKIP_SAVE_CONTEXT_%[LINE]                                                                                        \n\t"\\r
574                                                                                                                                                                                         \\r
575     /* Store SP in the first member of the structure pointed to by pxCurrentTCB */                      \\r
576     "mov     r8, LO(%[pxCurrentTCB])                                                                                                            \n\t"\\r
577     "orh     r8, HI(%[pxCurrentTCB])                                                                                                            \n\t"\\r
578     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
579     "st.w    r0[0], sp                                                                                                                                          \n"\\r
580                                                                                                                                                                                         \\r
581     "LABEL_ISR_SKIP_SAVE_CONTEXT_%[LINE]:"                                                                                                      \\r
582     :                                                                                                                                                                           \\r
583     : [ulCriticalNesting] "i" (&ulCriticalNesting),                                                                                     \\r
584       [pxCurrentTCB] "i" (&pxCurrentTCB),                                                                                                       \\r
585       [LINE] "i" (__LINE__)                                                                                                                                     \\r
586   );                                                                                                                                                                            \\r
587 }\r
588 \r
589 /*\r
590  * Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1\r
591  */\r
592 #define portEXIT_SWITCHING_ISR()                                                                                                                        \\r
593 {                                                                                                                                                                                       \\r
594   extern volatile uint32_t ulCriticalNesting;                                                                           \\r
595   extern volatile void *volatile pxCurrentTCB;                                                                                          \\r
596                                                                                                                                                                                         \\r
597   __asm__ __volatile__ (                                                                                                                                        \\r
598     /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */                \\r
599     /* interrupt handler (which was of a higher priority level but decided to lower its priority */             \\r
600     /* level and allow other lower interrupt level to occur). */                                                                                \\r
601     /* In this case it's of no use to switch context and restore a new SP because we purposedly */              \\r
602     /* did not previously save SP in its TCB. */                                                                                                                                                                \\r
603     "ld.w    r0, sp[9*4]                                                                                                                                        \n\t" /* Read SR in stack */\\r
604     "bfextu  r0, r0, 22, 3                                                                                                                                      \n\t" /* Extract the mode bits to R0. */\\r
605     "cp.w    r0, 1                                                                                                                                                      \n\t" /* Compare the mode bits with supervisor mode(b'001) */\\r
606     "brhi    LABEL_ISR_SKIP_RESTORE_CONTEXT_%[LINE]                                                                                     \n\t"\\r
607                                                                                                                                                                                         \\r
608     /* If a switch is required then we just need to call */                                                                     \\r
609     /* vTaskSwitchContext() as the context has already been */                                                          \\r
610     /* saved. */                                                                                                                                                        \\r
611     "cp.w    r12, 1                                                                                                                                                     \n\t" /* Check if Switch context is required. */\\r
612     "brne    LABEL_ISR_RESTORE_CONTEXT_%[LINE]"                                                                                         \\r
613     :                                                                                                                                                                           \\r
614     : [LINE] "i" (__LINE__)                                                                                                                                     \\r
615   );                                                                                                                                                                            \\r
616                                                                                                                                                                                         \\r
617   /* A critical section has to be used here because vTaskSwitchContext handles FreeRTOS linked lists. */        \\r
618   portENTER_CRITICAL();                                                                                                                                         \\r
619   vTaskSwitchContext();                                                                                                                                         \\r
620   portEXIT_CRITICAL();                                                                                                                                          \\r
621                                                                                                                                                                                         \\r
622   __asm__ __volatile__ (                                                                                                                                        \\r
623     "LABEL_ISR_RESTORE_CONTEXT_%[LINE]:                                                                                                         \n\t"\\r
624     /* Restore the context of which ever task is now the highest */                                                     \\r
625     /* priority that is ready to run. */                                                                                                        \\r
626                                                                                                                                                                                         \\r
627     /* Restore all registers */                                                                                                                         \\r
628                                                                                                                                                                                         \\r
629     /* Set SP to point to new stack */                                                                                                          \\r
630     "mov     r8, LO(%[pxCurrentTCB])                                                                                                            \n\t"\\r
631     "orh     r8, HI(%[pxCurrentTCB])                                                                                                            \n\t"\\r
632     "ld.w    r0, r8[0]                                                                                                                                          \n\t"\\r
633     "ld.w    sp, r0[0]                                                                                                                                          \n"\\r
634                                                                                                                                                                                         \\r
635     "LABEL_ISR_SKIP_RESTORE_CONTEXT_%[LINE]:                                                                                            \n\t"\\r
636                                                                                                                                                                                         \\r
637     /* Restore ulCriticalNesting variable */                                                                                            \\r
638     "ld.w    r0, sp++                                                                                                                                           \n\t"\\r
639     "mov     r8, LO(%[ulCriticalNesting])                                                                                                       \n\t"\\r
640     "orh     r8, HI(%[ulCriticalNesting])                                                                                                       \n\t"\\r
641     "st.w    r8[0], r0                                                                                                                                          \n\t"\\r
642                                                                                                                                                                                         \\r
643     /* Restore R0..R7 */                                                                                                                                        \\r
644     "ldm     sp++, r0-r7                                                                                                                                        \n\t"\\r
645                                                                                                                                                                                         \\r
646     /* Now, the stack should be R8..R12, LR, PC and SR  */                                                                      \\r
647     "rete"                                                                                                                                                                      \\r
648     :                                                                                                                                                                           \\r
649     : [ulCriticalNesting] "i" (&ulCriticalNesting),                                                                                     \\r
650       [pxCurrentTCB] "i" (&pxCurrentTCB),                                                                                                       \\r
651       [LINE] "i" (__LINE__)                                                                                                                                     \\r
652   );                                                                                                                                                                            \\r
653 }\r
654 \r
655 #endif\r
656 \r
657 \r
658 #define portYIELD()                 {__asm__ __volatile__ ("scall");}\r
659 \r
660 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
661 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
662 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
663 \r
664 #ifdef __cplusplus\r
665 }\r
666 #endif\r
667 \r
668 #endif /* PORTMACRO_H */\r