2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /* Standard includes. */
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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36 /* The critical nesting value is initialised to a non zero value to ensure
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37 interrupts don't accidentally become enabled before the scheduler is started. */
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38 #define portINITIAL_CRITICAL_NESTING (( uint16_t ) 10)
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40 /* Initial PSW value allocated to a newly created task.
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42 * ||||||||-------------- Fill byte
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43 * |||||||--------------- Carry Flag cleared
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44 * |||||----------------- In-service priority Flags set to low level
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45 * ||||------------------ Register bank Select 0 Flag cleared
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46 * |||------------------- Auxiliary Carry Flag cleared
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47 * ||-------------------- Register bank Select 1 Flag cleared
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48 * |--------------------- Zero Flag set
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49 * ---------------------- Global Interrupt Flag set (enabled)
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51 #define portPSW (0xc6UL)
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53 /* We require the address of the pxCurrentTCB variable, but don't want to know
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54 any details of its type. */
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56 extern volatile TCB_t * volatile pxCurrentTCB;
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58 /* Most ports implement critical sections by placing the interrupt flags on
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59 the stack before disabling interrupts. Exiting the critical section is then
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60 simply a case of popping the flags from the stack. As 78K0 IAR does not use
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61 a frame pointer this cannot be done as modifying the stack will clobber all
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62 the stack variables. Instead each task maintains a count of the critical
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63 section nesting depth. Each time a critical section is entered the count is
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64 incremented. Each time a critical section is left the count is decremented -
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65 with interrupts only being re-enabled if the count is zero.
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67 usCriticalNesting will get set to zero when the scheduler starts, but must
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68 not be initialised to zero as this will cause problems during the startup
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70 volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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71 /*-----------------------------------------------------------*/
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74 * Sets up the periodic ISR used for the RTOS tick.
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76 static void prvSetupTimerInterrupt( void );
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77 /*-----------------------------------------------------------*/
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80 * Initialise the stack of a task to look exactly as if a call to
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81 * portSAVE_CONTEXT had been called.
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83 * See the header file portable.h.
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85 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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89 #if configMEMORY_MODE == 1
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91 /* Parameters are passed in on the stack, and written using a 32bit value
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92 hence a space is left for the second two bytes. */
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95 /* Write in the parameter value. */
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96 pulLocal = ( uint32_t * ) pxTopOfStack;
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97 *pulLocal = ( uint32_t ) pvParameters;
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100 /* These values are just spacers. The return address of the function
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101 would normally be written here. */
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102 *pxTopOfStack = ( StackType_t ) 0xcdcd;
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104 *pxTopOfStack = ( StackType_t ) 0xcdcd;
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107 /* The start address / PSW value is also written in as a 32bit value,
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108 so leave a space for the second two bytes. */
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111 /* Task function start address combined with the PSW. */
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112 pulLocal = ( uint32_t * ) pxTopOfStack;
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113 *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );
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116 /* An initial value for the AX register. */
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117 *pxTopOfStack = ( StackType_t ) 0x1111;
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122 /* Task function address is written to the stack first. As it is
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123 written as a 32bit value a space is left on the stack for the second
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127 /* Task function start address combined with the PSW. */
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128 pulLocal = ( uint32_t * ) pxTopOfStack;
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129 *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );
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132 /* The parameter is passed in AX. */
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133 *pxTopOfStack = ( StackType_t ) pvParameters;
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138 /* An initial value for the HL register. */
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139 *pxTopOfStack = ( StackType_t ) 0x2222;
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142 /* CS and ES registers. */
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143 *pxTopOfStack = ( StackType_t ) 0x0F00;
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146 /* Finally the remaining general purpose registers DE and BC */
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147 *pxTopOfStack = ( StackType_t ) 0xDEDE;
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149 *pxTopOfStack = ( StackType_t ) 0xBCBC;
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152 /* Finally the critical section nesting count is set to zero when the task
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154 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
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156 /* Return a pointer to the top of the stack we have generated so this can
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157 be stored in the task control block for the task. */
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158 return pxTopOfStack;
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160 /*-----------------------------------------------------------*/
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162 BaseType_t xPortStartScheduler( void )
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164 /* Setup the hardware to generate the tick. Interrupts are disabled when
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165 this function is called. */
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166 prvSetupTimerInterrupt();
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168 /* Restore the context of the first task that is going to run. */
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171 /* Should not get here as the tasks are now running! */
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174 /*-----------------------------------------------------------*/
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176 void vPortEndScheduler( void )
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178 /* It is unlikely that the 78K0R port will get stopped. If required simply
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179 disable the tick interrupt here. */
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181 /*-----------------------------------------------------------*/
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183 static void prvSetupTimerInterrupt( void )
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185 /* Setup channel 5 of the TAU to generate the tick interrupt. */
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187 /* First the Timer Array Unit has to be enabled. */
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190 /* To configure the Timer Array Unit all Channels have to first be stopped. */
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193 /* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt
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197 /* Clear Timer Array Unit Channel 5 interrupt flag. */
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200 /* Set Timer Array Unit Channel 5 interrupt priority */
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204 /* Set Timer Array Unit Channel 5 Mode as interval timer. */
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207 /* Set the compare match value according to the tick rate we want. */
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208 TDR05 = ( TickType_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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210 /* Set Timer Array Unit Channel 5 output mode */
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213 /* Set Timer Array Unit Channel 5 output level */
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216 /* Set Timer Array Unit Channel 5 output enable */
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219 /* Interrupt of Timer Array Unit Channel 5 enabled */
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222 /* Start Timer Array Unit Channel 5.*/
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225 /*-----------------------------------------------------------*/
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