2 FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to !<<
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28 >>! distribute a combined work that includes FreeRTOS without being !<<
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29 >>! obliged to provide the source code for proprietary components !<<
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30 >>! outside of the FreeRTOS kernel. !<<
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /* Standard includes. */
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70 #include <intrinsics.h>
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72 /* Scheduler includes. */
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73 #include "FreeRTOS.h"
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76 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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77 /* Check the configuration. */
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78 #if( configMAX_PRIORITIES > 32 )
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79 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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81 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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83 /* A critical section is exited when the critical section nesting count reaches
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85 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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87 /* Tasks are not created with a floating point context, but can be given a
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88 floating point context after they have been created. A variable is stored as
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89 part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
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90 does not have an FPU context, or any other value if the task does have an FPU
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92 #define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
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94 /* Constants required to setup the initial task context. */
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95 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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96 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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97 #define portTHUMB_MODE_ADDRESS ( 0x01UL )
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99 /* Masks all bits in the APSR other than the mode bits. */
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100 #define portAPSR_MODE_BITS_MASK ( 0x1F )
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102 /* The value of the mode bits in the APSR when the CPU is executing in user
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104 #define portAPSR_USER_MODE ( 0x10 )
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106 /*-----------------------------------------------------------*/
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109 * Starts the first task executing. This function is necessarily written in
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110 * assembly code so is implemented in portASM.s.
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112 extern void vPortRestoreTaskContext( void );
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115 * Used to catch tasks that attempt to return from their implementing function.
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117 static void prvTaskExitError( void );
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119 /*-----------------------------------------------------------*/
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121 /* A variable is used to keep track of the critical section nesting. This
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122 variable has to be stored as part of the task context and must be initialised to
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123 a non zero value to ensure interrupts don't inadvertently become unmasked before
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124 the scheduler starts. As it is stored as part of the task context it will
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125 automatically be set to 0 when the first task is started. */
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126 volatile uint32_t ulCriticalNesting = 9999UL;
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128 /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
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129 then a floating point context must be saved and restored for the task. */
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130 uint32_t ulPortTaskHasFPUContext = pdFALSE;
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132 /* Set to 1 to pend a context switch from an ISR. */
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133 uint32_t ulPortYieldRequired = pdFALSE;
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135 /* Counts the interrupt nesting depth. A context switch is only performed if
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136 if the nesting depth is 0. */
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137 uint32_t ulPortInterruptNesting = 0UL;
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140 /*-----------------------------------------------------------*/
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143 * See header file for description.
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145 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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147 /* Setup the initial stack of the task. The stack is set exactly as
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148 expected by the portRESTORE_CONTEXT() macro.
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150 The fist real value on the stack is the status register, which is set for
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151 system mode, with interrupts enabled. A few NULLs are added first to ensure
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152 GDB does not try decoding a non-existent return address. */
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153 *pxTopOfStack = NULL;
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155 *pxTopOfStack = NULL;
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157 *pxTopOfStack = NULL;
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159 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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161 if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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163 /* The task will start in THUMB mode. */
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164 *pxTopOfStack |= portTHUMB_MODE_BIT;
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169 /* Next the return address, which in this case is the start of the task. */
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170 *pxTopOfStack = ( StackType_t ) pxCode;
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173 /* Next all the registers other than the stack pointer. */
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174 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* R14 */
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176 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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178 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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180 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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182 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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184 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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186 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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188 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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190 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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192 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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194 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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196 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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198 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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200 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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203 /* The task will start with a critical nesting count of 0 as interrupts are
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205 *pxTopOfStack = portNO_CRITICAL_NESTING;
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208 /* The task will start without a floating point context. A task that uses
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209 the floating point hardware must call vPortTaskUsesFPU() before executing
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210 any floating point instructions. */
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211 *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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213 return pxTopOfStack;
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215 /*-----------------------------------------------------------*/
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217 static void prvTaskExitError( void )
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219 /* A function that implements a task must not exit or attempt to return to
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220 its caller as there is nothing to return to. If a task wants to exit it
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221 should instead call vTaskDelete( NULL ).
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223 Artificially force an assert() to be triggered if configASSERT() is
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224 defined, then stop here so application writers can catch the error. */
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225 configASSERT( ulPortInterruptNesting == ~0UL );
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226 portDISABLE_INTERRUPTS();
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229 /*-----------------------------------------------------------*/
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231 BaseType_t xPortStartScheduler( void )
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235 /* Only continue if the CPU is not in User mode. The CPU must be in a
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236 Privileged mode for the scheduler to start. */
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237 __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
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238 ulAPSR &= portAPSR_MODE_BITS_MASK;
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239 configASSERT( ulAPSR != portAPSR_USER_MODE );
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241 if( ulAPSR != portAPSR_USER_MODE )
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243 /* Start the timer that generates the tick ISR. */
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244 configSETUP_TICK_INTERRUPT();
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246 vPortRestoreTaskContext();
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249 /* Will only get here if xTaskStartScheduler() was called with the CPU in
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250 a non-privileged mode or the binary point register was not set to its lowest
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254 /*-----------------------------------------------------------*/
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256 void vPortEndScheduler( void )
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258 /* Not implemented in ports where there is nothing to return to.
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259 Artificially force an assert. */
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260 configASSERT( ulCriticalNesting == 1000UL );
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262 /*-----------------------------------------------------------*/
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264 void vPortEnterCritical( void )
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266 portDISABLE_INTERRUPTS();
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268 /* Now interrupts are disabled ulCriticalNesting can be accessed
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269 directly. Increment ulCriticalNesting to keep a count of how many times
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270 portENTER_CRITICAL() has been called. */
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271 ulCriticalNesting++;
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273 /* This is not the interrupt safe version of the enter critical function so
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274 assert() if it is being called from an interrupt context. Only API
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275 functions that end in "FromISR" can be used in an interrupt. Only assert if
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276 the critical nesting count is 1 to protect against recursive calls if the
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277 assert function also uses a critical section. */
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278 if( ulCriticalNesting == 1 )
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280 configASSERT( ulPortInterruptNesting == 0 );
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283 /*-----------------------------------------------------------*/
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285 void vPortExitCritical( void )
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287 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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289 /* Decrement the nesting count as the critical section is being
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291 ulCriticalNesting--;
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293 /* If the nesting level has reached zero then all interrupt
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294 priorities must be re-enabled. */
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295 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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297 /* Critical nesting has reached zero so all interrupt priorities
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298 should be unmasked. */
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299 portENABLE_INTERRUPTS();
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303 /*-----------------------------------------------------------*/
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305 void FreeRTOS_Tick_Handler( void )
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307 portDISABLE_INTERRUPTS();
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309 /* Increment the RTOS tick. */
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310 if( xTaskIncrementTick() != pdFALSE )
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312 ulPortYieldRequired = pdTRUE;
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315 portENABLE_INTERRUPTS();
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316 configCLEAR_TICK_INTERRUPT();
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318 /*-----------------------------------------------------------*/
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320 void vPortTaskUsesFPU( void )
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322 uint32_t ulInitialFPSCR = 0;
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324 /* A task is registering the fact that it needs an FPU context. Set the
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325 FPU flag (which is saved as part of the task context). */
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326 ulPortTaskHasFPUContext = pdTRUE;
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328 /* Initialise the floating point status register. */
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329 __asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
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331 /*-----------------------------------------------------------*/
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