2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the Philips ARM7 port.
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68 *----------------------------------------------------------*/
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73 + Bug fix - The prescale value for the timer setup is now written to T0PR
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74 instead of T0PC. This bug would have had no effect unless a prescale
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75 value was actually used.
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78 /* Standard includes. */
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80 #include <intrinsics.h>
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 /* Constants required to setup the tick ISR. */
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87 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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88 #define portPRESCALE_VALUE 0x00
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89 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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90 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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92 /* Constants required to setup the initial stack. */
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93 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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94 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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95 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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97 /* Constants required to setup the PIT. */
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98 #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
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99 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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101 /* Constants required to handle interrupts. */
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102 #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
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103 #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
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105 /* Constants required to handle critical sections. */
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106 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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109 #define portINT_LEVEL_SENSITIVE 0
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110 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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111 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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113 /* Constants required to setup the VIC for the tick ISR. */
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114 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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115 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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116 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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118 /*-----------------------------------------------------------*/
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120 /* Setup the PIT to generate the tick interrupts. */
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121 static void prvSetupTimerInterrupt( void );
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123 /* ulCriticalNesting will get set to zero when the first task starts. It
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124 cannot be initialised to 0 as this will cause interrupts to be enabled
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125 during the kernel initialisation process. */
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126 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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128 /*-----------------------------------------------------------*/
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131 * Initialise the stack of a task to look exactly as if a call to
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132 * portSAVE_CONTEXT had been called.
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134 * See header file for description.
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136 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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138 StackType_t *pxOriginalTOS;
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140 pxOriginalTOS = pxTopOfStack;
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142 /* Setup the initial stack of the task. The stack is set exactly as
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143 expected by the portRESTORE_CONTEXT() macro. */
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145 /* First on the stack is the return address - which in this case is the
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146 start of the task. The offset is added to make the return address appear
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147 as it would within an IRQ ISR. */
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148 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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151 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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153 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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155 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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157 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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159 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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161 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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163 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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165 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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167 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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169 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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171 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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173 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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175 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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177 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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180 /* When the task starts is will expect to find the function parameter in
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182 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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185 /* The status register is set for system mode, with interrupts enabled. */
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186 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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188 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
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190 /* We want the task to start in thumb mode. */
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191 *pxTopOfStack |= portTHUMB_MODE_BIT;
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196 /* Interrupt flags cannot always be stored on the stack and will
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197 instead be stored in a variable, which is then saved as part of the
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199 *pxTopOfStack = portNO_CRITICAL_NESTING;
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201 return pxTopOfStack;
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203 /*-----------------------------------------------------------*/
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205 BaseType_t xPortStartScheduler( void )
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207 extern void vPortStartFirstTask( void );
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209 /* Start the timer that generates the tick ISR. Interrupts are disabled
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211 prvSetupTimerInterrupt();
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213 /* Start the first task. */
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214 vPortStartFirstTask();
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216 /* Should not get here! */
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219 /*-----------------------------------------------------------*/
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221 void vPortEndScheduler( void )
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223 /* It is unlikely that the ARM port will require this function as there
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224 is nothing to return to. */
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226 /*-----------------------------------------------------------*/
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228 #if configUSE_PREEMPTION == 0
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230 /* The cooperative scheduler requires a normal IRQ service routine to
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231 simply increment the system tick. */
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232 static __arm __irq void vPortNonPreemptiveTick( void );
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233 static __arm __irq void vPortNonPreemptiveTick( void )
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235 /* Increment the tick count - which may wake some tasks but as the
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236 preemptive scheduler is not being used any woken task is not given
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237 processor time no matter what its priority. */
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238 xTaskIncrementTick();
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240 /* Ready for the next interrupt. */
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241 T0IR = portTIMER_MATCH_ISR_BIT;
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242 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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247 /* This function is called from an asm wrapper, so does not require the __irq
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249 void vPortPreemptiveTick( void );
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250 void vPortPreemptiveTick( void )
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252 /* Increment the tick counter. */
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253 if( xTaskIncrementTick() != pdFALSE )
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255 /* The new tick value might unblock a task. Ensure the highest task that
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256 is ready to execute is the task that will execute when the tick ISR
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258 vTaskSwitchContext();
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261 /* Ready for the next interrupt. */
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262 T0IR = portTIMER_MATCH_ISR_BIT;
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263 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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268 /*-----------------------------------------------------------*/
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270 static void prvSetupTimerInterrupt( void )
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272 uint32_t ulCompareMatch;
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274 /* A 1ms tick does not require the use of the timer prescale. This is
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275 defaulted to zero but can be used if necessary. */
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276 T0PR = portPRESCALE_VALUE;
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278 /* Calculate the match value required for our wanted tick rate. */
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279 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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281 /* Protect against divide by zero. Using an if() statement still results
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282 in a warning - hence the #if. */
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283 #if portPRESCALE_VALUE != 0
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285 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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289 T0MR0 = ulCompareMatch;
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291 /* Generate tick with timer 0 compare match. */
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292 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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294 /* Setup the VIC for the timer. */
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295 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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296 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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298 /* The ISR installed depends on whether the preemptive or cooperative
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299 scheduler is being used. */
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300 #if configUSE_PREEMPTION == 1
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302 extern void ( vPortPreemptiveTickEntry )( void );
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304 VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry;
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308 extern void ( vNonPreemptiveTick )( void );
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310 VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick;
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314 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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316 /* Start the timer - interrupts are disabled when this function is called
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317 so it is okay to do this here. */
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318 T0TCR = portENABLE_TIMER;
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320 /*-----------------------------------------------------------*/
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322 void vPortEnterCritical( void )
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324 /* Disable interrupts first! */
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325 __disable_interrupt();
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327 /* Now interrupts are disabled ulCriticalNesting can be accessed
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328 directly. Increment ulCriticalNesting to keep a count of how many times
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329 portENTER_CRITICAL() has been called. */
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330 ulCriticalNesting++;
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332 /*-----------------------------------------------------------*/
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334 void vPortExitCritical( void )
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336 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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338 /* Decrement the nesting count as we are leaving a critical section. */
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339 ulCriticalNesting--;
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341 /* If the nesting level has reached zero then interrupts should be
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343 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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345 __enable_interrupt();
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349 /*-----------------------------------------------------------*/
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