2 * ARC Build Configuration Registers, with encoded hardware config
4 * Copyright (C) 2018 Synopsys
5 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
20 #ifdef CONFIG_CPU_BIG_ENDIAN
21 unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
23 unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
31 #ifdef CONFIG_CPU_BIG_ENDIAN
32 unsigned int pad:24, way:2, lsz:2, sz:4;
34 unsigned int sz:4, lsz:2, way:2, pad:24;
42 #ifdef CONFIG_CPU_BIG_ENDIAN
43 unsigned int pad:24, ver:8;
45 unsigned int ver:8, pad:24;
53 #ifdef CONFIG_CPU_BIG_ENDIAN
54 unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
56 unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
64 #ifdef CONFIG_CPU_BIG_ENDIAN
65 unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
66 n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
68 /* DTLB ITLB JES JE JA */
69 unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
70 pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
76 #endif /* __ASSEMBLY__ */
77 #endif /* __ARC_BCR_H */