3 * Sascha Hauer, Pengutronix
5 * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/crm_regs.h>
31 #include <asm/arch/clock.h>
33 DECLARE_GLOBAL_DATA_PTR;
35 #define timestamp (gd->tbl)
36 #define lastinc (gd->lastinc)
38 /* General purpose timers bitfields */
39 #define GPTCR_SWR (1<<15) /* Software reset */
40 #define GPTCR_FRR (1<<9) /* Freerun / restart */
41 #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
42 #define GPTCR_TEN (1) /* Timer enable */
45 * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
46 * "tick" is internal timer period
48 /* ~0.4% error - measured with stop-watch on 100s boot-delay */
49 static inline unsigned long long tick_to_time(unsigned long long tick)
51 tick *= CONFIG_SYS_HZ;
52 do_div(tick, MXC_CLK32);
57 static inline unsigned long long us_to_tick(unsigned long long us)
59 us = us * MXC_CLK32 + 999999;
66 * nothing really to do with interrupts, just starts up a counter.
67 * The 32KHz 32-bit timer overruns in 134217 seconds
72 struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
73 struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
75 /* setup GP Timer 1 */
76 writel(GPTCR_SWR, &gpt->ctrl);
78 writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
80 for (i = 0; i < 100; i++)
81 writel(0, &gpt->ctrl); /* We have no udelay by now */
82 writel(0, &gpt->pre); /* prescaler = 1 */
83 /* Freerun Mode, 32KHz input */
84 writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
86 writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
91 unsigned long long get_ticks(void)
93 struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
94 ulong now = readl(&gpt->counter); /* current tick value */
98 * normal mode (non roll)
99 * move stamp forward with absolut diff ticks
101 timestamp += (now - lastinc);
103 /* we have rollover of incrementer */
104 timestamp += (0xFFFFFFFF - lastinc) + now;
110 ulong get_timer_masked(void)
113 * get_ticks() returns a long long (64 bit), it wraps in
114 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
115 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
116 * 5 * 10^6 days - long enough.
118 return tick_to_time(get_ticks());
121 ulong get_timer(ulong base)
123 return get_timer_masked() - base;
126 /* delay x useconds AND preserve advance timstamp value */
127 void __udelay(unsigned long usec)
129 unsigned long long tmp;
132 tmo = us_to_tick(usec);
133 tmp = get_ticks() + tmo; /* get current timestamp */
135 while (get_ticks() < tmp) /* loop till event */
140 * This function is derived from PowerPC code (timebase clock frequency).
141 * On ARM it returns the number of timer ticks per second.
143 ulong get_tbclk(void)