2 * armboot - Startup Code for OMP2420/ARM1136 CPU-core
4 * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
6 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
7 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
8 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
9 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
10 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm-offsets.h>
36 #ifdef CONFIG_PRELOADER
53 .word 0x12345678 /* now 16*4=64 */
55 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort
63 _undefined_instruction: .word undefined_instruction
64 _software_interrupt: .word software_interrupt
65 _prefetch_abort: .word prefetch_abort
66 _data_abort: .word data_abort
67 _not_used: .word not_used
70 _pad: .word 0x12345678 /* now 16*4=64 */
71 #endif /* CONFIG_PRELOADER */
75 .balignl 16,0xdeadbeef
77 *************************************************************************
79 * Startup Code (reset vector)
81 * do important init only if we don't start from memory!
82 * setup Memory and board specific bits prior to relocation.
83 * relocate armboot to ram
86 *************************************************************************
91 .word CONFIG_SYS_TEXT_BASE
94 * These are defined in the board-specific linker script.
95 * Subtracting _start from them lets the linker put their
96 * relative position in the executable instead of leaving
101 .word __bss_start - _start
107 .globl _datarel_start_ofs
109 .word __datarel_start - _start
111 .globl _datarelrolocal_start_ofs
112 _datarelrolocal_start_ofs:
113 .word __datarelrolocal_start - _start
115 .globl _datarellocal_start_ofs
116 _datarellocal_start_ofs:
117 .word __datarellocal_start - _start
119 .globl _datarelro_start_ofs
120 _datarelro_start_ofs:
121 .word __datarelro_start - _start
123 #ifdef CONFIG_USE_IRQ
124 /* IRQ stack memory (calculated at run-time) */
125 .globl IRQ_STACK_START
129 /* IRQ stack memory (calculated at run-time) */
130 .globl FIQ_STACK_START
135 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
136 /* IRQ stack memory (calculated at run-time) + 8 bytes */
137 .globl IRQ_STACK_START_IN
142 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
144 * the actual reset code
149 * set the cpu to SVC32 mode
156 #ifdef CONFIG_OMAP2420H4
157 /* Copy vectors to mask ROM indirect addr */
158 adr r0, _start /* r0 <- current position of code */
159 add r0, r0, #4 /* skip reset vector */
160 mov r2, #64 /* r2 <- size to copy */
161 add r2, r0, r2 /* r2 <- source end address */
162 mov r1, #SRAM_OFFSET0 /* build vect addr */
163 mov r3, #SRAM_OFFSET1
165 mov r3, #SRAM_OFFSET2
168 ldmia r0!, {r3-r10} /* copy from source address [r0] */
169 stmia r1!, {r3-r10} /* copy to target address [r1] */
170 cmp r0, r2 /* until source end address [r2] */
171 bne next /* loop until equal */
172 bl cpy_clk_code /* put dpll adjust code behind vectors */
174 /* the mask ROM code should have PLL and others stable */
175 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
179 /* Set stackpointer in internal RAM to call board_init_f */
181 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
184 #ifdef CONFIG_NAND_SPL
187 #ifdef CONFIG_ONENAND_IPL
191 #endif /* CONFIG_ONENAND_IPL */
192 #endif /* CONFIG_NAND_SPL */
194 /*------------------------------------------------------------------------------*/
197 * void relocate_code (addr_sp, gd, addr_moni)
199 * This "function" does not return, instead it continues in RAM
200 * after relocating the monitor code.
205 mov r4, r0 /* save addr_sp */
206 mov r5, r1 /* save addr of gd */
207 mov r6, r2 /* save addr of destination */
208 mov r7, r2 /* save addr of destination */
210 /* Set up the stack */
216 ldr r3, _bss_start_ofs
217 add r2, r0, r3 /* r2 <- source end address */
221 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
223 ldmia r0!, {r9-r10} /* copy from source address [r0] */
224 stmia r6!, {r9-r10} /* copy to target address [r1] */
225 cmp r0, r2 /* until source end address [r2] */
228 #ifndef CONFIG_PRELOADER
230 * fix .rel.dyn relocations
232 ldr r0, _TEXT_BASE /* r0 <- Text base */
233 sub r9, r7, r0 /* r9 <- relocation offset */
234 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
235 add r10, r10, r0 /* r10 <- sym table in FLASH */
236 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
237 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
238 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
239 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
241 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
242 add r0, r0, r9 /* r0 <- location to fix up in RAM */
245 cmp r8, #23 /* relative fixup? */
247 cmp r8, #2 /* absolute fixup? */
249 /* ignore unknown type of fixup */
252 /* absolute fix: set location to (offset) symbol value */
253 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
254 add r1, r10, r1 /* r1 <- address of symbol in table */
255 ldr r1, [r1, #4] /* r1 <- symbol value */
256 add r1, r9 /* r1 <- relocated sym addr */
259 /* relative fix: increase location by offset */
264 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
268 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
271 #ifndef CONFIG_PRELOADER
272 ldr r0, _bss_start_ofs
274 ldr r3, _TEXT_BASE /* Text base */
275 mov r4, r7 /* reloc addr */
278 mov r2, #0x00000000 /* clear */
280 clbss_l:str r2, [r0] /* clear loop... */
284 #endif /* #ifndef CONFIG_PRELOADER */
287 * We are done. Do not return, instead branch to second part of board
288 * initialization, now running from RAM.
290 #ifdef CONFIG_NAND_SPL
291 ldr r0, _nand_boot_ofs
295 : .word nand_boot - _start
298 ldr r0, _board_init_r_ofs
301 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
304 /* setup parameters for board_init_r */
305 mov r0, r5 /* gd_t */
306 mov r1, r7 /* dest_addr */
311 .word board_init_r - _start
315 .word __rel_dyn_start - _start
317 .word __rel_dyn_end - _start
319 .word __dynsym_start - _start
321 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
323 * the actual reset code
328 * set the cpu to SVC32 mode
335 #ifdef CONFIG_OMAP2420H4
336 /* Copy vectors to mask ROM indirect addr */
337 adr r0, _start /* r0 <- current position of code */
338 add r0, r0, #4 /* skip reset vector */
339 mov r2, #64 /* r2 <- size to copy */
340 add r2, r0, r2 /* r2 <- source end address */
341 mov r1, #SRAM_OFFSET0 /* build vect addr */
342 mov r3, #SRAM_OFFSET1
344 mov r3, #SRAM_OFFSET2
347 ldmia r0!, {r3-r10} /* copy from source address [r0] */
348 stmia r1!, {r3-r10} /* copy to target address [r1] */
349 cmp r0, r2 /* until source end address [r2] */
350 bne next /* loop until equal */
351 bl cpy_clk_code /* put dpll adjust code behind vectors */
353 /* the mask ROM code should have PLL and others stable */
354 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
358 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
359 relocate: /* relocate U-Boot to RAM */
360 adr r0, _start /* r0 <- current position of code */
361 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
362 cmp r0, r1 /* don't reloc during debug */
363 #ifndef CONFIG_PRELOADER
365 #endif /* CONFIG_PRELOADER */
367 ldr r2, _armboot_start
369 sub r2, r3, r2 /* r2 <- size of armboot */
370 add r2, r0, r2 /* r2 <- source end address */
373 ldmia r0!, {r3-r10} /* copy from source address [r0] */
374 stmia r1!, {r3-r10} /* copy to target address [r1] */
375 cmp r0, r2 /* until source end address [r2] */
377 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
379 /* Set up the stack */
381 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
382 #ifdef CONFIG_PRELOADER
383 sub sp, r0, #128 /* leave 32 words for abort-stack */
385 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
386 sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
387 #ifdef CONFIG_USE_IRQ
388 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
390 sub sp, r0, #12 /* leave 3 words for abort-stack */
391 #endif /* CONFIG_PRELOADER */
392 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
396 ldr r0, _bss_start_ofs /* find start of bss segment */
398 ldr r1, _bss_end_ofs /* stop here */
400 mov r2, #0x00000000 /* clear */
402 #ifndef CONFIG_PRELOADER
403 clbss_l:str r2, [r0] /* clear loop... */
409 ldr r0, _start_armboot_ofs
415 #ifdef CONFIG_NAND_SPL
416 .word nand_boot - _start
418 #ifdef CONFIG_ONENAND_IPL
419 .word start_oneboot - _start
421 .word start_armboot - _start
422 #endif /* CONFIG_ONENAND_IPL */
423 #endif /* CONFIG_NAND_SPL */
425 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
428 *************************************************************************
430 * CPU_init_critical registers
432 * setup important registers
433 * setup memory timing
435 *************************************************************************
437 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
440 * flush v4 I/D caches
443 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
444 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
447 * disable MMU stuff and caches
449 mrc p15, 0, r0, c1, c0, 0
450 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
451 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
452 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
453 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
454 mcr p15, 0, r0, c1, c0, 0
457 * Jump to board specific initialization... The Mask ROM will have already initialized
458 * basic memory. Go here to bump up clock rate and handle wake up conditions.
460 mov ip, lr /* persevere link reg across call */
461 bl lowlevel_init /* go setup pll,mux,memory */
462 mov lr, ip /* restore link */
463 mov pc, lr /* back to my caller */
464 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
466 #ifndef CONFIG_PRELOADER
468 *************************************************************************
472 *************************************************************************
477 #define S_FRAME_SIZE 72
499 #define MODE_SVC 0x13
503 * use bad_save_user_regs for abort/prefetch/undef/swi ...
504 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
507 .macro bad_save_user_regs
508 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
509 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
511 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
512 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
515 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
516 sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
518 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
519 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
523 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
524 mov r0, sp @ save current stack into r0 (param register)
527 .macro irq_save_user_regs
528 sub sp, sp, #S_FRAME_SIZE
529 stmia sp, {r0 - r12} @ Calling r0-r12
530 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
531 stmdb r8, {sp, lr}^ @ Calling SP, LR
532 str lr, [r8, #0] @ Save calling PC
534 str r6, [r8, #4] @ Save CPSR
535 str r0, [r8, #8] @ Save OLD_R0
539 .macro irq_restore_user_regs
540 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
542 ldr lr, [sp, #S_PC] @ Get PC
543 add sp, sp, #S_FRAME_SIZE
544 subs pc, lr, #4 @ return & move spsr_svc into cpsr
548 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
549 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
551 adr r13, _start @ setup our mode stack (enter in banked mode)
552 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
553 sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
556 str lr, [r13] @ save caller lr in position 0 of saved stack
557 mrs lr, spsr @ get the spsr
558 str lr, [r13, #4] @ save spsr in position 1 of saved stack
560 mov r13, #MODE_SVC @ prepare SVC-Mode
562 msr spsr, r13 @ switch modes, make sure moves will execute
563 mov lr, pc @ capture return pc
564 movs pc, lr @ jump to next instruction & switch modes.
567 .macro get_bad_stack_swi
568 sub r13, r13, #4 @ space on current stack for scratch reg.
569 str r0, [r13] @ save R0's value.
570 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
571 ldr r0, IRQ_STACK_START_IN @ get data regions start
573 ldr r0, _armboot_start @ get data regions start
574 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
575 sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
577 str lr, [r0] @ save caller lr in position 0 of saved stack
578 mrs r0, spsr @ get the spsr
579 str lr, [r0, #4] @ save spsr in position 1 of saved stack
580 ldr r0, [r13] @ restore r0
581 add r13, r13, #4 @ pop stack entry
584 .macro get_irq_stack @ setup IRQ stack
585 ldr sp, IRQ_STACK_START
588 .macro get_fiq_stack @ setup FIQ stack
589 ldr sp, FIQ_STACK_START
591 #endif /* CONFIG_PRELOADER */
596 #ifdef CONFIG_PRELOADER
599 ldr sp, _TEXT_BASE /* use 32 words about stack */
600 bl hang /* hang and never return */
601 #else /* !CONFIG_PRELOADER */
603 undefined_instruction:
606 bl do_undefined_instruction
612 bl do_software_interrupt
632 #ifdef CONFIG_USE_IRQ
639 irq_restore_user_regs
644 /* someone ought to write a more effiction fiq_save_user_regs */
647 irq_restore_user_regs
665 .global arm1136_cache_flush
667 #if !defined(CONFIG_SYS_NO_ICACHE)
668 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
670 #if !defined(CONFIG_SYS_NO_DCACHE)
671 mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
673 mov pc, lr @ back to caller
674 #endif /* CONFIG_PRELOADER */