2 * armboot - Startup Code for ARM1176 CPU-core
4 * Copyright (c) 2007 Samsung Electronics
7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
9 * SPDX-License-Identifier: GPL-2.0+
11 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
12 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
13 * jsgood (jsgood.yang@samsung.com)
14 * Base codes by scsuh (sc.suh)
17 #include <asm-offsets.h>
21 #ifndef CONFIG_SYS_PHY_UBOOT_BASE
22 #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
26 *************************************************************************
28 * Startup Code (reset vector)
30 * do important init only if we don't start from memory!
31 * setup Memory and board specific bits prior to relocation.
32 * relocate armboot to ram
35 *************************************************************************
42 * set the cpu to SVC32 mode
50 *************************************************************************
52 * CPU_init_critical registers
54 * setup important registers
57 *************************************************************************
60 * we do sys-critical inits only at reboot,
61 * not when booting from ram!
65 * When booting from NAND - it has definitely been a reset, so, no need
66 * to flush caches and disable the MMU
68 #ifndef CONFIG_SPL_BUILD
73 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
74 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
77 * disable MMU stuff and caches
79 mrc p15, 0, r0, c1, c0, 0
80 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
81 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
82 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
83 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
85 /* Prepare to disable the MMU */
86 adr r2, mmu_disable_phys
87 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
91 /* Run in a single cache-line */
93 mcr p15, 0, r0, c1, c0, 0
99 #ifdef CONFIG_DISABLE_TCM
103 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
109 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
111 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
116 #ifdef CONFIG_PERIPORT_REMAP
117 /* Peri port setup */
118 ldr r0, =CONFIG_PERIPORT_BASE
119 orr r0, r0, #CONFIG_PERIPORT_SIZE
120 mcr p15,0,r0,c15,c2,4
124 * Go setup Memory and board specific bits prior to relocation.
126 bl lowlevel_init /* go setup pll,mux,memory */
130 /*------------------------------------------------------------------------------*/
132 .globl c_runtime_cpu_setup