2 * armboot - Startup Code for ARM1176 CPU-core
4 * Copyright (c) 2007 Samsung Electronics
7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
9 * SPDX-License-Identifier: GPL-2.0+
11 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
12 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
13 * jsgood (jsgood.yang@samsung.com)
14 * Base codes by scsuh (sc.suh)
17 #include <asm-offsets.h>
21 #ifndef CONFIG_SYS_PHY_UBOOT_BASE
22 #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
26 *************************************************************************
28 * Jump vector table as in table 3.1 in [1]
30 *************************************************************************
35 #ifndef CONFIG_SPL_BUILD
36 ldr pc, _undefined_instruction
37 ldr pc, _software_interrupt
38 ldr pc, _prefetch_abort
44 _undefined_instruction:
45 .word undefined_instruction
47 .word software_interrupt
59 .word 0x12345678 /* now 16*4=64 */
64 .balignl 16,0xdeadbeef
66 *************************************************************************
68 * Startup Code (reset vector)
70 * do important init only if we don't start from memory!
71 * setup Memory and board specific bits prior to relocation.
72 * relocate armboot to ram
75 *************************************************************************
78 /* IRQ stack memory (calculated at run-time) + 8 bytes */
79 .globl IRQ_STACK_START_IN
84 * the actual reset code
89 * set the cpu to SVC32 mode
97 *************************************************************************
99 * CPU_init_critical registers
101 * setup important registers
102 * setup memory timing
104 *************************************************************************
107 * we do sys-critical inits only at reboot,
108 * not when booting from ram!
112 * When booting from NAND - it has definitely been a reset, so, no need
113 * to flush caches and disable the MMU
115 #ifndef CONFIG_SPL_BUILD
117 * flush v4 I/D caches
120 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
121 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
124 * disable MMU stuff and caches
126 mrc p15, 0, r0, c1, c0, 0
127 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
128 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
129 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
130 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
132 /* Prepare to disable the MMU */
133 adr r2, mmu_disable_phys
134 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
138 /* Run in a single cache-line */
140 mcr p15, 0, r0, c1, c0, 0
146 #ifdef CONFIG_DISABLE_TCM
150 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
156 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
158 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
163 #ifdef CONFIG_PERIPORT_REMAP
164 /* Peri port setup */
165 ldr r0, =CONFIG_PERIPORT_BASE
166 orr r0, r0, #CONFIG_PERIPORT_SIZE
167 mcr p15,0,r0,c15,c2,4
171 * Go setup Memory and board specific bits prior to relocation.
173 bl lowlevel_init /* go setup pll,mux,memory */
177 /*------------------------------------------------------------------------------*/
179 .globl c_runtime_cpu_setup
184 #ifndef CONFIG_SPL_BUILD
186 *************************************************************************
190 *************************************************************************
195 #define S_FRAME_SIZE 72
217 #define MODE_SVC 0x13
221 * use bad_save_user_regs for abort/prefetch/undef/swi ...
224 .macro bad_save_user_regs
225 /* carve out a frame on current user stack */
226 sub sp, sp, #S_FRAME_SIZE
227 /* Save user registers (now in svc mode) r0-r12 */
230 ldr r2, IRQ_STACK_START_IN
231 /* get values for "aborted" pc and cpsr (into parm regs) */
233 /* grab pointer to old stack */
234 add r0, sp, #S_FRAME_SIZE
238 /* save sp_SVC, lr_SVC, pc, cpsr */
240 /* save current stack into r0 (param register) */
245 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
247 /* save caller lr in position 0 of saved stack */
251 /* save spsr in position 1 of saved stack */
254 /* prepare SVC-Mode */
257 /* switch modes, make sure moves will execute */
259 /* capture return pc */
261 /* jump to next instruction & switch modes. */
265 .macro get_bad_stack_swi
266 /* space on current stack for scratch reg. */
268 /* save R0's value. */
270 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
271 /* save caller lr in position 0 of saved stack */
275 /* save spsr in position 1 of saved stack */
281 /* pop stack entry */
289 undefined_instruction:
292 bl do_undefined_instruction
298 bl do_software_interrupt
329 #endif /* CONFIG_SPL_BUILD */