3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/proc-armv/ptrace.h>
32 #include <asm/hardware.h>
35 /* we always count down the max. */
36 #define TIMER_LOAD_VAL 0xffff
37 /* macro to read the 16 bit timer */
38 #define READ_TIMER (IO_TC1D & 0xffff)
41 #define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
42 #define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
43 #define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS))
44 #define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK
45 #define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
49 void do_irq (struct pt_regs *pt_regs)
51 #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
52 /* No do_irq() for IntegratorAP/CM720T as yet */
54 #error do_irq() not defined for this CPU type
59 #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
60 /* Use IntegratorAP routines in board/integratorap.c */
63 static ulong timestamp;
68 #if defined(CONFIG_NETARM)
69 /* disable all interrupts */
72 /* operate timer 2 in non-prescale mode */
73 TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
74 NETARM_GEN_TCTL_ENABLE |
75 NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
77 /* set timer 2 counter */
78 lastdec = TIMER_LOAD_VAL;
79 #elif defined(CONFIG_TEGRA)
80 /* No timer routines for tegra as yet */
83 #error No timer_init() defined for this CPU type
90 #endif /* ! IntegratorAP */
93 * timer without interrupts
97 #if defined(CONFIG_NETARM)
99 ulong get_timer (ulong base)
101 return get_timer_masked () - base;
104 void __udelay (unsigned long usec)
109 tmo *= CONFIG_SYS_HZ;
112 tmo += get_timer (0);
114 while (get_timer_masked () < tmo)
117 ulong get_timer_masked (void)
119 ulong now = READ_TIMER;
121 if (lastdec >= now) {
123 timestamp += lastdec - now;
125 /* we have an overflow ... */
126 timestamp += lastdec + TIMER_LOAD_VAL - now;
133 void udelay_masked (unsigned long usec)
141 tmo *= CONFIG_SYS_HZ;
144 tmo = usec * CONFIG_SYS_HZ;
148 endtime = get_timer_masked () + tmo;
151 ulong now = get_timer_masked ();
152 diff = endtime - now;
156 #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
157 /* No timer routines for IntegratorAP/CM720T as yet */
158 #elif defined(CONFIG_TEGRA)
159 /* No timer routines for tegra as yet */
161 #error Timer routines not defined for this CPU type