3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 #include <asm/arch/hardware.h>
37 #include <asm/arch/at91_tc.h>
38 #include <asm/arch/at91_pmc.h>
40 DECLARE_GLOBAL_DATA_PTR;
42 /* the number of clocks per CONFIG_SYS_HZ */
43 #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
47 at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
48 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
50 /* enables TC1.0 clock */
51 writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
54 writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
55 AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
57 writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
58 /* set to MCLK/2 and restart the timer
59 when the value in TC_RC is reached */
60 writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
62 writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
63 writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
65 writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
73 * timer without interrupts
76 void reset_timer(void)
81 ulong get_timer(ulong base)
83 return get_timer_masked() - base;
86 void set_timer(ulong t)
91 void __udelay(unsigned long usec)
96 void reset_timer_masked(void)
99 at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
100 gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
104 ulong get_timer_raw(void)
106 at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
109 now = readl(&tc->tc[0].cv) & 0x0000ffff;
111 if (now >= gd->lastinc) {
113 gd->tbl += now - gd->lastinc;
115 /* we have an overflow ... */
116 gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
123 ulong get_timer_masked(void)
125 return get_timer_raw()/TIMER_LOAD_VAL;
128 void udelay_masked(unsigned long usec)
134 tmo = CONFIG_SYS_HZ_CLOCK / 1000;
138 endtime = get_timer_raw() + tmo;
141 u32 now = get_timer_raw();
142 diff = endtime - now;
147 * This function is derived from PowerPC code (read timebase as long long).
148 * On ARM it just returns the timer value.
150 unsigned long long get_ticks(void)
156 * This function is derived from PowerPC code (timebase clock frequency).
157 * On ARM it returns the number of timer ticks per second.
159 ulong get_tbclk(void)
161 return CONFIG_SYS_HZ;