3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 #include <asm/hardware.h>
37 #include <asm/arch/at91_tc.h>
38 #include <asm/arch/at91_pmc.h>
40 /* the number of clocks per CONFIG_SYS_HZ */
41 #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
48 at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
49 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
51 /* enables TC1.0 clock */
52 writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */
55 writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
56 AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
58 writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
59 /* set to MCLK/2 and restart the timer
60 when the value in TC_RC is reached */
61 writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
63 writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
64 writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
66 writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
74 * timer without interrupts
77 void reset_timer(void)
82 ulong get_timer(ulong base)
84 return get_timer_masked() - base;
87 void set_timer(ulong t)
92 void __udelay(unsigned long usec)
97 void reset_timer_masked(void)
100 at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
101 lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
105 ulong get_timer_raw(void)
107 at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
110 now = readl(&tc->tc[0].cv) & 0x0000ffff;
112 if (now >= lastinc) {
114 timestamp += now - lastinc;
116 /* we have an overflow ... */
117 timestamp += now + TIMER_LOAD_VAL - lastinc;
124 ulong get_timer_masked(void)
126 return get_timer_raw()/TIMER_LOAD_VAL;
129 void udelay_masked(unsigned long usec)
135 tmo = CONFIG_SYS_HZ_CLOCK / 1000;
139 endtime = get_timer_raw() + tmo;
142 u32 now = get_timer_raw();
143 diff = endtime - now;
148 * This function is derived from PowerPC code (read timebase as long long).
149 * On ARM it just returns the timer value.
151 unsigned long long get_ticks(void)
157 * This function is derived from PowerPC code (timebase clock frequency).
158 * On ARM it returns the number of timer ticks per second.
160 ulong get_tbclk(void)
162 return CONFIG_SYS_HZ;