2 * armboot - Startup Code for ARM920 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
6 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
8 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm-offsets.h>
16 *************************************************************************
18 * Startup Code (called from the ARM reset exception vector)
20 * do important init only if we don't start from memory!
21 * relocate armboot to ram
23 * jump to second stage
25 *************************************************************************
32 * set the cpu to SVC32 mode
39 #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
41 * relocate exception table
54 * we do sys-critical inits only at reboot,
55 * not when booting from ram!
57 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
63 /*------------------------------------------------------------------------------*/
65 .globl c_runtime_cpu_setup
71 *************************************************************************
73 * CPU_init_critical registers
75 * setup important registers
78 *************************************************************************
82 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
88 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
89 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
92 * disable MMU stuff and caches
94 mrc p15, 0, r0, c1, c0, 0
95 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
96 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
97 orr r0, r0, #0x00000002 @ set bit 1 (A) Align
98 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
99 mcr p15, 0, r0, c1, c0, 0
101 #ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
103 * before relocating, we have to setup RAM timing
104 * because memory timing is board-dependend, you will
105 * find a lowlevel_init.S in your board directory.
113 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */