2 * armboot - Startup Code for ARM920 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
6 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 *************************************************************************
33 * Jump vector table as in table 3.1 in [1]
35 *************************************************************************
41 ldr pc, _undefined_instruction
42 ldr pc, _software_interrupt
43 ldr pc, _prefetch_abort
49 _undefined_instruction: .word undefined_instruction
50 _software_interrupt: .word software_interrupt
51 _prefetch_abort: .word prefetch_abort
52 _data_abort: .word data_abort
53 _not_used: .word not_used
57 .balignl 16,0xdeadbeef
61 *************************************************************************
63 * Startup Code (called from the ARM reset exception vector)
65 * do important init only if we don't start from memory!
66 * relocate armboot to ram
68 * jump to second stage
70 *************************************************************************
77 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
84 * These are defined in the board-specific linker script.
95 /* IRQ stack memory (calculated at run-time) */
96 .globl IRQ_STACK_START
100 /* IRQ stack memory (calculated at run-time) */
101 .globl FIQ_STACK_START
106 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
107 /* IRQ stack memory (calculated at run-time) + 8 bytes */
108 .globl IRQ_STACK_START_IN
112 .globl _datarel_start
114 .word __datarel_start
116 .globl _datarelrolocal_start
117 _datarelrolocal_start:
118 .word __datarelrolocal_start
120 .globl _datarellocal_start
122 .word __datarellocal_start
124 .globl _datarelro_start
126 .word __datarelro_start
137 * the actual start code
142 * set the cpu to SVC32 mode
152 #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
154 * relocate exception table
166 #ifdef CONFIG_S3C24X0
167 /* turn off the watchdog */
169 # if defined(CONFIG_S3C2400)
170 # define pWTCON 0x15300000
171 # define INTMSK 0x14400008 /* Interupt-Controller base addresses */
172 # define CLKDIVN 0x14800014 /* clock divisor register */
174 # define pWTCON 0x53000000
175 # define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
176 # define INTSUBMSK 0x4A00001C
177 # define CLKDIVN 0x4C000014 /* clock divisor register */
185 * mask all IRQs by setting all bits in the INTMR - default
190 # if defined(CONFIG_S3C2410)
196 /* FCLK:HCLK:PCLK = 1:2:4 */
197 /* default FCLK is 120 MHz ! */
201 #endif /* CONFIG_S3C24X0 */
204 * we do sys-critical inits only at reboot,
205 * not when booting from ram!
207 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
211 /* Set stackpointer in internal RAM to call board_init_f */
213 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
217 /*------------------------------------------------------------------------------*/
220 * void relocate_code (addr_sp, gd, addr_moni)
222 * This "function" does not return, instead it continues in RAM
223 * after relocating the monitor code.
228 mov r4, r0 /* save addr_sp */
229 mov r5, r1 /* save addr of gd */
230 mov r6, r2 /* save addr of destination */
231 mov r7, r2 /* save addr of destination */
233 /* Set up the stack */
240 sub r2, r3, r2 /* r2 <- size of armboot */
241 add r2, r0, r2 /* r2 <- source end address */
245 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
247 ldmia r0!, {r9-r10} /* copy from source address [r0] */
248 stmia r6!, {r9-r10} /* copy to target address [r1] */
249 cmp r0, r2 /* until source end addreee [r2] */
252 #ifndef CONFIG_PRELOADER
253 /* fix got entries */
254 ldr r1, _TEXT_BASE /* Text base */
255 mov r0, r7 /* reloc addr */
256 ldr r2, _got_start /* addr in Flash */
257 ldr r3, _got_end /* addr in Flash */
272 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
275 #ifndef CONFIG_PRELOADER
278 ldr r3, _TEXT_BASE /* Text base */
279 mov r4, r7 /* reloc addr */
284 mov r2, #0x00000000 /* clear */
286 clbss_l:str r2, [r0] /* clear loop... */
296 * We are done. Do not return, instead branch to second part of board
297 * initialization, now running from RAM.
299 #ifdef CONFIG_NAND_SPL
302 _nand_boot: .word nand_boot
305 ldr r2, _board_init_r
307 add r2, r2, r7 /* position from board_init_r in RAM */
308 /* setup parameters for board_init_r */
309 mov r0, r5 /* gd_t */
310 mov r1, r7 /* dest_addr */
315 _board_init_r: .word board_init_r
318 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
320 * the actual start code
325 * set the cpu to SVC32 mode
335 #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
337 * relocate exception table
349 #ifdef CONFIG_S3C24X0
350 /* turn off the watchdog */
352 # if defined(CONFIG_S3C2400)
353 # define pWTCON 0x15300000
354 # define INTMSK 0x14400008 /* Interupt-Controller base addresses */
355 # define CLKDIVN 0x14800014 /* clock divisor register */
357 # define pWTCON 0x53000000
358 # define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
359 # define INTSUBMSK 0x4A00001C
360 # define CLKDIVN 0x4C000014 /* clock divisor register */
368 * mask all IRQs by setting all bits in the INTMR - default
373 # if defined(CONFIG_S3C2410)
379 /* FCLK:HCLK:PCLK = 1:2:4 */
380 /* default FCLK is 120 MHz ! */
384 #endif /* CONFIG_S3C24X0 */
387 * we do sys-critical inits only at reboot,
388 * not when booting from ram!
390 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
394 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
395 relocate: /* relocate U-Boot to RAM */
396 adr r0, _start /* r0 <- current position of code */
397 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
398 cmp r0, r1 /* don't reloc during debug */
401 ldr r2, _armboot_start
403 sub r2, r3, r2 /* r2 <- size of armboot */
404 add r2, r0, r2 /* r2 <- source end address */
407 ldmia r0!, {r3-r10} /* copy from source address [r0] */
408 stmia r1!, {r3-r10} /* copy to target address [r1] */
409 cmp r0, r2 /* until source end addreee [r2] */
411 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
413 /* Set up the stack */
415 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
416 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
417 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
418 #ifdef CONFIG_USE_IRQ
419 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
421 sub sp, r0, #12 /* leave 3 words for abort-stack */
422 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
425 ldr r0, _bss_start /* find start of bss segment */
426 ldr r1, _bss_end /* stop here */
427 mov r2, #0x00000000 /* clear */
429 clbss_l:str r2, [r0] /* clear loop... */
434 ldr pc, _start_armboot
436 _start_armboot: .word start_armboot
437 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
440 *************************************************************************
442 * CPU_init_critical registers
444 * setup important registers
445 * setup memory timing
447 *************************************************************************
451 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
454 * flush v4 I/D caches
457 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
458 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
461 * disable MMU stuff and caches
463 mrc p15, 0, r0, c1, c0, 0
464 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
465 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
466 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
467 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
468 mcr p15, 0, r0, c1, c0, 0
471 * before relocating, we have to setup RAM timing
472 * because memory timing is board-dependend, you will
473 * find a lowlevel_init.S in your board directory.
481 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
484 *************************************************************************
488 *************************************************************************
494 #define S_FRAME_SIZE 72
516 #define MODE_SVC 0x13
520 * use bad_save_user_regs for abort/prefetch/undef/swi ...
521 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
524 .macro bad_save_user_regs
525 sub sp, sp, #S_FRAME_SIZE
526 stmia sp, {r0 - r12} @ Calling r0-r12
527 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
528 ldr r2, _armboot_start
529 sub r2, r2, #(CONFIG_STACKSIZE)
530 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
531 /* set base 2 words into abort stack */
532 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
534 ldr r2, IRQ_STACK_START_IN
536 ldmia r2, {r2 - r3} @ get pc, cpsr
537 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
541 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
545 .macro irq_save_user_regs
546 sub sp, sp, #S_FRAME_SIZE
547 stmia sp, {r0 - r12} @ Calling r0-r12
549 stmdb r7, {sp, lr}^ @ Calling SP, LR
550 str lr, [r7, #0] @ Save calling PC
552 str r6, [r7, #4] @ Save CPSR
553 str r0, [r7, #8] @ Save OLD_R0
557 .macro irq_restore_user_regs
558 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
560 ldr lr, [sp, #S_PC] @ Get PC
561 add sp, sp, #S_FRAME_SIZE
562 /* return & move spsr_svc into cpsr */
567 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
568 ldr r13, _armboot_start @ setup our mode stack
569 sub r13, r13, #(CONFIG_STACKSIZE)
570 sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
571 /* reserve a couple spots in abort stack */
572 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8)
574 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
577 str lr, [r13] @ save caller lr / spsr
581 mov r13, #MODE_SVC @ prepare SVC-Mode
588 .macro get_irq_stack @ setup IRQ stack
589 ldr sp, IRQ_STACK_START
592 .macro get_fiq_stack @ setup FIQ stack
593 ldr sp, FIQ_STACK_START
600 undefined_instruction:
603 bl do_undefined_instruction
609 bl do_software_interrupt
629 #ifdef CONFIG_USE_IRQ
636 irq_restore_user_regs
641 /* someone ought to write a more effiction fiq_save_user_regs */
644 irq_restore_user_regs