2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
38 *************************************************************************
40 * Jump vector table as in table 3.1 in [1]
42 *************************************************************************
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
56 _undefined_instruction: .word undefined_instruction
57 _software_interrupt: .word software_interrupt
58 _prefetch_abort: .word prefetch_abort
59 _data_abort: .word data_abort
60 _not_used: .word not_used
64 .balignl 16,0xdeadbeef
68 *************************************************************************
70 * Startup Code (reset vector)
72 * do important init only if we don't start from memory!
73 * setup Memory and board specific bits prior to relocation.
74 * relocate armboot to ram
77 *************************************************************************
82 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
83 .word CONFIG_SPL_TEXT_BASE
85 .word CONFIG_SYS_TEXT_BASE
89 * These are defined in the board-specific linker script.
90 * Subtracting _start from them lets the linker put their
91 * relative position in the executable instead of leaving
96 .word __bss_start - _start
98 .globl _image_copy_end_ofs
100 .word __image_copy_end - _start
104 .word __bss_end - _start
110 #ifdef CONFIG_USE_IRQ
111 /* IRQ stack memory (calculated at run-time) */
112 .globl IRQ_STACK_START
116 /* IRQ stack memory (calculated at run-time) */
117 .globl FIQ_STACK_START
122 /* IRQ stack memory (calculated at run-time) + 8 bytes */
123 .globl IRQ_STACK_START_IN
128 * the actual reset code
133 * set the cpu to SVC32 mode
143 mov r1, #0x81 /* Set ARM925T configuration. */
144 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
147 * turn off the watchdog, unlock/diable sequence
156 * mask all IRQs by setting all bits in the INTMR - default
159 ldr r0, =REG_IHL1_MIR
161 ldr r0, =REG_IHL2_MIR
165 * wait for dpll to lock
176 * we do sys-critical inits only at reboot,
177 * not when booting from ram!
179 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
185 /*------------------------------------------------------------------------------*/
188 * void relocate_code(addr_moni)
190 * This function relocates the monitor code.
194 mov r6, r0 /* save addr of destination */
197 subs r9, r6, r0 /* r9 <- relocation offset */
198 beq relocate_done /* skip relocation */
199 mov r1, r6 /* r1 <- scratch for copy_loop */
200 ldr r3, _image_copy_end_ofs
201 add r2, r0, r3 /* r2 <- source end address */
204 ldmia r0!, {r10-r11} /* copy from source address [r0] */
205 stmia r1!, {r10-r11} /* copy to target address [r1] */
206 cmp r0, r2 /* until source end address [r2] */
209 #ifndef CONFIG_SPL_BUILD
211 * fix .rel.dyn relocations
213 ldr r0, _TEXT_BASE /* r0 <- Text base */
214 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
215 add r10, r10, r0 /* r10 <- sym table in FLASH */
216 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
217 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
218 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
219 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
221 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
222 add r0, r0, r9 /* r0 <- location to fix up in RAM */
225 cmp r7, #23 /* relative fixup? */
227 cmp r7, #2 /* absolute fixup? */
229 /* ignore unknown type of fixup */
232 /* absolute fix: set location to (offset) symbol value */
233 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
234 add r1, r10, r1 /* r1 <- address of symbol in table */
235 ldr r1, [r1, #4] /* r1 <- symbol value */
236 add r1, r1, r9 /* r1 <- relocated sym addr */
239 /* relative fix: increase location by offset */
244 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
254 .word __rel_dyn_start - _start
256 .word __rel_dyn_end - _start
258 .word __dynsym_start - _start
260 .globl c_runtime_cpu_setup
266 *************************************************************************
268 * CPU_init_critical registers
270 * setup important registers
271 * setup memory timing
273 *************************************************************************
279 * flush v4 I/D caches
282 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
283 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
286 * disable MMU stuff and caches
288 mrc p15, 0, r0, c1, c0, 0
289 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
290 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
291 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
292 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
293 mcr p15, 0, r0, c1, c0, 0
296 * Go setup Memory and board specific bits prior to relocation.
298 mov ip, lr /* perserve link reg across call */
299 bl lowlevel_init /* go setup pll,mux,memory */
300 mov lr, ip /* restore link */
301 mov pc, lr /* back to my caller */
303 *************************************************************************
307 *************************************************************************
313 #define S_FRAME_SIZE 72
335 #define MODE_SVC 0x13
339 * use bad_save_user_regs for abort/prefetch/undef/swi ...
340 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
343 .macro bad_save_user_regs
344 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
345 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
347 ldr r2, IRQ_STACK_START_IN
348 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
349 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
353 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
354 mov r0, sp @ save current stack into r0 (param register)
357 .macro irq_save_user_regs
358 sub sp, sp, #S_FRAME_SIZE
359 stmia sp, {r0 - r12} @ Calling r0-r12
360 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
361 stmdb r8, {sp, lr}^ @ Calling SP, LR
362 str lr, [r8, #0] @ Save calling PC
364 str r6, [r8, #4] @ Save CPSR
365 str r0, [r8, #8] @ Save OLD_R0
369 .macro irq_restore_user_regs
370 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
372 ldr lr, [sp, #S_PC] @ Get PC
373 add sp, sp, #S_FRAME_SIZE
374 subs pc, lr, #4 @ return & move spsr_svc into cpsr
378 ldr r13, IRQ_STACK_START_IN
380 str lr, [r13] @ save caller lr in position 0 of saved stack
381 mrs lr, spsr @ get the spsr
382 str lr, [r13, #4] @ save spsr in position 1 of saved stack
384 mov r13, #MODE_SVC @ prepare SVC-Mode
386 msr spsr, r13 @ switch modes, make sure moves will execute
387 mov lr, pc @ capture return pc
388 movs pc, lr @ jump to next instruction & switch modes.
391 .macro get_irq_stack @ setup IRQ stack
392 ldr sp, IRQ_STACK_START
395 .macro get_fiq_stack @ setup FIQ stack
396 ldr sp, FIQ_STACK_START
403 undefined_instruction:
406 bl do_undefined_instruction
412 bl do_software_interrupt
432 #ifdef CONFIG_USE_IRQ
439 irq_restore_user_regs
444 /* someone ought to write a more effiction fiq_save_user_regs */
447 irq_restore_user_regs
468 ldr r1, rstctl1 /* get clkm1 reset ctl */
469 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
470 strh r3, [r1] /* force reset */