2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
37 #if defined(CONFIG_OMAP1510)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt: .word software_interrupt
62 _prefetch_abort: .word prefetch_abort
63 _data_abort: .word data_abort
64 _not_used: .word not_used
68 .balignl 16,0xdeadbeef
72 *************************************************************************
74 * Startup Code (reset vector)
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
81 *************************************************************************
86 .word CONFIG_SYS_TEXT_BASE
89 * These are defined in the board-specific linker script.
90 * Subtracting _start from them lets the linker put their
91 * relative position in the executable instead of leaving
96 .word __bss_start - _start
100 .word __bss_end__ - _start
106 #ifdef CONFIG_USE_IRQ
107 /* IRQ stack memory (calculated at run-time) */
108 .globl IRQ_STACK_START
112 /* IRQ stack memory (calculated at run-time) */
113 .globl FIQ_STACK_START
118 /* IRQ stack memory (calculated at run-time) + 8 bytes */
119 .globl IRQ_STACK_START_IN
124 * the actual reset code
129 * set the cpu to SVC32 mode
139 mov r1, #0x81 /* Set ARM925T configuration. */
140 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
143 * turn off the watchdog, unlock/diable sequence
152 * mask all IRQs by setting all bits in the INTMR - default
155 ldr r0, =REG_IHL1_MIR
157 ldr r0, =REG_IHL2_MIR
161 * wait for dpll to lock
172 * we do sys-critical inits only at reboot,
173 * not when booting from ram!
175 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
179 /* Set stackpointer in internal RAM to call board_init_f */
181 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
182 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
186 /*------------------------------------------------------------------------------*/
189 * void relocate_code (addr_sp, gd, addr_moni)
191 * This "function" does not return, instead it continues in RAM
192 * after relocating the monitor code.
197 mov r4, r0 /* save addr_sp */
198 mov r5, r1 /* save addr of gd */
199 mov r6, r2 /* save addr of destination */
201 /* Set up the stack */
207 beq clear_bss /* skip relocation */
208 mov r1, r6 /* r1 <- scratch for copy_loop */
209 ldr r3, _bss_start_ofs
210 add r2, r0, r3 /* r2 <- source end address */
213 ldmia r0!, {r9-r10} /* copy from source address [r0] */
214 stmia r1!, {r9-r10} /* copy to target address [r1] */
215 cmp r0, r2 /* until source end address [r2] */
218 #ifndef CONFIG_SPL_BUILD
220 * fix .rel.dyn relocations
222 ldr r0, _TEXT_BASE /* r0 <- Text base */
223 sub r9, r6, r0 /* r9 <- relocation offset */
224 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
225 add r10, r10, r0 /* r10 <- sym table in FLASH */
226 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
227 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
228 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
229 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
231 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
232 add r0, r0, r9 /* r0 <- location to fix up in RAM */
235 cmp r7, #23 /* relative fixup? */
237 cmp r7, #2 /* absolute fixup? */
239 /* ignore unknown type of fixup */
242 /* absolute fix: set location to (offset) symbol value */
243 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
244 add r1, r10, r1 /* r1 <- address of symbol in table */
245 ldr r1, [r1, #4] /* r1 <- symbol value */
246 add r1, r1, r9 /* r1 <- relocated sym addr */
249 /* relative fix: increase location by offset */
254 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
260 #ifndef CONFIG_SPL_BUILD
261 ldr r0, _bss_start_ofs
263 mov r4, r6 /* reloc addr */
266 mov r2, #0x00000000 /* clear */
268 clbss_l:str r2, [r0] /* clear loop... */
278 * We are done. Do not return, instead branch to second part of board
279 * initialization, now running from RAM.
281 #ifdef CONFIG_NAND_SPL
282 ldr r0, _nand_boot_ofs
288 ldr r0, _board_init_r_ofs
292 /* setup parameters for board_init_r */
293 mov r0, r5 /* gd_t */
294 mov r1, r6 /* dest_addr */
299 .word board_init_r - _start
303 .word __rel_dyn_start - _start
305 .word __rel_dyn_end - _start
307 .word __dynsym_start - _start
310 *************************************************************************
312 * CPU_init_critical registers
314 * setup important registers
315 * setup memory timing
317 *************************************************************************
323 * flush v4 I/D caches
326 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
327 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
330 * disable MMU stuff and caches
332 mrc p15, 0, r0, c1, c0, 0
333 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
334 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
335 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
336 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
337 mcr p15, 0, r0, c1, c0, 0
340 * Go setup Memory and board specific bits prior to relocation.
342 mov ip, lr /* perserve link reg across call */
343 bl lowlevel_init /* go setup pll,mux,memory */
344 mov lr, ip /* restore link */
345 mov pc, lr /* back to my caller */
347 *************************************************************************
351 *************************************************************************
357 #define S_FRAME_SIZE 72
379 #define MODE_SVC 0x13
383 * use bad_save_user_regs for abort/prefetch/undef/swi ...
384 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
387 .macro bad_save_user_regs
388 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
389 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
391 ldr r2, IRQ_STACK_START_IN
392 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
393 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
397 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
398 mov r0, sp @ save current stack into r0 (param register)
401 .macro irq_save_user_regs
402 sub sp, sp, #S_FRAME_SIZE
403 stmia sp, {r0 - r12} @ Calling r0-r12
404 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
405 stmdb r8, {sp, lr}^ @ Calling SP, LR
406 str lr, [r8, #0] @ Save calling PC
408 str r6, [r8, #4] @ Save CPSR
409 str r0, [r8, #8] @ Save OLD_R0
413 .macro irq_restore_user_regs
414 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
416 ldr lr, [sp, #S_PC] @ Get PC
417 add sp, sp, #S_FRAME_SIZE
418 subs pc, lr, #4 @ return & move spsr_svc into cpsr
422 ldr r13, IRQ_STACK_START_IN
424 str lr, [r13] @ save caller lr in position 0 of saved stack
425 mrs lr, spsr @ get the spsr
426 str lr, [r13, #4] @ save spsr in position 1 of saved stack
428 mov r13, #MODE_SVC @ prepare SVC-Mode
430 msr spsr, r13 @ switch modes, make sure moves will execute
431 mov lr, pc @ capture return pc
432 movs pc, lr @ jump to next instruction & switch modes.
435 .macro get_irq_stack @ setup IRQ stack
436 ldr sp, IRQ_STACK_START
439 .macro get_fiq_stack @ setup FIQ stack
440 ldr sp, FIQ_STACK_START
447 undefined_instruction:
450 bl do_undefined_instruction
456 bl do_software_interrupt
476 #ifdef CONFIG_USE_IRQ
483 irq_restore_user_regs
488 /* someone ought to write a more effiction fiq_save_user_regs */
491 irq_restore_user_regs
512 ldr r1, rstctl1 /* get clkm1 reset ctl */
513 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
514 strh r3, [r1] /* force reset */